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1. 发明申请

US20070126078A1 Interdigitized capacitor 有权
标题翻译：交叉电容器
公开(公告)号：US20070126078A1
公开(公告)日：2007-06-07
申请号：US11444505
申请日：2006-06-01
申请人： Kai-Yi Huang , Chia-Jen Hsu , Len-Yi Lu
发明人： Kai-Yi Huang , Chia-Jen Hsu , Len-Yi Lu
IPC分类号： H01L29/00
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： An interdigitized capacitor comprising first and second electrodes. The first electrode comprises two combs symmetrical to a first mirror plane. The fingers of the combs extend toward the first mirror plane. The second electrode comprises two combs and a linear plate. The combs are symmetrical to a second mirror plane and the fingers thereof extend toward the second mirror plane. The linear plate is located at the second mirror plane and connected to one finger of the combs of the second electrode. The first and second mirror planes are orthogonal. The fingers of the combs of the first and second electrodes are interdigitized.
摘要翻译：一种交错电容器，包括第一和第二电极。第一电极包括与第一镜面对称的两个梳子。梳子的手指朝向第一镜面延伸。第二电极包括两根梳子和一个线性板。梳子与第二镜面对称，其指状物朝向第二镜面延伸。线性板位于第二镜面并且连接到第二电极的梳子的一个手指。第一和第二镜面是正交的。第一和第二电极的梳子的指状物被交叉指向。

2. 发明授权

US07485914B2 Interdigitized capacitor 有权
标题翻译：交叉电容器
公开(公告)号：US07485914B2
公开(公告)日：2009-02-03
申请号：US11444505
申请日：2006-06-01
申请人： Kai-Yi Huang , Chia-Jen Hsu , Len-Yi Lu
发明人： Kai-Yi Huang , Chia-Jen Hsu , Len-Yi Lu
IPC分类号： H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L27/0805 , H01L23/5223 , H01L2924/0002 , H01L2924/00
摘要： An interdigitized capacitor comprising first and second electrodes. The first electrode comprises two combs symmetrical to a first mirror plane. The fingers of the combs extend toward the first mirror plane. The second electrode comprises two combs and a linear plate. The combs are symmetrical to a second mirror plane and the fingers thereof extend toward the second mirror plane. The linear plate is located at the second mirror plane and connected to one finger of the combs of the second electrode. The first and second mirror planes are orthogonal. The fingers of the combs of the first and second electrodes are interdigitized.
摘要翻译：一种交错电容器，包括第一和第二电极。第一电极包括与第一镜面对称的两个梳子。梳子的手指朝向第一镜面延伸。第二电极包括两个梳子和一个线性板。梳子与第二镜面对称，其指状物朝向第二镜面延伸。线性板位于第二镜面并且连接到第二电极的梳子的一个手指。第一和第二镜面是正交的。第一和第二电极的梳子的指状物被交叉指向。

3. 发明授权

US07986007B2 MOS transistor and manufacturing method thereof 有权
标题翻译： MOS晶体管及其制造方法
公开(公告)号：US07986007B2
公开(公告)日：2011-07-26
申请号：US12056293
申请日：2008-03-27
申请人： Kai-Yi Huang , Ta-Hsun Yeh , Yuh-Sheng Jean
发明人： Kai-Yi Huang , Ta-Hsun Yeh , Yuh-Sheng Jean
IPC分类号： H01L27/12
CPC分类号： H01L29/66659
摘要： The structure of the MOS transistor provided in this invention has LDD (lightly doped drain) and halo doped regions removed from the source, the drain or both regions in the substrate for improved linearity range when operated as a voltage-controlled resistor. The removal of the LDD and halo doped regions is performed by simply modifying the standard mask of the MOS process using a logic operation layer with no extra mask required.
摘要翻译：在本发明中提供的MOS晶体管的结构具有从源极，漏极或衬底中的两个区域去除的LDD（轻掺杂漏极）和卤素掺杂区域，用于当作为压控电阻器工作时提高线性范围。通过简单地使用没有额外掩模的逻辑运算层来修改MOS工艺的标准掩模来执行LDD和光晕掺杂区的去除。

4. 发明申请

US20060077028A1 INTEGRATED TRANSFORMER WITH STACK STRUCTURE 有权
标题翻译：具有堆叠结构的集成变压器
公开(公告)号：US20060077028A1
公开(公告)日：2006-04-13
申请号：US10906540
申请日：2005-02-24
申请人： Kai-Yi Huang
发明人： Kai-Yi Huang
IPC分类号： H01F27/28
CPC分类号： H01F17/0006 , H01F27/2804 , H01F2017/0046 , H01F2021/125
摘要： An integrated transformer with a stack structure comprises a middle dielectric layer, a bottom dielectric layer, a first winding and a second winding. A portion of the first winding is disposed over a surface of the middle dielectric layer and the remaining portion of the first winding is disposed over a surface of the bottom dielectric layer. A portion of the second winding is disposed over the surface of the middle dielectric layer and the remaining portion of the second winding is disposed over the surface of the bottom dielectric layer. The second winding doesn't intersect with the first winding. The portions of the first and second windings over the surface of the middle dielectric layer connect with the remaining portions of the first and second windings over the surface of the bottom dielectric through via plugs.
摘要翻译：具有堆叠结构的集成变压器包括中间电介质层，底部电介质层，第一绕组和第二绕组。第一绕组的一部分设置在中间电介质层的表面上，并且第一绕组的剩余部分设置在底部电介质层的表面上。第二绕组的一部分设置在中间电介质层的表面上，并且第二绕组的剩余部分设置在底部电介质层的表面上。第二绕组不与第一绕组相交。中间电介质层表面上的第一和第二绕组的部分通过通孔连接在底部电介质的表面上的第一和第二绕组的剩余部分。

5. 发明申请

US20090146252A1 INTEGRATED INDUCTOR STRUCTURE 有权
标题翻译：综合电感结构
公开(公告)号：US20090146252A1
公开(公告)日：2009-06-11
申请号：US12277309
申请日：2008-11-25
申请人： Kai-Yi Huang , Ta-Hsun Yeh , Yuh-Sheng Jean
发明人： Kai-Yi Huang , Ta-Hsun Yeh , Yuh-Sheng Jean
IPC分类号： H01L29/00
CPC分类号： H01L23/5227 , H01L28/10 , H01L2924/0002 , H01L2924/00
摘要： This invention provides an integrated inductor structure including a substrate, a metal coil layer on the substrate and a dielectric layer between the substrate and the metal coil layer. A well shielding structure for reducing eddy current is disposed in the substrate under the metal coil layer. The well shielding structure is chequered with a plurality of N wells and a plurality of P wells. The N wells and P wells are arranged in a chessboard-like manner. A P+ pickup ring is provided in the substrate to encompass the well shielding structure. A guard ring is formed directly on the P+ pickup ring.
摘要翻译：本发明提供了一种集成电感器结构，其包括衬底，衬底上的金属线圈层和在衬底和金属线圈层之间的介电层。用于减少涡流的良好屏蔽结构设置在金属线圈层下方的基板中。阱屏蔽结构用多个N阱和多个P阱进行方格。 N井和P井以棋盘状排列。 P +拾取环设置在衬底中以包围阱屏蔽结构。保护环直接形成在P +拾音环上。

6. 发明授权

US07164339B2 Integrated transformer with stack structure 有权
标题翻译：集成式变压器堆叠结构
公开(公告)号：US07164339B2
公开(公告)日：2007-01-16
申请号：US10906540
申请日：2005-02-24
申请人： Kai-Yi Huang
发明人： Kai-Yi Huang
IPC分类号： H01F5/00
CPC分类号： H01F17/0006 , H01F27/2804 , H01F2017/0046 , H01F2021/125
摘要： An integrated transformer with a stack structure comprises a middle dielectric layer, a bottom dielectric layer, a first winding and a second winding. A portion of the first winding is disposed over a surface of the middle dielectric layer and the remaining portion of the first winding is disposed over a surface of the bottom dielectric layer. A portion of the second winding is disposed over the surface of the middle dielectric layer and the remaining portion of the second winding is disposed over the surface of the bottom dielectric layer. The second winding doesn't intersect with the first winding. The portions of the first and second windings over the surface of the middle dielectric layer connect with the remaining portions of the first and second windings over the surface of the bottom dielectric through via plugs.
摘要翻译：具有堆叠结构的集成变压器包括中间电介质层，底部电介质层，第一绕组和第二绕组。第一绕组的一部分设置在中间电介质层的表面上，并且第一绕组的剩余部分设置在底部电介质层的表面上。第二绕组的一部分设置在中间电介质层的表面上，并且第二绕组的剩余部分设置在底部电介质层的表面上。第二绕组不与第一绕组相交。中间电介质层表面上的第一和第二绕组的部分通过通孔连接在底部电介质的表面上的第一和第二绕组的剩余部分。

7. 发明申请

US20120223796A1 VARIABLE INDUCTOR 审中-公开
标题翻译：可变电感器
公开(公告)号：US20120223796A1
公开(公告)日：2012-09-06
申请号：US13372503
申请日：2012-02-14
申请人： Kai-Yi Huang , Yuh-Sheng Jean , Ta-Hsun Yeh
发明人： Kai-Yi Huang , Yuh-Sheng Jean , Ta-Hsun Yeh
IPC分类号： H01F29/02
CPC分类号： H01F21/12 , H01F2021/125 , H01L23/5227 , H01L23/645 , H01L2924/0002 , H01L2924/00
摘要： A variable inductor includes an inductor element and a first inductance adjusting circuit. The first inductance adjusting circuit includes a first open-loop structure and a first switch element. The first switch element is coupled to the first open-loop structure. When the first switch element is in a conducting state, the first open-loop structure and the first switch element forms a first closed-loop to induce a first magnetic flux which alters a magnetic flux from the inductor element in operation.
摘要翻译：可变电感器包括电感器元件和第一电感调节电路。第一电感调节电路包括第一开环结构和第一开关元件。第一开关元件耦合到第一开环结构。当第一开关元件处于导通状态时，第一开环结构和第一开关元件形成第一闭环以产生在操作中改变来自电感器元件的磁通量的第一磁通量。

8. 发明授权

US07936245B2 Stacked structure of a spiral inductor 有权
标题翻译：螺旋电感器的堆叠结构
公开(公告)号：US07936245B2
公开(公告)日：2011-05-03
申请号：US12773024
申请日：2010-05-04
申请人： Kai-Yi Huang , Yuh-Sheng Jean , Ta-Hsun Yeh
发明人： Kai-Yi Huang , Yuh-Sheng Jean , Ta-Hsun Yeh
IPC分类号： H01F5/00
CPC分类号： H01F17/0006
摘要： A stacked structure of a spiral inductor includes a first metal layer, a second metal layer, a first set of vias, and a second set of vias. The first metal layer includes a first segment, a second segment, and a third segment, wherein the layout direction of the third segment is different from the layout direction of the first and second segments. The second metal layer includes a fourth segment, a fifth segment, and a sixth segment connected to the fifth segment, wherein the layout direction of the sixth segment is different from the layout direction of the fourth and fifth segments. The first set of vias connects the first and fourth segments, and they construct a first shunt winding. The second set of vias connects the second and fifth segments, and they construct a second shunt winding. The third and sixth segments construct a crossover region.
摘要翻译：螺旋电感器的堆叠结构包括第一金属层，第二金属层，第一组通孔和第二组通孔。第一金属层包括第一段，第二段和第三段，其中第三段的布局方向与第一段和第二段的布局方向不同。第二金属层包括第四段，第五段和连接到第五段的第六段，其中第六段的布局方向与第四段和第五段的布局方向不同。第一组通孔连接第一和第四段，并构成第一个分流绕组。第二组通孔连接第二和第五段，并且它们构成第二分流绕组。第三和第六段构成交叉区域。

9. 发明申请

US20080251841A1 MOS TRANSISTOR AND MANUFACTURING METHOD THEREOF 有权
标题翻译： MOS晶体管及其制造方法
公开(公告)号：US20080251841A1
公开(公告)日：2008-10-16
申请号：US12056293
申请日：2008-03-27
申请人： Kai-Yi Huang , Ta-Hsun Yeh , Yuh-Sheng Jean
发明人： Kai-Yi Huang , Ta-Hsun Yeh , Yuh-Sheng Jean
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/66659
摘要： The structure of the MOS transistor provided in this invention has LDD (lightly doped drain) and halo doped regions removed from the source, the drain or both regions in the substrate for improved linearity range when operated as a voltage-controlled resistor. The removal of the LDD and halo doped regions is performed by simply modifying the standard mask of the MOS process using a logic operation layer with no extra mask required.
摘要翻译：在本发明中提供的MOS晶体管的结构具有从源极，漏极或衬底中的两个区域去除的LDD（轻掺杂漏极）和卤素掺杂区域，用于当作为压控电阻器工作时提高线性范围。通过简单地使用没有额外掩模的逻辑运算层来修改MOS工艺的标准掩模来执行LDD和光晕掺杂区的去除。

10. 发明申请

US20130267185A1 TRANSCEIVER HAVING AN ON-CHIP CO-TRANSFORMER 审中-公开
标题翻译：具有片上共变换器的收发器
公开(公告)号：US20130267185A1
公开(公告)日：2013-10-10
申请号：US13857922
申请日：2013-04-05
申请人： Yu-Hsin Chen , Kai-Yi Huang
发明人： Yu-Hsin Chen , Kai-Yi Huang
IPC分类号： H04B1/44
CPC分类号： H04B1/44
摘要： A transceiver formed on an integrated-circuit substrate is disclosed. The transceiver includes: a co-transformer comprising first, second and third windings which wrap each other but are separated from each other; a power amplifier coupled to the co-transformer; and a low-noise amplifier coupled to the co-transformer; wherein the co-transformer is configured for converting a first signal from the power amplifier into a second signal to be transmitted by an antenna when the transceiver is in its transmitter mode, and for converting a third signal from the antenna into a fourth signal to be outputted to the low-noise amplifier when the transceiver is in its receiver mode.
摘要翻译：公开了一种形成在集成电路基板上的收发器。收发器包括：共变压器，包括彼此包裹但彼此分离的第一，第二和第三绕组; 耦合到共变压器的功率放大器; 以及耦合到共变压器的低噪声放大器; 其中，所述共变压器被配置为当所述收发器处于其发射器模式时将来自所述功率放大器的第一信号转换为由天线发射的第二信号，并且用于将来自所述天线的第三信号转换为第四信号为当收发器处于接收器模式时，输出到低噪声放大器。

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