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1. 发明申请

WO9852217A3 METHOD OF FORMING A CHIP SCALE PACKAGE, AND A TOOL USED IN FORMING THE CHIP SCALE PACKAGE 审中-公开
标题翻译：形成芯片尺寸包装的方法和用于形成芯片尺寸包装的工具
公开(公告)号：WO9852217A3
公开(公告)日：1999-05-27
申请号：PCT/US9809477
申请日：1998-05-07
申请人： KULICKE & SOFFA IND INC
发明人： RAZON ELI , SEGGERN WALTER VON
IPC分类号： H01L21/607 , H01L23/31 , H01L21/60 , B23K11/30 , H01L23/498
CPC分类号： H01L24/85 , H01L23/3107 , H01L23/3114 , H01L24/45 , H01L24/48 , H01L24/78 , H01L24/94 , H01L2224/0401 , H01L2224/05599 , H01L2224/131 , H01L2224/45014 , H01L2224/45124 , H01L2224/45144 , H01L2224/48091 , H01L2224/48472 , H01L2224/48599 , H01L2224/48699 , H01L2224/78302 , H01L2224/78313 , H01L2224/78318 , H01L2224/85181 , H01L2224/85205 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01014 , H01L2924/01019 , H01L2924/01042 , H01L2924/01051 , H01L2924/01057 , H01L2924/01074 , H01L2924/01076 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/14 , H01L2924/15311 , H01L2924/00014 , H01L2924/00 , H01L2924/00012 , H01L2924/00015
摘要： A method of assembling a plurality of semiconductor chips is provided. A portion of a semiconductor wafer containing the plurality of chips is provided. Each of the plurality of chips has a contact pattern area including a pattern of contacts on a surface of the chip. A respective section of a dielectric interposer is assembled to each respective one of the plurality of chips individually, without detaching the plurality of chips from the portion of the semiconductor wafer. Each section of interposer has a plurality of bonding pads near an outer periphery of the section, so that each bonding pad lies near the contact pattern area of the corresponding one of the plurality of chips. Each bonding pad is wire bonded to a respective one of the contacts on the front surface of the corresponding one of the plurality of chips. The bonding step includes: (1) bonding one end of each wire to a respective bonding pad of the interposer using micro-resistant welding or ultrasonic bonding, and (2) bonding the other end of each wire to a respective contact of the chip using ultrasonic bonding. If a defective bond is detected, a wire may be removed and replaced by wire bonding. An encapsulant is applied to encapsulate the wires on each of the plurality of chips. The encapsulated chips are cut from the semiconductor wafer. Wires may be bonded at the corners of the chip, and need not be perpendicular to the sides of the chip.
摘要翻译：提供了组装多个半导体芯片的方法。提供包含多个芯片的半导体晶片的一部分。多个芯片中的每一个具有包括芯片表面上的接触图案的接触图形区域。电介质插入件的相应部分分别组装到多个芯片中的每个芯片上，而不从半导体晶片的部分分离多个芯片。插入件的每个部分在该部分的外周附近具有多个接合焊盘，使得每个接合焊盘位于多个芯片中对应的一个芯片的接触图案区域附近。每个接合焊盘被引线接合到多个芯片中对应的一个芯片的前表面上的相应的一个触点。接合步骤包括：（1）使用微电阻焊接或超声波接合将每根导线的一端接合到插入件的相应接合焊盘，以及（2）将每个导线的另一端结合到芯片的相应接触件，使用超声波接合。如果检测到有缺陷的接合，则可以去除导线并用引线接合代替。应用密封剂将电线封装在多个芯片中的每一个上。封装的芯片从半导体晶片切割。电线可以结合在芯片的角部，并且不需要垂直于芯片的两侧。

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