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1. 发明申请

WO2005117073A2 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURE 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2005117073A2
公开(公告)日：2005-12-08
申请号：PCT/IB2005/051715
申请日：2005-05-25
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , SONSKY, Jan , HIJZEN, Erwin, A. , IN 'T ZANDT, Michael, A., A.
发明人： SONSKY, Jan , HIJZEN, Erwin, A. , IN 'T ZANDT, Michael, A., A.
IPC分类号： H01L21/00
CPC分类号： H01L21/76264 , H01L21/76895 , H01L29/0653 , H01L29/404 , H01L29/407 , H01L29/42368 , H01L29/7816 , H01L29/7824 , H01L29/7835
摘要： A semiconductor device is formed with a lower field plate (32) and optional lateral field plates (34) around semiconductor (20) in which devices are formed, for example power FETs or other transistor or diode types. The semiconductor device is manufactured by forming trenches with insulated sidewalls, etching cavities (26) at the base of the trenches which join up and then filling the trenches with conductor (30).
摘要翻译：半导体器件形成有在其中形成器件的半导体（20）周围的下部场板（32）和可选的横向场板（34），例如功率FET或其它晶体管或二极管类型。通过形成具有绝缘侧壁的沟槽来制造半导体器件，在沟槽的基部处的蚀刻腔（26），其连接起来，然后用导体（30）填充沟槽。

2. 发明申请

WO2006117734A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OBTAINED BY MEANS OF SAID METHOD 审中-公开
标题翻译：制造半导体器件的方法和通过方法获得的半导体器件
公开(公告)号：WO2006117734A1
公开(公告)日：2006-11-09
申请号：PCT/IB2006/051329
申请日：2006-04-28
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , MEUNIER-BEILLARD, Philippe , SONSKY, Jan
发明人： MEUNIER-BEILLARD, Philippe , SONSKY, Jan
IPC分类号： H01L21/762
CPC分类号： H01L29/1054 , H01L21/76264 , H01L29/66575 , H01L29/78
摘要： The invention relates to a method of manufacturing a semiconductor device (10) comprising a substrate (11) and a semiconductor body (12) in which at least one semiconductor element (1) is formed, wherein on the substrate (11) a semiconductor layer (2) is formed comprising a mixed crystal of silicon and germanium, further called the silicon- germanium layer (2) and having a lower surface close to the substrate (11) and an upper surface more remote from the substrate (11), and wherein the silicon-germanium layer (2) is subjected to an oxidizing treatment at a surface of the silicon-germanium layer (2) while the other surface of the silicon-germanium layer (2) is protected against the oxidizing treatment by a blocking layer (3). According to the invention, the blocking layer (3) is formed on the upper surface of the silicon-germanium layer (2), a cavity (5) is formed in the semiconductor body below the silicon-germanium layer (2) and the lower surface of the silicon-germanium layer (2) is subjected to the oxidizing treatment through the cavity (2). In this way, a device 10 may be obtained in which the surface of the silicon-germanium layer (2) after the oxidizing treatment does not suffer from roughening and/or germanium pile up. This enables e.g. to manufacture in particular a MOSFET on top of or in the silicon-germanium layer (2) with excellent properties and high yield.
摘要翻译：本发明涉及一种制造半导体器件（10）的方法，该半导体器件（10）包括其中形成有至少一个半导体元件（1）的衬底（11）和半导体本体（12），其中在衬底（11）上形成半导体层（2）形成，其包含硅和锗的混合晶体，进一步称为硅 - 锗层（2），并且具有靠近基板（11）的下表面和更远离基板（11）的上表面，以及其中所述硅 - 锗层（2）在所述硅 - 锗层（2）的表面进行氧化处理，同时所述硅 - 锗层（2）的另一个表面被阻挡层（3）。根据本发明，在硅 - 锗层（2）的上表面上形成阻挡层（3），在硅 - 锗层（2）下面的半导体本体中形成空腔（5），下层硅 - 锗层（2）的表面通过空腔（2）进行氧化处理。以这种方式，可以获得其中氧化处理后的硅 - 锗层（2）的表面不会遭受粗糙化和/或锗堆积的器件10。这使得例如。特别是在硅 - 锗层（2）之上或之上制造具有优异性能和高产率的MOSFET。

3. 发明申请

WO2007105155A1 METHOD OF MANUFACTURING A BIPOLAR TRANSISTOR 审中-公开
标题翻译：制造双极晶体管的方法
公开(公告)号：WO2007105155A1
公开(公告)日：2007-09-20
申请号：PCT/IB2007/050786
申请日：2007-03-09
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , INTERUNIVERSITAIR MICROELEKTRONICA CENTRUM VZW , VAN NOORT, Wibo, D. , SONSKY, Jan , PIONTEK, Andreas, M.
发明人： VAN NOORT, Wibo, D. , SONSKY, Jan , PIONTEK, Andreas, M.
IPC分类号： H01L21/331 , H01L29/08 , H01L29/732
CPC分类号： H01L29/7378 , H01L29/0826 , H01L29/66242 , H01L29/66272 , H01L29/7322 , H01L29/7371
摘要： The invention relates to a method of manufacturing a bipolar transistor on a semiconductor substrate (11) which is provided with a first, a second and a third layer (1,2,3) of a first, second and third semiconductor material respectively, all of a first conductivity type. A first portion of the second layer (2) is transformed into a buried isolation region (15) comprising a first electrically insulating material. A first semiconductor region (6) of the first conductivity type, comprising, for example, a collector region, is formed from a second portion of the second layer (2) adjoining the buried isolation region (15) and a portion of the first layer (1) adjoining the second portion of the second layer (2). Then a base region (7) is formed on the buried isolation region (15) and on the first semiconductor region (6) by transforming the third layer (3) into a second conductivity type, which is opposite to the first conductivity type. Thereafter a second semiconductor region (8) of the first conductivity type, comprising, for example, an emitter region, is formed on a part of the base region (7). This method provides for the formation of a bipolar transistor with an advantageous decrease of the extrinsic collector to base region (6,7) capacitance by the fact that the value of this capacitance is mainly determined by the buried isolation region (15) which has a substantially lower dielectric constant than that of the collector to base region (6,7) junction.
摘要翻译：本发明涉及在半导体衬底（11）上制造双极晶体管的方法，该半导体衬底分别具有第一，第二和第三半导体材料的第一层，第二层和第三层（1,2,3），全部的第一导电类型。第二层（2）的第一部分被转换成包括第一电绝缘材料的掩埋隔离区域（15）。第一导电类型的第一半导体区域（6）由包括例如集电极区域的第一半导体区域（6）由毗邻掩埋隔离区域（15）的第二层（2）的第二部分和第一层（1）邻接第二层（2）的第二部分。然后，通过将第三层（3）转换成与第一导电类型相反的第二导电类型，在掩埋隔离区（15）和第一半导体区（6）上形成基极区（7）。此后，在基极区域（7）的一部分上形成第一导电类型的第二半导体区域（8），包括例如发射极区域。该方法通过以下事实提供形成双极晶体管，该双极晶体管有利地减少了外部集电极到基极区域（6,7）的电容，因为该电容的值主要由掩埋隔离区域（15）确定，该掩埋隔离区域基本上低于集电极到基极区（6,7）结的介电常数。

4. 发明申请

WO2007110832A3 TRENCH-GATE SEMICONDUCTOR DEVICE AND METHOD OF FABRICATION THEREOF 审中-公开
公开(公告)号：WO2007110832A3
公开(公告)日：2007-10-04
申请号：PCT/IB2007/051043
申请日：2007-03-26
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , SONSKY, Jan , KOOPS, Gerhard , VAN DALEN, Rob
发明人： SONSKY, Jan , KOOPS, Gerhard , VAN DALEN, Rob
IPC分类号： H01L29/78 , H01L29/40 , H01L21/336 , H01L29/06 , H01L29/423 , H01L29/08
摘要： A power semiconductor device comprises a conductive gate, provided in an upper part of a trench (11) formed in a semiconductor substrate (1), and a conductive field plate, extending in the trench, parallel to the conductive gate, to a depth greater that the conductive gate. The field plate is insulated from the walls and bottom of the trench by a field plate insulating layer that is thicker than the gate insulating layer. In one embodiment, the field plate is insulated within the trench from the gate. Impurity doped regions of a first conductivity type are provided at the surface of the substrate adjacent the first and second sides of the trench and form source and drain regions, and a body region (7) of second conductivity type is formed under the source region on the first side of the trench (11). The conductive gate is insulated from the body region (7) by a gate insulating layer. A method of making the semiconductor device is compatible with conventional CMOS processes.

5. 发明申请

WO2007000690A1 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OBTAINED WITH SUCH A METHOD 审中-公开
标题翻译：制造半导体器件的方法和采用这种方法获得的半导体器件
公开(公告)号：WO2007000690A1
公开(公告)日：2007-01-04
申请号：PCT/IB2006/052013
申请日：2006-06-21
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , SONSKY, Jan , MEUNIER-BEILLARD, Philippe , VAN DALEN, Rob , WILLEMSEN, Marnix, B.
发明人： SONSKY, Jan , MEUNIER-BEILLARD, Philippe , VAN DALEN, Rob , WILLEMSEN, Marnix, B.
IPC分类号： H01L29/786 , H01L27/06 , H01L29/423
CPC分类号： H01L29/78696 , B82Y20/00 , H01L29/42384 , H01L29/78645 , H01L31/035236 , H01L31/1812 , Y02E10/50
摘要： Method of manufacturing a semiconductor device and semiconductor device obtained with such a method. The invention relates to a method of manufacturing a semiconductor device (10) with a substrate (11) and a semiconductor body (12) of silicon which is provided with at least one semiconductor element, wherein in the semiconductor body (12) a semiconductor region (1) of a material comprising a mixed crystal of silicon and another group IV element is formed which semiconductor region (1,111) is buried by a silicon layer (2). According to the invention on a surface of the semiconductor body (12) a mask (3) comprising an opening (4) is provided, the semiconductor region (1,111) of the material comprising a mixed crystal of silicon and another group IV element is selectively deposited in the opening (4,44), the mask (3,33) is at least partly removed, and subsequently the silicon layer (2) is deposited uniformly on the surface of the semiconductor body (12). In this way various high-quality devices can be obtained. The semiconductor region (1,111) preferably comprises SiGe and may form part of the device (10) or may be sacrificed in order to form an insulating or conducting region in the device (10).
摘要翻译：利用这种方法制造半导体器件和半导体器件的制造方法。本发明涉及一种制造半导体器件（10）的方法，所述半导体器件（10）具有衬底（11）和设置有至少一个半导体元件的硅半导体本体（12），其中半导体本体（12）中的半导体区域形成包含硅和另一IV族元素的混晶的材料（1），该半导体区（1,111）被硅层（2）掩埋。根据本发明，在半导体本体（12）的表面上设置包括开口（4）的掩模（3），包括硅和另一IV族元素的混晶的材料的半导体区域（1,111）是选择性地沉积在开口（4,44）中，掩模（3,33）被至少部分去除，随后硅层（2）均匀地沉积在半导体本体（12）的表面上。以这种方式可以获得各种高质量的装置。半导体区域（1,111）优选地包括SiGe并且可以形成器件（10）的一部分，或者可以被牺牲以在器件（10）中形成绝缘或导电区域。

6. 发明申请

WO2008048694A2 GEIGER MODE AVALANCHE PHOTODIODE 审中-公开
公开(公告)号：WO2008048694A2
公开(公告)日：2008-04-24
申请号：PCT/US2007/060621
申请日：2007-01-17
申请人： KONINKLIJKE PHILIPS ELECTRONICS, N.V. , U.S. PHILIPS CORPORATION , AGARWAL, Prabhat , SONSKY, Jan , KAUPPINEN, Lasse, Juhana
发明人： AGARWAL, Prabhat , SONSKY, Jan , KAUPPINEN, Lasse, Juhana
CPC分类号： H01L27/14658 , H01L27/1464 , H01L27/14683 , H01L31/107
摘要： A avalanche mode photodiode array (102) is fabricated using a silicon on insulator wafer and substrate transfer process. The array includes a plurality of photodiodes (100). The photodiodes (100) include an electrically insulative layer (206), a depletion region (204), and first (208) and second (210) doped regions. An interconnection layer (212) includes electrodes (214, 216) which provides electrical connections to the photodiodes. The photodiode array (102) is carried by a handle wafer (217).
摘要翻译：使用绝缘体上硅晶片和衬底转移工艺制造雪崩模式光电二极管阵列（102）。阵列包括多个光电二极管（100）。光电二极管（100）包括电绝缘层（206），耗尽区（204）以及第一（208）和第二（210）掺杂区。互连层（212）包括提供到光电二极管的电连接的电极（214,216）。光电二极管阵列（102）由处理晶片（217）承载。

7. 发明申请

WO2006082568A3 METHOD OF MANUFACTURING A LATERAL SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：WO2006082568A3
公开(公告)日：2006-08-10
申请号：PCT/IB2006/050377
申请日：2006-02-06
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , SONSKY, Jan
发明人： SONSKY, Jan
IPC分类号： H01L21/336 , H01L29/78 , H01L29/06 , H01L29/40 , H01L29/08 , H01L21/306 , H01L21/3065 , H01L21/265 , H01L29/423 , H01L29/417
摘要： A method of manufacturing a lateral semiconductor device comprising a semiconductor body (2) having top and bottom major surfaces (2a, 2b), the body including a drain drift region (6a) of a first conductivity type. The method includes the steps of forming a vertical access trench (20) in the semiconductor body which extends from its top major surface (2a) and has a bottom and sidewalls; forming at least one horizontal trench (16) extending within the drain drift region (6a) which extends from a sidewall of the vertical trench (20) in the finished device; and forming a RESURF inducing structure (22) extending within the at least one horizontal trench. In this way, vertically separated lateral RESURF inducing structures are formed without encountering problems associated with known techniques for forming RESURF structures.

8. 发明申请

WO2007029178A2 METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE WITH AN ISOLATION REGION AND A DEVICE MANUFACTURED BY THE METHOD 审中-公开
标题翻译：制造具有隔离区的半导体器件的方法和由该方法制造的器件
公开(公告)号：WO2007029178A2
公开(公告)日：2007-03-15
申请号：PCT/IB2006/053118
申请日：2006-09-05
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , SONSKY, Jan
发明人： SONSKY, Jan
IPC分类号： H01L21/762
CPC分类号： H01L29/0649 , H01L21/762 , H01L21/76224 , H01L21/76264 , H01L21/76283 , H01L27/1207 , H01L29/267
摘要： A method of manufacturing a semiconductor device includes forming trench isolation structures, exposing some of the trench isolation structures 28 to leave others 30 masked, and then selectively etching a buried layer to form a cavity 32 under an active device region 34. The active device region 34 is supported by support regions in the exposed trenches 28. The buried layer may be a SiGe layer on a Si substrate.
摘要翻译：一种制造半导体器件的方法包括形成沟槽隔离结构，暴露一些沟槽隔离结构28以使其他30被掩蔽，然后选择性地刻蚀掩埋层以在活性物质下形成空腔32 器件区域34.有源器件区域34由暴露的沟槽28中的支撑区域支撑。掩埋层可以是Si衬底上的SiGe层。

9. 发明申请

WO2006109265A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURE 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2006109265A1
公开(公告)日：2006-10-19
申请号：PCT/IB2006/051137
申请日：2006-04-12
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , SONSKY, Jan
发明人： SONSKY, Jan
IPC分类号： H01L21/762
CPC分类号： H01L29/7824 , H01L21/76264 , H01L29/0653
摘要： A semiconductor device is formed by forming a second trench 120 at the base of a first trench 18, depositing insulator 124 at the base of the second trench 120, and then etching cavities 26 laterally from the sidewalls of the second trench, but not the base which is protected by insulator 124. The invention may in particular be used to form semiconductor devices with cavities under the active components, or by filling the cavities to form silicon on insulator or silicon on conductor devices.
摘要翻译：半导体器件通过在第一沟槽18的底部形成第二沟槽120，在第二沟槽120的底部沉积绝缘体124，然后从第二沟槽的侧壁横向蚀刻腔26而不是基底其由绝缘体124保护。本发明可以特别地用于形成具有在有源部件下方的空腔的半导体器件，或者通过填充空腔以在导体器件上形成绝缘体上的硅或硅。

10. 发明申请

WO2010046794A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUCH A DEVICE 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2010046794A1
公开(公告)日：2010-04-29
申请号：PCT/IB2009/054360
申请日：2009-10-06
申请人： NXP B.V. , SONSKY, Jan , HERINGA, Anco
发明人： SONSKY, Jan , HERINGA, Anco
IPC分类号： H01L29/78 , H01L29/06 , H01L29/423
CPC分类号： H01L29/7835 , H01L29/0653 , H01L29/0692 , H01L29/42364 , H01L29/4238 , H01L29/66659
摘要： A semiconductor device eg. a MOSFET (1) comprising a substrate (40) including a first region (18) and a second region (16) of a first conductivity type and a third region (42) between the first and second regions of a type opposite to the first conductivity type, and being covered by a dielectric layer (20), a plurality of trenches (12) laterally extending between the third and second region, said trenches being filled with an insulating material, and being separated by active stripes (14) comprising a doping profile having a depth not exceeding the depth of the trenches wherein each trench terminates before reaching the dielectric layer (20),namely is separated from the third region by a substrate portion (26) such that the respective boundaries between the substrate portions and the trenches are not covered by the dielectric layer. A method for manufacturing such a semiconductor device is also disclosed.
摘要翻译：半导体器件例如包括基板（40）的MOSFET（1），所述基板（40）包括第一导电类型的第一区域（18）和第二区域（16）和位于第一和第二区域之间的第三区域导电类型，并被介电层（20）覆盖，在第三和第二区域之间横向延伸的多个沟槽（12），所述沟槽填充有绝缘材料，并且由有源条纹（14）分离，包括掺杂分布具有不超过沟槽深度的深度，其中每个沟槽在到达电介质层（20）之前终止，即通过衬底部分（26）从第三区域分离，使得衬底部分和沟槽不被电介质层覆盖。还公开了一种用于制造这种半导体器件的方法。

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