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1. 发明申请

WO2004112136A1 ELECTRONIC DEVICE 审中-公开
标题翻译：电子设备
公开(公告)号：WO2004112136A1
公开(公告)日：2004-12-23
申请号：PCT/IB2004/050864
申请日：2004-06-08
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , DEKKER, Ronald , HURKX, Godefridus, A., M. , JANSMAN, Andreas, B., M. , KEMMEREN, Antonius, L., A., M. , BERGERVOET, Jozef, R., M. , DE JONG, Gerben, W. , STEK, Aalbert
发明人： DEKKER, Ronald , HURKX, Godefridus, A., M. , JANSMAN, Andreas, B., M. , KEMMEREN, Antonius, L., A., M. , BERGERVOET, Jozef, R., M. , DE JONG, Gerben, W. , STEK, Aalbert
IPC分类号： H01L25/065
CPC分类号： H01L21/6835 , H01L23/5389 , H01L23/66 , H01L24/24 , H01L24/82 , H01L25/0652 , H01L29/0657 , H01L2221/68377 , H01L2224/16 , H01L2224/16227 , H01L2224/24137 , H01L2224/24147 , H01L2224/24227 , H01L2224/32145 , H01L2224/32225 , H01L2224/73204 , H01L2224/73267 , H01L2224/92244 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10329 , H01L2924/12032 , H01L2924/12043 , H01L2924/1305 , H01L2924/14 , H01L2924/15153 , H01L2924/15165 , H01L2924/15192 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/00
摘要： The electronic device of the invention comprises a substrate with semiconductor elements, in which substrate one or more cavities are provided. Further active devices are provided in the cavities and coupled to the semiconductor elements through one common multilayer interconnect structure.
摘要翻译：本发明的电子器件包括具有半导体元件的衬底，其中提供有一个或多个腔体。另外的有源器件设置在空腔中，并通过一个共同的多层互连结构耦合到半导体元件。

2. 发明申请

WO2004112134A1 PACKAGE FOR A HIGH-FREQUENCY ELECTRONIC DEVICE 审中-公开
标题翻译：高频电子设备的封装
公开(公告)号：WO2004112134A1
公开(公告)日：2004-12-23
申请号：PCT/IB2004/050863
申请日：2004-06-08
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , JANSMAN, Andreas, B., M. , DEKKER, Ronald , HURKX, Godefridus, A., M. , VAN NOORT, Wibo, D. , KEMMEREN, Antonius, L., A., M.
发明人： JANSMAN, Andreas, B., M. , DEKKER, Ronald , HURKX, Godefridus, A., M. , VAN NOORT, Wibo, D. , KEMMEREN, Antonius, L., A., M.
IPC分类号： H01L23/538
CPC分类号： H01L24/82 , H01L23/36 , H01L23/5389 , H01L23/66 , H01L24/24 , H01L2223/6644 , H01L2224/16225 , H01L2224/24137 , H01L2224/24227 , H01L2224/32225 , H01L2224/73204 , H01L2224/73267 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01024 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01058 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/09701 , H01L2924/10329 , H01L2924/12041 , H01L2924/12042 , H01L2924/12043 , H01L2924/1306 , H01L2924/14 , H01L2924/1461 , H01L2924/15153 , H01L2924/15165 , H01L2924/15192 , H01L2924/18162 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H01L2924/00012 , H01L2924/00
摘要： The electronic device comprises a substrate (1) with a cavity (6) in which an active device (8) is present. On the first side (2) of the substrate an interconnect structure (17) extends over the cavity and the substrate. On the second side (3) of the substrate to which the cavity extends, a heat sink (23) is available. The device is particularly suitable for use at high frequencies, for instance higher than 2 GHz and under conditions of high dissipation.
摘要翻译：电子设备包括具有空腔（6）的衬底（1），其中存在有源器件（8）。在衬底的第一侧（2）上，互连结构（17）在空腔和衬底上延伸。在空腔延伸的基板的第二面（3）上，散热片（23）是可用的。该器件特别适用于高频率，例如高于2GHz和高耗散条件下使用。

3. 发明申请

WO2006072842A1 DIELECTRIC ANTIFUSE FOR ELECTRO-THERMALLY PROGRAMMABLE DEVICE 审中-公开
标题翻译：用于电热可编程器件的电介质抗体
公开(公告)号：WO2006072842A1
公开(公告)日：2006-07-13
申请号：PCT/IB2005/053898
申请日：2005-11-24
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , BOEVE, Hans, M., B. , ATTENBOROUGH, Karen , HURKX, Godefridus, A., M. , AGARWAL, Prabhat , HUIZING, Hendrik G., A. , IN 'T ZANDT, Michael, A., A. , SLOTBOOM, Jan, W.
发明人： BOEVE, Hans, M., B. , ATTENBOROUGH, Karen , HURKX, Godefridus, A., M. , AGARWAL, Prabhat , HUIZING, Hendrik G., A. , IN 'T ZANDT, Michael, A., A. , SLOTBOOM, Jan, W.
IPC分类号： H01L45/00 , H01L27/24
CPC分类号： G11C11/5678 , G11C13/0004 , H01L27/2409 , H01L45/06 , H01L45/1233 , H01L45/1246 , H01L45/144
摘要： A thermally programmable memory has a programmable element (20) of a thermally programmable resistance preferably of phase change material, material and a blown antifuse (80) located adjacent to the programmable material. Such a blown antiiuse has a dielectric layer (100) surrounded by conductive layers (90,110) to enable a brief high voltage to be applied across the dielectric to blow a small hole in the dielectric during manufacture to form a small conductive path which can be used as a tiny electrical heater for programming the material. Due to the current confinement by the hole, the volume of the material that must be heated in order to switch to a highly- resistive state is very small. As a result the programming power can be low.
摘要翻译：热可编程存储器具有可编程电阻的可编程电阻（20），优选地是相变材料的材料和位于可编程材料附近的吹制反熔丝（80）。这种吹制的抗氧化剂具有由导电层（90,110）包围的电介质层（100），以使得能够在制造期间在电介质两端施加短暂的高电压以吹出电介质中的小孔，以形成可以使用的小导电路径作为用于编程材料的微小电加热器。由于孔的电流限制，必须加热以切换到高阻态的材料的体积非常小。因此，编程功率可能很低。

4. 发明申请

WO2007036861A2 SEMICONDUCTOR DEVICE WITH A BIPOLAR TRANSISTOR AND METHOD OF MANUFACTURING SUCH A DEVICE 审中-公开
标题翻译：具有双极晶体管的半导体器件及制造这种器件的方法
公开(公告)号：WO2007036861A2
公开(公告)日：2007-04-05
申请号：PCT/IB2006/053446
申请日：2006-09-22
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , MEUNIER-BEILLARD, Philippe , DUFFY, Raymond, J. , AGARWAL, Prabhat , HURKX, Godefridus, A., M.
发明人： MEUNIER-BEILLARD, Philippe , DUFFY, Raymond, J. , AGARWAL, Prabhat , HURKX, Godefridus, A., M.
CPC分类号： H01L29/7378 , H01L29/0817 , H01L29/66242
摘要： The invention relates to a semiconductor device (10) with a substrate and a semiconductor body of silicon comprising a bipolar transistor with an emitter region (1), a base region (2) and a collector region (3) which are respectively of the N-type conductivity, the P-type conductivity and the N-type conductivity by the provision of suitable doping atoms, wherein the base region (2) comprises a mixed crystal of silicon and germanium, the base region (2) is separated from the emitter region by an intermediate region (22) of silicon having a doping concentration which is lower than the doping concentration of the emitter region (1) and with a thickness smaller than the thickness of the emitter region (1) and the emitter region (1) comprises a sub-region comprising a mixed crystal of silicon and germanium which is positioned at the side of emitter region (1) remote from the intermediate region (22). According to the invention, the sub-region comprising the mixed crystal of silicon and germanium extend substantially through the whole emitter region (1) up to the interlace with the intermediate region (22) and the doping atoms of the emitter region (1) are arsenic atoms. Such a device has a very steep n-type doping profile (50) and a very steep p- type doping profile (20) at or within the intermediate region (22) and thus excellent high- frequency behavior with a high cut-off frequency (fr). Preferably the emitter region (1) is doped with an arsenic implantation (I) in its upper half, the final doping profile being formed after an RTA. The invention also comprises a method of manufacturing a device (10) according to the invention.
摘要翻译：本发明涉及一种具有衬底和硅半导体主体的半导体器件（10），该半导体主体包括具有发射极区（1），基极区（2）和集电极区（ 3），其通过提供合适的掺杂原子分别具有N型导电性，P型导电性和N型导电性，其中基极区（2）包括硅和锗的混合晶体，基极区（2）通过掺杂浓度低于发射极区域（1）的掺杂浓度并且厚度小于发射极区域（1）的厚度的中间区域（22）与发射极区域分开）并且发射极区（1）包括包含位于发射极区（1）的远离中间区（22）侧的硅和锗的混合晶体的子区。根据本发明，包含硅和锗的混合晶体的子区域基本上延伸穿过整个发射极区域（1），直到与中间区域（22）交织并且发射极区域（1）的掺杂原子是砷原子。这种器件在中间区域（22）处或内部具有非常陡峭的n型掺杂分布（50）和非常陡峭的p型掺杂分布（20），因此具有高截止频率（FR）。优选地，发射极区（1）在其上半部分掺杂有砷注入（I），最终的掺杂分布在RTA之后形成。本发明还包括制造根据本发明的装置（10）的方法。

5. 发明申请

WO2006011069A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2006011069A1
公开(公告)日：2006-02-02
申请号：PCT/IB2005/052263
申请日：2005-07-07
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , HURKX, Godefridus, A., M. , AGARWAL, Prabhat , BALKENENDE, Abraham, R. , MAGNEE, Petrus, H., C. , WAGEMANS, Melanie, M., H. , BAKKERS, Erik, P., A., M. , HIJZEN, Erwin
发明人： HURKX, Godefridus, A., M. , AGARWAL, Prabhat , BALKENENDE, Abraham, R. , MAGNEE, Petrus, H., C. , WAGEMANS, Melanie, M., H. , BAKKERS, Erik, P., A., M. , HIJZEN, Erwin
IPC分类号： H01L29/08
CPC分类号： H01L29/0804 , B82Y10/00 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/0821 , H01L29/7378 , Y10S977/936
摘要： The invention relates to a semiconductor device (10) with a semiconductor body (12) comprising a bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type, and the first conductivity type. One of the emitter or collector regions (1, 3) comprises a nanowire (30). The base region (2) has been formed from a layer (20) at the surface of the semiconductor body (12); the other one (3, 1) of the emitter or collector regions (1, 3) has been formed in the semiconductor body (12) below the base region (2). The emitter or collector region (1, 3) comprising the nanowire (30) has been provided on the surface of the semiconductor body (12) such that its longitudinal axis extends perpendicularly to the surface.
摘要翻译：本发明涉及具有半导体本体（12）的半导体器件（10），该半导体器件（12）包括分别具有第一导电类型的发射极区，基极区和集电极区（1,2,3）的双极晶体管，与第一导电类型相反的第二导电类型和第一导电类型。发射极或集电极区域（1,3）中的一个包括纳米线（30）。基底区域（2）由半导体本体（12）表面的层（20）形成; 发射极或集电极区域（1,3）中的另一个（3,1）已经形成在基极区域（2）下方的半导体本体（12）中。包括纳米线（30）的发射极或集电极区域（1,3）已经设置在半导体本体（12）的表面上，使得其纵向轴线垂直于该表面延伸。

6. 发明申请

WO2004081687A1 CURRENT MIRROR 审中-公开
标题翻译：目前的镜子
公开(公告)号：WO2004081687A1
公开(公告)日：2004-09-23
申请号：PCT/IB2004/050169
申请日：2004-03-01
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , VEENSTRA, Hugo , HURKX, Godefridus, A., M. , BREKELMANS, Johannes, H., A. , VAN GOOR, Dave, W.
发明人： VEENSTRA, Hugo , HURKX, Godefridus, A., M. , BREKELMANS, Johannes, H., A. , VAN GOOR, Dave, W.
IPC分类号： G05F3/26
CPC分类号： G05F3/265
摘要： The present invention relates to Current mirror for generating a constant mirror ratio, comprising an output transistor (T ou t) having a base, an emitter and a collector, wherein a current flowing through the collector of said output transistor (T out ) constitutes an output current (l out ) of said current mirror and the collector of said output transistor (T out ) is connectable to an output circuit, a buffer transistor having a base, an emitter and a collector, wherein the emitter of the buffer transistor is connected to the base of the output transistor, a buffer current source for providing a fixed buffer current, wherein said buffer current source is connected to the collector of the buffer transistor, and a buffer base voltage control means having an input connected to the base of the output transistor and an output connected to the base of the buffer transistor, wherein the base voltage control means is adapted to controlling a voltage at the base of the buffer transistor in response to a current at the input of the buffer base voltage control means.
摘要翻译：本发明涉及用于产生恒定镜面比例的电流镜，其包括具有基极，发射极和集电极的输出晶体管（Tout），其中流过所述输出晶体管（Tout）的集电极的电流构成输出电流（所述电流镜的反射镜和所述输出晶体管（Tout）的集电极可连接到输出电路，具有基极，发射极和集电极的缓冲晶体管，其中所述缓冲晶体管的发射极连接到所述输出晶体管的基极输出晶体管，用于提供固定缓冲电流的缓冲电流源，其中所述缓冲电流源连接到缓冲晶体管的集电极，以及缓冲器基极电压控制装置，其具有连接到输出晶体管的基极的输入端和输出端连接到缓冲晶体管的基极，其中基极电压控制装置适于响应于控制缓冲晶体管的基极处的电压到缓冲器基极电压控制装置的输入端的电流。

7. 发明申请

WO2007057802A1 METAL-BASE NANOWIRE TRANSISTOR 审中-公开
标题翻译：金属基纳米晶体管
公开(公告)号：WO2007057802A1
公开(公告)日：2007-05-24
申请号：PCT/IB2006/053995
申请日：2006-10-29
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , AGARWAL, Prabhat , HURKX, Godefridus, A., M.
发明人： AGARWAL, Prabhat , HURKX, Godefridus, A., M.
IPC分类号： H01L29/76 , H01L29/06
CPC分类号： H01L29/7606 , B82Y10/00 , H01L29/0665 , H01L29/0673 , Y10S977/936
摘要： A metal-base transistor is suggested. The transistor comprises a first and a second electrode (2, 6) and base electrode (6) to control current flow between the first and second electrode. The first electrode (2) is made from a semiconduction material. The base electrode (3) is a metal layer deposited on top of the semiconducting material forming the first electrode. According the invention the second electrode is formed by a semiconducting nanowire (6) being in electrical contact with the base electrode (3).
摘要翻译：建议使用金属晶体管。晶体管包括用于控制第一和第二电极之间的电流的第一和第二电极（2,6）和基极（6）。第一电极（2）由半导体材料制成。基极（3）是沉积在形成第一电极的半导体材料的顶部上的金属层。根据本发明，第二电极由与基极（3）电接触的半导体纳米线（6）形成。

8. 发明申请

WO2006011073A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2006011073A1
公开(公告)日：2006-02-02
申请号：PCT/IB2005/052267
申请日：2005-07-07
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , HURKX, Godefridus, A., M. , AGARWAL, Prabhat , HIJZEN, Erwin , HUETING, Raymond, J. E.
发明人： HURKX, Godefridus, A., M. , AGARWAL, Prabhat , HIJZEN, Erwin , HUETING, Raymond, J. E.
IPC分类号： H01L29/08
CPC分类号： H01L29/0821 , B82Y10/00 , H01L29/06 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/08 , H01L29/423 , H01L29/42304 , H01L29/66242 , H01L29/737 , H01L29/7378
摘要： The invention relates to a semiconductor device (10) with a substrate (11) and a semiconductor body (12) comprising a vertical bipolar transistor with an emitter region, a base region and a collector region (1, 2, 3) of, respectively, a first conductivity type, a second conductivity type opposite to the first conductivity type and the first conductivity type, wherein the collector region (3) comprises a first sub-region (3A) bordering the base region (2) and a second sub-region (3B) bordering the first sub-region (3A) which has a lower doping concentration than the second sub-region (3B), and the transistor is provided with a gate electrode (5) which laterally borders the first sub-region (3A) and by means of which the first sub-region (3A) may be depleted. According to the invention the collector region (3) borders the surface of the semiconductor body (12), while the emitter region (1) is recessed in the semiconductor body (12), and the collector region (3) forms part of a mesa structure (6) formed at the surface of the semiconductor body (12). Such a device (10) has very favorable properties at high frequencies and high voltages and, moreover, is easy to manufacture. In a preferred embodiment the collector (3) comprises a nanowire (30) forming the mesa structure (6).
摘要翻译：本发明涉及一种具有衬底（11）和半导体本体（12）的半导体器件（10），该半导体器件包括分别具有发射极区，基极区和集电极区（1,2,3）的垂直双极晶体管，第一导电类型，与第一导电类型和第一导电类型相反的第二导电类型，其中集电极区域（3）包括与基极区域（2）接壤的第一子区域（3A）与第二子区域（3A）接合的第一子区域（3A）的区域（3B），其具有比第二子区域（3B）低的掺杂浓度，并且晶体管设置有与第一子区域横向相邻的栅电极（5） 3A），并且借助于此可以使第一子区域（3A）耗尽。根据本发明，集电极区域（3）与半导体本体（12）的表面相接触，而发射极区域（1）凹入半导体本体（12）中，并且集电极区域（3）形成台面的一部分结构（6）形成在半导体本体（12）的表面。这种装置（10）在高频和高电压下具有非常有利的特性，而且易于制造。在优选实施例中，收集器（3）包括形成台面结构（6）的纳米线（30）。

9. 发明申请

WO2005064687A1 SEMICONDUCTOR DEVICE COMPRISING A PN-HETEROJUNCTION 审中-公开
标题翻译：包含PN异常的半导体器件
公开(公告)号：WO2005064687A1
公开(公告)日：2005-07-14
申请号：PCT/IB2004/052864
申请日：2004-12-20
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , HURKX, Godefridus, A., M. , AGARWAL, Prabhat , BALKENENDE, Abraham, R. , MAGNEE, Petrus, H., C. , WAGEMANS, Melanie, M., H. , BAKKERS, Erik, P., A., M. , HIJZEN, Erwin, A.
发明人： HURKX, Godefridus, A., M. , AGARWAL, Prabhat , BALKENENDE, Abraham, R. , MAGNEE, Petrus, H., C. , WAGEMANS, Melanie, M., H. , BAKKERS, Erik, P., A., M. , HIJZEN, Erwin, A.
IPC分类号： H01L29/861
CPC分类号： H01L29/8611 , B82Y10/00 , H01L29/045 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/2003 , H01L29/66136 , H01L29/66219 , H01L2924/0002 , H01L2924/00
摘要： An electric device is disclosed comprising a pn-heterojunction (4) formed by a nanowire (3) of 111-V semiconductor material and a semiconductor body (1) comprising a group IV semiconductor material. The nanowire (3) is positioned in direct contact with the surface (2) of the semiconductor body (1) and has a first conductivity type, the semiconductor body (1) has a second conductivity type opposite to the first conductivity type, the nanowire (3) forming with the semiconductor body (1) a pn-heterojunction (4). The nanowire of III-V semiconductor material can be used as a diffusion source (5) of dopant atoms into the semiconductor body. The diffused group III atoms and/or the group V atoms from the III-V material are the dopant atoms forming a region (6) in the semiconductor body in direct contact with the nanowire (3).
摘要翻译：公开了一种电子器件，其包括由111-V半导体材料的纳米线（3）形成的pn异质结（4）和包含IV族半导体材料的半导体本体（1）。纳米线（3）与半导体本体（1）的表面（2）直接接触并且具有第一导电类型，半导体本体（1）具有与第一导电类型相反的第二导电类型，纳米线（3）与半导体本体（1）形成pn异质结（4）。 III-V族半导体材料的纳米线可以用作半导体本体中掺杂剂原子的扩散源（5）。来自III-V材料的扩散的III族原子和/或V族原子是在半导体本体中与纳米线（3）直接接触形成区域（6）的掺杂剂原子。

10. 发明申请

WO2004081688A1 CURRENT MIRROR 审中-公开
标题翻译：目前的镜子
公开(公告)号：WO2004081688A1
公开(公告)日：2004-09-23
申请号：PCT/IB2004/050172
申请日：2004-03-01
申请人： KONINKLIJKE PHILIPS ELECTRONICS N.V. , VEENSTRA, Hugo , HURKX, Godefridus, A., M. , BREKELMANS, Johannes, H., A. , VAN GOOR, Dave, W.
发明人： VEENSTRA, Hugo , HURKX, Godefridus, A., M. , BREKELMANS, Johannes, H., A. , VAN GOOR, Dave, W.
IPC分类号： G05F3/26
CPC分类号： H03F3/3432 , G05F3/265
摘要： Current mirror generating a constant mirror ration comprising a bias current generator (12). The bias current generator (12) generates a bias current (Ib) in a bias conductor connected to the base of the output transistor (T out) and is controlled by the output voltage (U out) at the collector of the output transistor (T out). The purpose of the bias current generator (12) is to prevent an avalanche base current from affecting the base-emitter voltage of the output transistor (T out) and thereby increase the output current. The output transistor (T out) may thus be operated with collector-emitter voltages exceeding the breakdown voltage BVCEO without affecting the accuracy of the current mirror. The bias current generator (12) is further adapted to generating no bias current (Ib) until the output voltage (U out) has reached a predetermined value, thus reducing the power dissipation at low output voltages.
摘要翻译：电流镜产生包括偏置电流发生器（12）的恒定镜像比。偏置电流发生器（12）在连接到输出晶体管（T out）的基极的偏置导体中产生偏置电流（Ib），并由输出晶体管（T）的集电极处的输出电压（U out）控制出）。偏置电流发生器（12）的目的是防止雪崩基极电流影响输出晶体管的基极 - 发射极电压（T out），从而增加输出电流。因此，输出晶体管（T out）可以在超过击穿电压BVCEO的集电极 - 发射极电压下工作，而不会影响电流镜的精度。偏置电流发生器（12）还适于不产生偏置电流（Ib），直到输出电压（U out）达到预定值，从而降低在低输出电压下的功率消耗。

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