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    • 1. 发明申请
    • MEMORY DEVICE AND METHOD PROVIDING AN AVERAGE THRESHOLD BASED REFRESH MECHANISM
    • 存储器件和方法提供基于平均阈值的刷新机制
    • WO2006043225A1
    • 2006-04-27
    • PCT/IB2005/053393
    • 2005-10-17
    • KONINKLIJKE PHILIPS ELECTRONICS N.V.BLACQUIERE, Johannis, F., R.VAN ACHT, Victor, M., G.
    • BLACQUIERE, Johannis, F., R.VAN ACHT, Victor, M., G.
    • G11C16/34
    • G11C16/3418G11C16/3431
    • The present invention relates to a non-volatile memory device, comprising a memory array (10, 20) with a plurality of memory cells (100, 200) arranged in rows and columns, bit line conductors (12, 22) coupled to said rows of memory cells, an averaging circuit (11, 21) with inputs coupled to a plurality of said bit line conductors (12, 22) and being arranged to determine an average level on respective analog signal levels on said plurality of bit line conductors (12, 22), a monitoring circuit (13, 23) coupled to said averaging circuit (11, 21) and being arranged to monitor said average level and to output a refresh command when said average level shows a predetermined behaviour, and a refresh circuit (15, 25) coupled to said monitoring circuit (13, 23) and being arranged to refresh at least a selection of said plurality of memory cells (100, 200) in response to said refresh command.
    • 本发明涉及一种非易失性存储器件,其包括具有以行和列排列的多个存储器单元(100,200)的存储器阵列(10,20),位于所述行中的位线导体(12,22) 存储器单元的平均电平,平均电路(11,21),其具有耦合到多个所述位线导体(12,22)的输入,并且被布置成确定所述多个位线导体(12)上的相应模拟信号电平的平均电平 ,22),耦合到所述平均电路(11,21)的监控电路(13,23),并且被布置成在所述平均电平显示预定行为时监视所述平均电平并输出刷新命令,以及刷新电路 15,25)耦合到所述监视电路(13,23),并且被布置为响应于所述刷新命令来刷新所述多个存储单元(100,200)中的至少一个选择。