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1. 发明申请

WO2005074176A2 FEEDBACK CONTROL LOOP FOR BIT DETECTION IN AN N-DIMENSIONAL DATA BLOCK 审中-公开
标题翻译：用于在N维数据块中进行位检测的反馈控制环
公开(公告)号：WO2005074176A2
公开(公告)日：2005-08-11
申请号：PCT/IB2005050263
申请日：2005-01-24
申请人： KONINKL PHILIPS ELECTRONICS NV , BERGMANS JOHANNES W M , IMMINK ALBERT H J , RIANI JAMAL , COENE WILLEM M J M , VAN BENEDEN STEVEN J-M L , CIACCI MASSIMO , NOWBAKHT IRANI ALI
发明人： BERGMANS JOHANNES W M , IMMINK ALBERT H J , RIANI JAMAL , COENE WILLEM M J M , VAN BENEDEN STEVEN J-M L , CIACCI MASSIMO , NOWBAKHT IRANI ALI
IPC分类号： G11B20/10 , G11B20/18 , H03M13/41 , H04J3/00
CPC分类号： G11B20/10046 , G11B20/10 , G11B20/10009 , G11B20/18 , G11B2020/1275 , G11B2020/1288 , G11B2020/1863 , H03M13/41 , H03M13/6331
摘要： On existing DVD and CD players a control loop is required for the adaptation and timing recovery. For Two-Dimensional Optical Storage such a control loop has drawbacks because PRML detection in the form of a stripe-wise Viterbi detector is used. Such a detector introduces an increasing detection delay when going from the outer rows towards the center of the broad spiral. A feedback loop is arranged to determine an error signal from a first area of the data block where the first area is that area where the error signal can be determined within the shortest period of time. This reduces the duration of the detection step and thus increases the stability of the control loop.
摘要翻译：在现有的DVD和CD播放机上，适配和定时恢复需要一个控制环路。对于二维光学存储，这样的控制回路具有缺点，因为使用了带状维特比检测器形式的PRML检测。这种检测器在从外排朝向宽螺旋的中心时引入增加的检测延迟。反馈环路被布置成确定来自数据块的第一区域的误差信号，其中第一区域是可以在最短时间内确定误差信号的区域。这减少了检测步骤的持续时间，从而增加了控制回路的稳定性。

2. 发明申请

WO2007057824A3 NEAR-MINIMUM BIT-ERROR RATE EQUALIZER ADAPTATION 审中-公开
标题翻译：近 - 最小 - 误比特率均衡器适应
公开(公告)号：WO2007057824A3
公开(公告)日：2007-08-09
申请号：PCT/IB2006054195
申请日：2006-11-10
申请人： KONINKL PHILIPS ELECTRONICS NV , RIANI JAMAL , VAN BENEDEN STEVEN J-M L , BERGMANS JOHANNES W M , IMMINK ALBERT H J
发明人： RIANI JAMAL , VAN BENEDEN STEVEN J-M L , BERGMANS JOHANNES W M , IMMINK ALBERT H J
IPC分类号： H04L25/03
CPC分类号： H04L25/03038 , G11B20/10009 , H04L25/03261
摘要： Method for equalizer adaptation and/or target adaptation in a receiver for a transmission channel. The method provides for detecting data in the received signal, deriving an error sequence representing potential errors in the data detection, deriving a first value representing the likelihood of an error in the data detection, the first value based on the error sequence and the received signal, and enabling and disabling adaptation of the equalizer and/or the target response depending on the first value being below or above a predefined threshold value.
摘要翻译：用于传输信道的接收机中的均衡器适配和/或目标自适应的方法。该方法用于检测接收信号中的数据，导出表示数据检测中的潜在错误的错误序列，导出表示数据检测中的错误的可能性的第一值，基于错误序列的第一值和接收到的信号以及取决于低于或高于预定义阈值的第一值来启用和禁用均衡器和/或目标响应的适配。

3. 发明专利

CA1320997C ARRANGEMENT FOR COMBATTING INTERSYMBOL INTERFERENCE AND NOISE 未知
公开(公告)号：CA1320997C
公开(公告)日：1993-08-03
申请号：CA556626
申请日：1988-01-15
申请人： BERGMANS JOHANNES W M
发明人： BERGMANS JOHANNES W M , WONG YAU C
IPC分类号： H04L25/03
摘要： PHN 12.013 20.6.1987 Arrangement for combatting intersymbol interference and noise. An arrangement for combating intersymbol interference and noise introduced into a data signal transmitted at a symbol rate 1/T by a transmission channel having a memory span LT corresponding to a number of L consecutive data symbols, comprises a receive filter (RF), a first decision circuit (ID) for forming preliminary symbol decisions in response to the transmitted data signal, a second decision circuit (FD) for forming final symbol decisions, means (FFS and FBS) for compensating pre- and post-cursive intersymbol interference, and a combining circuit (AD) for forming the input signal for the second decision circuit (FD). By selecting in these compensating means the memory span MT of the feedforward section (FFS), and possibly also the memory span NT of the feedback section (FBS), to be smaller than the memory span LT of the transmission channel, a simplification of the implementation of the arrangement is achieved, whereas the attainable transmission quality does not appreciably differ from the transmission quality attainable with MT=NT=LT, (Fig.2).

4. 发明专利

CA1295392C DATA TRANSMISSION SYSTEM COMPRISING A DECISION FEEDBACK EQUALIZER AND USING PARTIAL-RESPONSE TECHNIQUES 未知
公开(公告)号：CA1295392C
公开(公告)日：1992-02-04
申请号：CA568700
申请日：1988-06-06
申请人： BERGMANS JOHANNES W M
发明人： BERGMANS JOHANNES W M
IPC分类号： H04B3/06 , H04L25/03 , H04L25/497
摘要： PHN 12.037 20 27-5-1988 " "Data transmission system comprising a decision feedback equalizer and using partial-response techniques." A system for transmitting an n-level data signal (dk) at a given symbol rate 1/T comprises a data transmitter (1), a transmission channel (2) and a data receiver (3) with an equalizer (30) of the decision feedback type. By arranging this equalizer (30) for forming an estimate (ck) of a virtual m-level data signal (ck) instead of the output signal (bk) of the data transmitter (1) error propagation in the equalizer (30) is considerably reduced without thereby appreciably adding to the implementation-complexity of the system. (Fig. 3).

5. 发明专利

CA1277000C DATA TRANSMISSION SYSTEM COMPRISING SMEARING FILTERS 未知
公开(公告)号：CA1277000C
公开(公告)日：1990-11-27
申请号：CA556210
申请日：1988-01-11
申请人： BERGMANS JOHANNES W M
发明人： BERGMANS JOHANNES W M , CLAASEN THEODOOR A C M , VAN GERWEN PETRUS J
IPC分类号： H03K5/125 , H03H17/00 , H03H17/02 , H04B1/62 , H04L25/08
摘要： PHN 12 010 -??- 29-7-1987 Data transmission system comprising smearing filters. The transmitter (DTR) and the receiver (DRC) of a system for transmitting data signals at a given symbol rate 1/T comprise discrete-time smearing filters (SM and DSM) for combatting the effect of additive pulselike disturbances (p'(t)) in the transmission channel (TCH). In many cases these disturbances (p'(t)) turn out to have a pronounced bandwidth-limited nature. By utilizing this feature the implementation of the smearing filters (SM and DSM) is simplified and/or their performance level is improved in that the non-zero values of their impulse responses s(i) and d(j) only occur at the points of grids of the indices i and j recurring with a period of L, where L is an integer greater than 1 and where L is determined substantially by the ratio Lo of the symbol rate 1/T to twice the highest significant frequency fm of these disturbances (p'(t)).

6. 发明申请

WO9940574A3 ARRANGEMENT FOR READING INFORMATION FROM A MAGNETIC RECORD CARRIER 审中-公开
标题翻译：从磁记录载体读取信息的安排
公开(公告)号：WO9940574A3
公开(公告)日：1999-11-04
申请号：PCT/IB9900110
申请日：1999-01-25
申请人： KONINKL PHILIPS ELECTRONICS NV , PHILIPS SVENSKA AB
发明人： RAMALHO JOAO N V L , VOORMAN JOHANNES O , LECLERC PATRICK , RAMAEKERS JOZEF A M , LUGTHART MARCEL L , BERGMANS JOHANNES W M
IPC分类号： G01R33/09 , G11B5/00 , G11B5/012 , G11B5/02 , G11B5/09 , G11B7/00 , G11B20/10 , G11B20/22 , G11B33/14
CPC分类号： G11B20/10009 , G01R33/09 , G11B5/012 , G11B5/02 , G11B5/09 , G11B7/00 , G11B20/22 , G11B33/14 , G11B2005/0016 , G11B2005/0018
摘要： An arrangement is disclosed for reading information from a record carrier. The arrangement comprises a read head having at least one magneto-resistive element (Rmr), a first transistor (Tr1) and a second transistor (Tr2). The base of the first transistor (Tr1) is coupled to the emitter of the second transistor (Tr2) via a first capacitor (6). The base of the second transistor (Tr2) is coupled to the emitter of the first transistor (Tr1) via a second capacitor (8). The arrangement further comprises a non-linear transconductance amplifier (14) having first and second inputs coupled to the output terminals (10, 12) of the arrangement, and having and inverting and non-inverting outputs coupled to the bases of the first and second transistor. The non-linear transconductance amplifier (14) is adapted to supply a control current at its inverting and non-inverting outputs in response to a voltage present across its inputs, such that for first and second input voltages resulting in first and second output currents, respectively, the first input voltage being larger than the second input voltage, the amplification factor of the transconductance means being larger for generating the first output current than for generating the second output current.
摘要翻译：公开了用于从记录载体读取信息的安排。该装置包括具有至少一个磁阻元件（Rmr），第一晶体管（Tr1）和第二晶体管（Tr2）的读取头。第一晶体管（Tr1）的基极经由第一电容器（6）耦合到第二晶体管（Tr2）的发射极。第二晶体管（Tr2）的基极经由第二电容器（8）耦合到第一晶体管（Tr1）的发射极。该装置进一步包括非线性跨导放大器（14），其具有耦合到该装置的输出端子（10,12）的第一和第二输入端，并具有耦合到第一和第二基极的反相和非反相输出晶体管。非线性跨导放大器（14）适于响应于其输入端上存在的电压在其反相和非反相输出端处提供控制电流，使得对于产生第一和第二输出电流的第一和第二输入电压，所述第一输入电压大于所述第二输入电压，所述跨导装置的放大因子对于产生所述第一输出电流而言大于对于产生所述第二输出电流。

7. 发明申请

WO9944201A3 DEVICE FOR WRITE COMPENSATION IN MAGNETIC-MEDIA RECORDING 审中-公开
标题翻译：磁记录写入补偿装置
公开(公告)号：WO9944201A3
公开(公告)日：1999-10-28
申请号：PCT/IB9900210
申请日：1999-02-08
申请人： KONINKL PHILIPS ELECTRONICS NV , PHILIPS SVENSKA AB , HEWLETT PACKARD CO
发明人： BERGMANS JOHANNES W M , VOORMAN JOHANNES O , BRITTENHAM STEVEN L
IPC分类号： G11B5/09 , G11B20/10
CPC分类号： G11B20/10009 , G11B5/09
摘要： Device for write precompensation of data signals to be recorded on a magnetic medium, which device has an input for receiving input data signals and an output for supplying the output signals to be recorded, at least a plurality of the signal transitions in these output data signals being delayed with respect to the corresponding signal transitions in the input data signal, the signal path between the input and the output including a series arrangement of a filter circuit and a hysteresis circuit, which hysteresis circuit receives the output signal of the filter circuit and supplies a binary signal as its output signal. This write precompensation device simply enables allowance to be made for the influence of a large number of preceding symbol values on a transition to be recorded. When the device is combined with a known write compensation device it suffices to use a simple filter.
摘要翻译：用于在磁介质上记录数据信号的写预补偿装置，该装置具有用于接收输入数据信号的输入端和用于提供要记录的输出信号的输出端，在这些输出数据信号中的至少多个信号转换相对于输入数据信号中的相应信号转变而言被延迟，输入和输出之间的信号路径包括滤波器电路和滞后电路的串联布置，该滞后电路接收滤波器电路的输出信号并提供一个二进制信号作为其输出信号。该写入预补偿装置简单地允许对要记录的转换中的大量先前符号值的影响进行补偿。当该设备与已知的写入补偿设备结合使用时，只需使用简单的滤波器即可。

8. 发明申请

WO0231982A2 DEVICE FOR RECONSTRUCTING A RUNLENGTH CONSTRAINED SEQUENCE 审中-公开
标题翻译：用于重新构建运行约束序列的设备
公开(公告)号：WO0231982A2
公开(公告)日：2002-04-18
申请号：PCT/EP0111148
申请日：2001-09-26
申请人： KONINKL PHILIPS ELECTRONICS NV
发明人： OTTE ROB , COENE WILLEM M J M , BERGMANS JOHANNES W M
IPC分类号： H03M7/14 , H03M13/00 , H03M13/41 , H04L1/00
CPC分类号： H04L1/0054
摘要： A device is described for reconstructing a runlength constrained sequence of n-ary digits from an analog input signal (Si) representing said sequence, the device comprises an input (1) for receiving said signal (Si) coupled to a sampling unit (2) for taking time-discrete samples of the input signal (Si). The device further comprises a branch metric calculation unit (3) for calculating a set of branch metric values (BMs,n) for subsequent samples (Ssn) of the sampled input signal (Ss). Each of the set of branch metric values is an indication for the likelihood that an amplitude value of a sample (Ssn) corresponds to a particular state (s), a state being defined as a sequence of n-ary digits. The device further comprises a delay unit (4i) which forms part of a delay chain (4) of delay units. A first delay unit (4a) of the delay chain is coupled to the branch metric calculation unit (3). The device further comprises a path metric calculation chain (5) of path metric calculation units, the path metric calculation chain (5) comprising one or more path metric calculation units (5b) having first inputs (5b1) coupled to a delay unit (4g) and second inputs (5b2) coupled to a preceding path metric calculation unit (5a). The path metric calculation unit (5a) calculate the path metric values (PMs,n-k) out of the branch metric values (BMs,n), a path metric value being an indication for the likelihood that a sequence of samples corresponds to a sequence of states.
摘要翻译：描述了一种用于从表示所述序列的模拟输入信号（Si）重建n位数的游程受限序列的装置，该装置包括用于接收耦合到采样单元（2）的所述信号（Si）的输入端（1）用于获取输入信号（Si）的时间离散样本。该设备还包括一个用于计算采样输入信号（Ss）的后续采样（Ssn）的一组分支量度值（BMs，n）的分支度量计算单元（3）。一组分支量度值中的每一个是对样本的振幅值（Ssn）对应于特定状态的可能性的指示，状态被定义为n位数的序列。该装置还包括形成延迟单元的延迟链（4）的一部分的延迟单元（4i）。延迟链的第一延迟单元（4a）耦合到分支量度计算单元（3）。所述设备还包括路径度量计算单元的路径度量计算链（5），所述路径度量计算链（5）包括一个或多个路径度量计算单元（5b），所述路径度量计算单元（5b）具有耦合到延迟单元）和耦合到先前路径度量计算单元（5a）的第二输入（5b2）。路径度量计算单元（5a）计算分支度量值（BMs，n）中的路径度量值（PMs，nk），路径量度值是用于样本序列对应于状态。

9. 发明申请

WO9944201A8 DEVICE FOR WRITE COMPENSATION IN MAGNETIC-MEDIA RECORDING 审中-公开
标题翻译：磁介质记录中的写补偿装置
公开(公告)号：WO9944201A8
公开(公告)日：1999-12-29
申请号：PCT/IB9900210
申请日：1999-02-08
申请人： KONINKL PHILIPS ELECTRONICS NV , PHILIPS SVENSKA AB , HEWLETT PACKARD CO
发明人： BERGMANS JOHANNES W M , VOORMAN JOHANNES O , BRITTENHAM STEVEN L
IPC分类号： G11B5/09 , G11B20/10
CPC分类号： G11B20/10009 , G11B5/09
摘要： Device for write precompensation of data signals to be recorded on a magnetic medium, which device has an input for receiving input data signals and an output for supplying the output signals to be recorded, at least a plurality of the signal transitions in these output data signals being delayed with respect to the corresponding signal transitions in the input data signal, the signal path between the input and the output including a series arrangement of a filter circuit and a hysteresis circuit, which hysteresis circuit receives the output signal of the filter circuit and supplies a binary signal as its output signal. This write precompensation device simply enables allowance to be made for the influence of a large number of preceding symbol values on a transition to be recorded. When the device is combined with a known write compensation device it suffices to use a simple filter.
摘要翻译：要记录在磁介质上的数据信号的预补偿装置，该装置具有用于接收输入数据信号的输入端和用于提供要记录的输出信号的输出，在这些输出数据信号中的至少多个信号转换相对于输入数据信号中的相应信号转换被延迟，输入和输出之间的信号路径包括滤波器电路和滞后电路的串联布置，该滞后电路接收滤波器电路的输出信号并提供二进制信号作为其输出信号。该写入预补偿装置简单地允许对要记录的转换的大量先前符号值的影响进行限制。当设备与已知的写入补偿设备组合时，就可以使用简单的过滤器。

10. 发明专利

AU2003263473A1 BIT DETECTION METHOD AND DEVICE 未知
公开(公告)号：AU2003263473A1
公开(公告)日：2004-04-23
申请号：AU2003263473
申请日：2003-09-17
申请人： KONINKL PHILIPS ELECTRONICS NV
发明人： COENE WILLEM M J M , IMMINK ALBERT H J , BERGMANS JOHANNES W M
IPC分类号： G11B20/10 , G11B20/14 , H03M5/14
摘要： The present invention relates to a bit detection method for detecting the bit values of bits of a channel data stream stored on a record carrier, wherein the channel data stream resides on an N-dimensional lattice of bits and comprises a plurality of contiguous bit units, each bit unit comprising at least one bit, wherein bit detection for the channel data stream is performed by an iterative procedure, each iteration being carried out on the basis of said bit units, wherein the bit values of the bits of a bit unit are detected by said iterative procedure based on the received HF signal values of the bits of said bit unit. The proposed method comprises an initialisation step, an updating step and an iteration such the method the bits are detected in an iterative but non-recursive way which allow for a high level of parallel processing in the implementation. In the proposed bit detection method, an evaluation criterion is used which is based on the difference between the received HF-signal and a reference HF-signal for each bit of a bit unit consisting of a plurality of bits, where the reference HF-signal depends on the bit value of the bit to be updated, and on its neighbouring bits, for which bit decisions in a previous iteration step are used. Thus, a high capacity, in particular in two-dimensional optical storage, can be achieved which substantially improves the performance of a threshold detector. Hence, the bit detection method according to the invention does not prohibit implementations aimed for high data-rates.

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