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1. 发明授权

EP0080731B1 Semiconductor device comprising a buried oxide isolation 失效
标题翻译：包含氧化银分离的半导体器件
公开(公告)号：EP0080731B1
公开(公告)日：1988-09-14
申请号：EP82111034.3
申请日：1982-11-30
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Konaka, Masami , Shibyo, Naoyuki , Dang, Ryo
IPC分类号： H01L29/78 , H01L21/76 , H01L29/08
CPC分类号： H01L21/7621 , H01L21/76 , H01L21/76216 , H01L29/0847
摘要： A semiconductor device comprising a semiconductor substrate (10) having a transistor region (20) in which a field-effect transistor having a channel width of 1 mu or less is formed, and an insulating film (12) deposited in recesses formed in the part of the semiconductor substrate surrounding the transistor region. The angle theta that is formed between the side wall (22) of the recesses and the imaginary extension of the top surface (24) of the transistor region is defined as: theta + 0.2778 epsilon 1 - 1.639 epsilon 1 + 88.39 theta >/= - 0.009259 epsilon 1 - 0.2222 epsilon 1 - 2.528 epsilon 1 + 76.76 theta >/= 50 DEG and epsilon 1 >/= 1, where epsilon 1 is the relative permittivity of the insulating film.

2. 发明公开

EP0115169A1 Voltage-control type semiconductor switching device 失效
标题翻译：电压控制的半导体开关器件。
公开(公告)号：EP0115169A1
公开(公告)日：1984-08-08
申请号：EP83307803.3
申请日：1983-12-21
申请人： Ikoma, Toshiaki , KABUSHIKI KAISHA TOSHIBA
发明人： Ikoma, Toshiaki , Maeda, Hajime , Yanai, Hisayoshi , Dang, Ryo , Shigyo, Naoyuki
IPC分类号： H01L45/00 , H01L29/78 , H03K17/56
CPC分类号： H01L29/78 , H01L29/74
摘要： A voltage-control type semiconductor switching device (Q1) is disclosed which includes a pair of control electrodes (20, 22) to which a control voltage signal is supplied, and a semiconductive layer (10) formed between the electrodes (20, 22) so as electrically insulative from the electrodes (20, 22) through insulative layers (16, 18). The semiconductive layer (10) has a channel region (10a) and a carrier-storage region (10b) which is substantially nonconductive. The channel region (10a) is formed laterally along the longitudinal direction (y) of the electrodes (20, 22), thereby allowing majority carriers such as electrons of the semiconductive layer (10) to flow in the lateral direction (y). In the current cut-off mode, the carrier-storage region (10b) temporarily stores the carriers which move in the direction (x) of thickness of the semiconductive layer (10) due to the electric field created by the voltage. In the current conduction mode, the carrier-storage region (10b) releases the carriers stored therein toward the channel region (10a).

3. 发明公开

EP0105695A3 MOS/bipolar integrated circuit device and manufacturing method thereof 失效
标题翻译： MOS /双极集成电路装置及其制造方法
公开(公告)号：EP0105695A3
公开(公告)日：1986-11-05
申请号：EP83305767
申请日：1983-09-27
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Onga, Shinji , Dang, Ryo
IPC分类号： H01L27/06 , H01L21/82
CPC分类号： H01L27/0688 , H01L21/8249
摘要： In a MOS/bipolar integrated circuit device using junction bipolar transistors (02) as active elements for directly controlling a large current, and metal oxide semiconductor field effect transistors or MOSFETs (Q1) as active elements for controlling the operation of the bipolar transistor (Q2), all of the MOSFETs (Q1) included in the circuit are simultaneously formed on a single-crystalline silicon substrate (10). The bipolar transistors (Q2) are stacked above the MOSFETs (Q1) through an Si0 2 film (26) having a drain contact hole (28), in a two-story manner. The bipolar transistors (02) have their base regions connected to the drains of the MOSFETs (Q1), respectively.

4. 发明公开

EP0080731A3 Semiconductor device comprising a buried oxide isolation 失效
标题翻译：包含氧化银分离的半导体器件
公开(公告)号：EP0080731A3
公开(公告)日：1986-05-07
申请号：EP82111034
申请日：1982-11-30
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Konaka, Masami , Shibyo, Naoyuki , Dang, Ryo
IPC分类号： H01L29/78 , H01L21/76 , H01L29/08
CPC分类号： H01L21/7621 , H01L21/76 , H01L21/76216 , H01L29/0847
摘要： A semiconductor device comprising a semiconductor substrate (10) having a transistor region (20) in which a field-effect transistor having a channel width of 1 µ or less is formed, and an insulating film (12) deposited in recesses formed in the part of the semiconductor substrate surrounding the transistor region. The angle 8 that is formed between the side wall (22) of the recesses and the imaginary extension of the top surface (24) of the transistor region is defined as: and ε 1 ≥ 1, where ε 1 is the relative permittivity of the insulating film.

5. 发明授权

EP0105695B1 MOS/bipolar integrated circuit device and manufacturing method thereof 失效
标题翻译： MOS /双极集成电路器件及其制造方法
公开(公告)号：EP0105695B1
公开(公告)日：1989-05-31
申请号：EP83305767.2
申请日：1983-09-27
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Onga, Shinji , Dang, Ryo
IPC分类号： H01L27/06 , H01L21/82
CPC分类号： H01L27/0688 , H01L21/8249

6. 发明授权

EP0115169B1 Voltage-control type semiconductor switching device 失效
标题翻译：电压控制型半导体开关器件
公开(公告)号：EP0115169B1
公开(公告)日：1987-03-11
申请号：EP83307803.3
申请日：1983-12-21
申请人： Ikoma, Toshiaki , KABUSHIKI KAISHA TOSHIBA
发明人： Ikoma, Toshiaki , Maeda, Hajime , Yanai, Hisayoshi , Dang, Ryo , Shigyo, Naoyuki
IPC分类号： H01L45/00 , H01L29/78 , H03K17/56
CPC分类号： H01L29/78 , H01L29/74

7. 发明授权

EP0080731B2 Semiconductor device comprising a buried oxide isolation 失效
标题翻译：包含氧化银分离的半导体器件
公开(公告)号：EP0080731B2
公开(公告)日：1991-11-21
申请号：EP82111034.3
申请日：1982-11-30
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Konaka, Masami , Shibyo, Naoyuki , Dang, Ryo
IPC分类号： H01L29/78 , H01L21/76 , H01L29/08
CPC分类号： H01L21/7621 , H01L21/76 , H01L21/76216 , H01L29/0847
摘要： A semiconductor device comprising a semiconductor substrate (10) having a transistor region (20) in which a field-effect transistor having a channel width of 1 mu or less is formed, and an insulating film (12) deposited in recesses formed in the part of the semiconductor substrate surrounding the transistor region. The angle theta that is formed between the side wall (22) of the recesses and the imaginary extension of the top surface (24) of the transistor region is defined as: theta + 0.2778 epsilon 1 - 1.639 epsilon 1 + 88.39 theta >/= - 0.009259 epsilon 1 - 0.2222 epsilon 1 - 2.528 epsilon 1 + 76.76 theta >/= 50 DEG and epsilon 1 >/= 1, where epsilon 1 is the relative permittivity of the insulating film.

8. 发明公开

EP0105695A2 MOS/bipolar integrated circuit device and manufacturing method thereof 失效
标题翻译： MOS /双极集成电路器件及其制造方法
公开(公告)号：EP0105695A2
公开(公告)日：1984-04-18
申请号：EP83305767.2
申请日：1983-09-27
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Onga, Shinji , Dang, Ryo
IPC分类号： H01L27/06 , H01L21/82
CPC分类号： H01L27/0688 , H01L21/8249
摘要： In a MOS/bipolar integrated circuit device using junction bipolar transistors (02) as active elements for directly controlling a large current, and metal oxide semiconductor field effect transistors or MOSFETs (Q1) as active elements for controlling the operation of the bipolar transistor (Q2), all of the MOSFETs (Q1) included in the circuit are simultaneously formed on a single-crystalline silicon substrate (10). The bipolar transistors (Q2) are stacked above the MOSFETs (Q1) through an Si0 2 film (26) having a drain contact hole (28), in a two-story manner. The bipolar transistors (02) have their base regions connected to the drains of the MOSFETs (Q1), respectively.
摘要翻译：在使用结型双极性晶体管（02）作为用于直接控制大电流的有源元件的MOS /双极型集成电路器件以及作为用于控制双极型晶体管（Q2）的操作的有源元件的金属氧化物半导体场效应晶体管或MOSFET（Q1）），包括在电路中的所有MOSFET（Q1）同时形成在单晶硅衬底（10）上。双极晶体管（Q2）以二层方式通过具有漏极接触孔（28）的SiO 2膜（26）堆叠在MOSFET（Q1）上方。双极晶体管（02）的基极区分别连接到MOSFET（Q1）的漏极。

9. 发明公开

EP0080731A2 Semiconductor device comprising a buried oxide isolation 失效
标题翻译： Halbleiteranordnung mit einer vergrabenen Isolation aus Oxyd。
公开(公告)号：EP0080731A2
公开(公告)日：1983-06-08
申请号：EP82111034.3
申请日：1982-11-30
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Konaka, Masami , Shibyo, Naoyuki , Dang, Ryo
IPC分类号： H01L29/78 , H01L21/76 , H01L29/08
CPC分类号： H01L21/7621 , H01L21/76 , H01L21/76216 , H01L29/0847
摘要： A semiconductor device comprising a semiconductor substrate (10) having a transistor region (20) in which a field-effect transistor having a channel width of 1 µ or less is formed, and an insulating film (12) deposited in recesses formed in the part of the semiconductor substrate surrounding the transistor region. The angle 8 that is formed between the side wall (22) of the recesses and the imaginary extension of the top surface (24) of the transistor region is defined as: and ε 1 ≥ 1, where ε 1 is the relative permittivity of the insulating film.
摘要翻译：一种半导体器件，包括具有其中形成沟道宽度为1μm以下的场效应晶体管的晶体管区域（20）的半导体衬底（10），以及沉积在形成在所述部分中的凹部中的绝缘膜（12）围绕晶体管区域的半导体衬底。在凹部的侧壁（22）和晶体管区域的顶表面（24）的虚拟延伸部之间形成的角度θ被定义为：θ=0.02778ε1 2 +0.2778ε1 2 = 1.639ε1 + 88.39°θ/ = - 0.009259ε1 3 - 0.2222ε1 -2 2.528ε1 + 76.76°θ= 50°，ε1> = 1，其中ε1 是绝缘膜的相对介电常数。

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