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1. 发明申请

US20110022784A1 MEMORY SYSTEM 有权
标题翻译：记忆系统
公开(公告)号：US20110022784A1
公开(公告)日：2011-01-27
申请号：US12529139
申请日：2009-02-10
申请人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Toshikatsu Hida
发明人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Toshikatsu Hida
IPC分类号： G06F12/00 , G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7202 , G06F2212/7207 , G06F2212/7208 , G06F2212/7211
摘要： A memory system according to an embodiment of the present invention comprises: a memory amount required for management table creation is reduced by adopting a nonvolatile semiconductor memory including a plurality of parallel operation elements respectively having a plurality of physical blocks as units of data erasing and a controller that can drive the parallel operation elements in parallel and has a number-of-times-of-erasing managing unit that manages the number of times of erasing in logical block units associated with a plurality of physical blocks driven in parallel.
摘要翻译：根据本发明的实施例的存储器系统包括：通过采用包括分别具有多个物理块的多个并行操作元件作为数据擦除单元的非易失性半导体存储器来减少管理表创建所需的存储量，并且控制器，其可以并行驱动并行操作元件，并且具有多个次数的擦除管理单元，其管理与并行驱动的多个物理块相关联的逻辑块单元中的擦除次数。

2. 发明授权

US08285954B2 Memory system managing a plurality of logs 失效
标题翻译：内存系统管理多个日志
公开(公告)号：US08285954B2
公开(公告)日：2012-10-09
申请号：US12530467
申请日：2009-02-10
申请人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Toshikatsu Hida
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Toshikatsu Hida
IPC分类号： G06F12/02
CPC分类号： G11C16/20 , G06F11/1441 , G11C29/702
摘要： A memory system includes a nonvolatile memory including a plurality of blocks, a volatile memory storing management information including a storage position of data stored in the nonvolatile memory, a management information writing unit, and a management information storing unit. The management information writing unit is configured to update, when the storage position of data is changed in the nonvolatile memory, the management information stored in the volatile memory. The management information storing unit is configured to, before writing data to the nonvolatile memory, store a first log including an update schedule of the management information in the nonvolatile memory and, after writing data to the nonvolatile memory, store a second log including an update result of the management information in the nonvolatile memory, wherein the management information storing unit is configured to store the first log and the second log in the same-numbered page of the different two blocks.
摘要翻译：存储器系统包括：包括多个块的非易失性存储器，存储包括存储在非易失性存储器中的数据的存储位置的管理信息的易失性存储器，管理信息写入单元和管理信息存储单元。管理信息写入单元被配置为当在非易失性存储器中改变数据的存储位置时更新存储在易失性存储器中的管理信息。管理信息存储单元被配置为在向非易失性存储器写入数据之前，将包括管理信息的更新计划的第一日志存储在非易失性存储器中，并且在向非易失性存储器写入数据之后，存储包括更新的第二日志非易失性存储器中的管理信息的结果，其中管理信息存储单元被配置为将第一日志和第二日志存储在不同的两个块的同一页中。

3. 发明申请

US20090222628A1 MEMORY SYSTEM 审中-公开
标题翻译：记忆系统
公开(公告)号：US20090222628A1
公开(公告)日：2009-09-03
申请号：US12394934
申请日：2009-02-27
申请人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Shinichi Kanno , Toshikatsu Hida
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Shinichi Kanno , Toshikatsu Hida
IPC分类号： G06F12/08 , G06F12/00
CPC分类号： G06F12/0868 , G06F12/0804 , G06F12/0897 , G06F2212/214
摘要： A controller determines whether data stored in a first storing area should be flushed to a second storing area or a third storing area. When flushing of data in a track unit from at least one of the first storing area and the second storing area unit to the third storing area unit is determined, the controller collects data included in the flushed data in the track unit from at least one of the first storing area and the second storing area including the storing area from which the flushing of the data is determined, merges the flushed data and the collected data, and writes the merged data in the third storing area.
摘要翻译：控制器确定存储在第一存储区域中的数据是否应被刷新到第二存储区域或第三存储区域。当从第一存储区域和第二存储区域单元中的至少一个到第三存储区域单元将轨道单元中的数据刷新确定时，控制器从包括在轨道单元中的冲洗数据中的数据从第一存储区域和第二存储区域包括确定了冲洗数据的存储区域，并且将刷新的数据和收集的数据合并，并将合并的数据写入第三存储区域。

4. 发明授权

US08438343B2 Memory system with fixed and variable pointers 有权
公开(公告)号：US08438343B2
公开(公告)日：2013-05-07
申请号：US12529227
申请日：2009-02-10
申请人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Shigehiro Asano , Shinichi Kanno , Toshikatsu Hida
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Shigehiro Asano , Shinichi Kanno , Toshikatsu Hida
IPC分类号： G06F12/06
CPC分类号： G06F11/1451 , G06F11/1471 , G06F12/0246 , G06F12/06 , G06F2212/7207 , G11C7/20 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C16/105
摘要： A memory system includes a volatile first storing unit, a nonvolatile second storing unit, and a controller. The controller performs data transfer, stores management information including a storage position of the data stored in the second storing unit into the first storing unit, and performs data management while updating the management information. The second storing unit has a management information storage area for storing management information storage information including management information in a latest state and a storage position of the management information. The storage position information is read by the controller during a startup operation of the memory system and includes a second pointer indicating a storage position of management information in a latest state in the management information storage area and a first pointer indicating a storage position of the second pointer. The first pointer is stored in a fixed area in the second storing unit and the second pointer is stored in an area excluding the fixed area in the second storing unit.

5. 发明授权

US08447914B2 Memory system managing the number of times of erasing 有权
标题翻译：内存系统管理擦除次数
公开(公告)号：US08447914B2
公开(公告)日：2013-05-21
申请号：US12529139
申请日：2009-02-10
申请人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Toshikatsu Hida
发明人： Junji Yano , Kosuke Hatsuda , Hidenori Matsuzaki , Toshikatsu Hida
IPC分类号： G06F12/00
CPC分类号： G06F12/0246 , G06F2212/7202 , G06F2212/7207 , G06F2212/7208 , G06F2212/7211
摘要： A memory system according to an embodiment of the present invention comprises: a memory amount required for management table creation is reduced by adopting a nonvolatile semiconductor memory including a plurality of parallel operation elements respectively having a plurality of physical blocks as units of data erasing and a controller that can drive the parallel operation elements in parallel and has a number-of-times-of-erasing managing unit that manages the number of times of erasing in logical block units associated with a plurality of physical blocks driven in parallel.
摘要翻译：根据本发明的实施例的存储器系统包括：通过采用包括分别具有多个物理块的多个并行操作元件作为数据擦除单元的非易失性半导体存储器来减少管理表创建所需的存储量，并且控制器，其可以并行驱动并行操作元件，并且具有多个次数的擦除管理单元，其管理与并行驱动的多个物理块相关联的逻辑块单元中的擦除次数。

6. 发明申请

US20110185107A1 MEMORY SYSTEM 有权
标题翻译：记忆系统
公开(公告)号：US20110185107A1
公开(公告)日：2011-07-28
申请号：US12529227
申请日：2009-02-10
申请人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Shigehiro Asano , Shinichi Kanno , Toshikatsu Hida
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Shigehiro Asano , Shinichi Kanno , Toshikatsu Hida
IPC分类号： G06F12/00
CPC分类号： G06F11/1451 , G06F11/1471 , G06F12/0246 , G06F12/06 , G06F2212/7207 , G11C7/20 , G11C11/5628 , G11C16/0483 , G11C16/10 , G11C16/105
摘要： A memory system includes a volatile first storing unit, a nonvolatile second storing unit, and a controller. The controller performs data transfer, stores management information including a storage position of the data stored in the second storing unit into the first storing unit, and performs data management while updating the management information. The second storing unit has a management information storage area for storing management information storage information including management information in a latest state and a storage position of the management information. The storage position information is read by the controller during a startup operation of the memory system and includes a second pointer indicating a storage position of management information in a latest state in the management information storage area and a first pointer indicating a storage position of the second pointer. The first pointer is stored in a fixed area in the second storing unit and the second pointer is stored in an area excluding the fixed area in the second storing unit.
摘要翻译：存储系统包括易失性第一存储单元，非易失性第二存储单元和控制器。控制器执行数据传送，将存储在第二存储单元中的数据的存储位置的管理信息存储到第一存储单元中，并且在更新管理信息的同时执行数据管理。第二存储单元具有用于存储管理信息存储信息的管理信息存储区域，该管理信息存储信息包括最新状态的管理信息和管理信息的存储位置。存储位置信息在存储器系统的启动操作期间由控制器读取，并且包括指示管理信息存储区域中处于最新状态的管理信息的存储位置的第二指针和指示第二存储器的存储位置的第一指针指针。第一指针存储在第二存储单元中的固定区域中，并且第二指针存储在除了第二存储单元中的固定区域之外的区域中。

7. 发明申请

US20100138591A1 MEMORY SYSTEM 失效
标题翻译：记忆系统
公开(公告)号：US20100138591A1
公开(公告)日：2010-06-03
申请号：US12530467
申请日：2009-02-10
申请人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Toshikatsu Hida
发明人： Junji Yano , Hidenori Matsuzaki , Kosuke Hatsuda , Toshikatsu Hida
IPC分类号： G06F12/00 , G06F12/16 , G06F12/02
CPC分类号： G11C16/20 , G06F11/1441 , G11C29/702
摘要： A memory system includes a volatile first storing unit, a nonvolatile second storing unit, and a controller. The controller stores management information of data stored in the second storing unit during a startup operation into the first storing unit and performs data management while updating the management information. The management information in a latest state stored into the first storing unit is also stored in the second storing unit. The management information includes a pre-log before and after change generated before a change occurs in the management information and a post-log, which is generated after the change occurs in the management information, concerning the change in the management information. The pre-log and the post-log are stored in the same areas of different blocks.
摘要翻译：存储系统包括易失性第一存储单元，非易失性第二存储单元和控制器。控制器将在启动操作期间存储在第二存储单元中的数据的管理信息存储到第一存储单元中，并且在更新管理信息的同时执行数据管理。存储在第一存储单元中的最新状态的管理信息也存储在第二存储单元中。管理信息包括在管理信息中发生变化之前产生的改变之前的预登录，以及在管理信息中发生变化之后生成的关于管理信息的变化的后记录。预登录和日志后存储在不同块的相同区域中。

8. 发明申请

US20120311245A1 SEMICONDUCTOR STORAGE DEVICE WITH VOLATILE AND NONVOLATILE MEMORIES 有权
标题翻译：具有易失性和非易失性存储器的半导体存储器件
公开(公告)号：US20120311245A1
公开(公告)日：2012-12-06
申请号：US13571034
申请日：2012-08-09
申请人： Hirokuni YANO , Shinichi Kanno , Toshikatsu Hida , Hidenori Matsuzaki , Kazuya Kitsunai , Shigehiro Asano
发明人： Hirokuni YANO , Shinichi Kanno , Toshikatsu Hida , Hidenori Matsuzaki , Kazuya Kitsunai , Shigehiro Asano
IPC分类号： G06F12/02
CPC分类号： G06F3/0604 , G06F3/0616 , G06F3/0631 , G06F3/064 , G06F3/0656 , G06F3/0658 , G06F3/0679 , G06F3/0685 , G06F12/0246 , G06F12/0804 , G06F12/0866 , G06F2212/7201 , G06F2212/7202 , G06F2212/7203 , G06F2212/7209 , G11C11/5628
摘要： A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.
摘要翻译：半导体存储装置包括配置在易失性半导体存储器中的第一存储区域，配置在非易失性半导体存储器中的第二和第三存储区域，以及执行以下处理的控制器。控制器执行第一处理，用于通过第一存储区中的第一单元存储多个数据;第二处理，用于存储由第二存储区中的第一管理单元从第一存储区输出的数据;以及第三处理，通过第二管理单元将从第一存储区域输出的数据存储在第三存储区域中。

9. 发明授权

US07953920B2 Semiconductor storage device with volatile and nonvolatile memories, method of controlling the same, controller and information processing apparatus 失效
标题翻译：具有易失性和非易失性存储器的半导体存储装置，其控制方法，控制器和信息处理装置
公开(公告)号：US07953920B2
公开(公告)日：2011-05-31
申请号：US12552461
申请日：2009-09-02
申请人： Hirokuni Yano , Shinichi Kanno , Toshikatsu Hida , Hidenori Matsuzaki , Kazuya Kitsunai , Shigehiro Asano
发明人： Hirokuni Yano , Shinichi Kanno , Toshikatsu Hida , Hidenori Matsuzaki , Kazuya Kitsunai , Shigehiro Asano
IPC分类号： G06F12/00
CPC分类号： G06F3/0604 , G06F3/0616 , G06F3/0631 , G06F3/064 , G06F3/0656 , G06F3/0658 , G06F3/0679 , G06F3/0685 , G06F12/0246 , G06F12/0804 , G06F12/0866 , G06F2212/7201 , G06F2212/7202 , G06F2212/7203 , G06F2212/7209 , G11C11/5628
摘要： A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second, third and fourth memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data by a first management unit in the fourth memory area, a third processing for storing data by a second management unit in the third memory area, a fourth processing for moving an area of the third unit from the fourth memory area to the second memory area, a fifth processing for copying data to an area of the third unit and allocating the area to the second memory area, and a sixth processing for copying data to an empty area of the third unit in the second memory area.
摘要翻译：半导体存储装置包括配置在非易失性半导体存储器中的易失性半导体存储器，第二，第三和第四存储区域中的第一存储区域和执行以下处理的控制器。控制器执行第一处理，用于将第一单元存储在第一存储区域中的多个数据，第二处理，用于由第一管理单元存储在第四存储区域中的数据;第三处理，用于由第二管理单元存储数据在第三存储区域中，用于将第三单元的区域从第四存储区域移动到第二存储区域的第四处理，用于将数据复制到第三单元的区域并将区域分配给第二存储区域的第五处理以及用于将数据复制到第二存储区域中的第三单元的空白区域的第六处理。

10. 发明授权

US08065470B2 Semiconductor storage device with volatile and nonvolatile memories 有权
标题翻译：具有易失性和非易失性存储器的半导体存储设备
公开(公告)号：US08065470B2
公开(公告)日：2011-11-22
申请号：US12552330
申请日：2009-09-02
申请人： Hirokuni Yano , Shinichi Kanno , Toshikatsu Hida , Hidenori Matsuzaki , Kazuya Kitsunai , Shigehiro Asano
发明人： Hirokuni Yano , Shinichi Kanno , Toshikatsu Hida , Hidenori Matsuzaki , Kazuya Kitsunai , Shigehiro Asano
IPC分类号： G06F12/00
CPC分类号： G06F3/0604 , G06F3/0616 , G06F3/0631 , G06F3/064 , G06F3/0656 , G06F3/0658 , G06F3/0679 , G06F3/0685 , G06F12/0246 , G06F12/0804 , G06F12/0866 , G06F2212/7201 , G06F2212/7202 , G06F2212/7203 , G06F2212/7209 , G11C11/5628
摘要： A semiconductor storage device includes a first memory area configured in a volatile semiconductor memory, second and third memory areas configured in a nonvolatile semiconductor memory, and a controller which executes following processing. The controller executes a first processing for storing a plurality of data by the first unit in the first memory area, a second processing for storing data outputted from the first memory area by a first management unit in the second memory area, and a third processing for storing data outputted from the first memory area by a second management unit in the third memory area.
摘要翻译：半导体存储装置包括配置在易失性半导体存储器中的第一存储区域，配置在非易失性半导体存储器中的第二和第三存储区域，以及执行以下处理的控制器。控制器执行第一处理，用于通过第一存储区中的第一单元存储多个数据;第二处理，用于存储由第二存储区中的第一管理单元从第一存储区输出的数据;以及第三处理，通过第二管理单元将从第一存储区域输出的数据存储在第三存储区域中。

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