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1. 发明授权

US08377567B2 Highly corrosion-resistant porous metal member 有权
标题翻译：高度耐腐蚀的多孔金属构件
公开(公告)号：US08377567B2
公开(公告)日：2013-02-19
申请号：US13111488
申请日：2011-05-19
申请人： Kazuki Okuno , Masahiro Kato , Tomoyuki Awazu , Masatoshi Majima , Hidetoshi Saito , Keiji Shiraishi , Hitoshi Tsuchida , Junichi Nishimura
发明人： Kazuki Okuno , Masahiro Kato , Tomoyuki Awazu , Masatoshi Majima , Hidetoshi Saito , Keiji Shiraishi , Hitoshi Tsuchida , Junichi Nishimura
IPC分类号： B32B5/18 , B32B15/04
CPC分类号： H01M4/661 , H01G9/008 , H01M4/808 , H01M10/052 , Y10T428/12479 , Y10T428/12944
摘要： A porous metal member composed of an alloy at least containing nickel and tungsten is provided. The alloy may contain 50 to 80 wt % of nickel and 20 to 50 wt % of tungsten and may further contain 10 wt % or less of phosphorus and/or 10 wt % or less of boron. Such a porous metal member can be produced by, for example, making a porous base such as a urethane foam be electrically conductive, forming an alloy film containing nickel and tungsten, then removing the porous base from the alloy film, and subsequently reducing the alloy.
摘要翻译：提供由至少包含镍和钨的合金构成的多孔金属构件。该合金可以含有50〜80重量％的镍和20〜50重量％的钨，还可以含有10重量％以下的磷和/或10重量％以下的硼。这样的多孔金属构件可以通过例如使聚氨酯泡沫等多孔质基体导电，形成含有镍和钨的合金膜，然后从合金膜除去多孔质基底，然后还原合金。

2. 发明申请

US20130295459A1 POROUS METALLIC BODY HAVING HIGH CORROSION RESISTANCE AND METHOD FOR PRODUCING THE SAME 审中-公开
标题翻译：具有高耐腐蚀性的多孔金属体及其制造方法
公开(公告)号：US20130295459A1
公开(公告)日：2013-11-07
申请号：US13979894
申请日：2012-01-06
申请人： Junichi Nishimura , Hitoshi Tsuchida , Hidetoshi Saito
发明人： Junichi Nishimura , Hitoshi Tsuchida , Hidetoshi Saito
IPC分类号： H01G9/004 , H01M4/66 , C25D1/00
CPC分类号： H01G9/004 , B22F3/1137 , B22F2207/01 , C22C1/08 , C22F1/00 , C22F1/02 , C22F1/10 , C23C18/1644 , C23C18/1653 , C23C18/1657 , C25D1/003 , C25D1/08 , C25D5/14 , C25D5/50 , H01M4/662 , H01M4/667 , H01M4/80 , H01M8/0232 , H01M8/245
摘要： A porous metallic body has a three-dimensional network structure composed of an alloy containing at least Ni and Cr, the porous metallic body having a skeleton formed of a hollow core and a shell, in which when a cross section of the shell is evenly divided in the thickness direction into three portions, i.e., an outer portion, a central portion, and an inner portion, and when concentrations in percent by weight of Cr in the outer portion, the central portion, and the inner portions are defined as a, b, and c, a, b, and c satisfy the relation given by expression (1): |(a+c)/2−b|/(a+b+c)/3
摘要翻译：多孔金属体具有由至少含有Ni和Cr的合金构成的三维网状结构体，多孔金属体具有由中空芯和外壳形成的骨架，其中当壳的横截面均匀分布时在厚度方向上分为三部分，即外部部分，中心部分和内部部分，当外部部分，中心部分和内部部分中的Cr的重量百分比浓度定义为a时， b和c，a，b和c满足式（1）给出的关系：|（a + c）/ 2-b | /（a + b + c）/ 3 <0.20（1）

3. 发明申请

US20130266862A1 HIGHLY CORROSION-RESISTANT POROUS METAL BODY AND METHOD FOR PRODUCING THE SAME 审中-公开
标题翻译：高耐腐蚀多孔金属体及其制造方法
公开(公告)号：US20130266862A1
公开(公告)日：2013-10-10
申请号：US13992266
申请日：2011-11-30
申请人： Kazuki Okuno , Masahiro Kato , Masatoshi Majima , Tomoyuki Awazu , Hidetoshi Saito , Junichi Nishimura , Keiji Shiraishi , Hitoshi Tsuchida , Kengo Tsukamoto
发明人： Kazuki Okuno , Masahiro Kato , Masatoshi Majima , Tomoyuki Awazu , Hidetoshi Saito , Junichi Nishimura , Keiji Shiraishi , Hitoshi Tsuchida , Kengo Tsukamoto
IPC分类号： H01M4/66
CPC分类号： H01M4/80 , B22F3/1137 , B22F2998/10 , B32B15/01 , C22C1/00 , C22C1/0433 , C22C19/03 , C22F1/10 , C23C10/28 , C23C30/00 , C23F17/00 , C25D1/003 , C25D1/08 , C25D3/30 , C25D3/562 , C25D5/48 , C25D5/50 , C25D5/505 , H01G11/68 , H01G11/70 , H01M4/0452 , H01M4/0469 , H01M4/661 , H01M4/662 , H01M4/667 , H01M4/8621 , H01M4/8657 , H01M8/0232 , H01M8/0245 , H01M10/0525 , Y02P70/56 , B22F2003/248
摘要： Provided are a porous metal body that is excellent in terms of corrosion resistance and that is suitable for a collector for batteries such as lithium-ion batteries, capacitors, or fuel cells; and methods for producing the porous metal body. A production method includes a step of coating a porous nickel body with an alloy containing at least nickel and tungsten or a metal containing at least tin; and a subsequent step of a heat treatment. Another production method includes a step of forming a nickel-plated layer on a porous base and then continuously forming an alloy-plated layer containing at least nickel and tungsten or tin, a step of removing the porous base, and a step of reducing metal. Such a method can provide a porous metal body in which tungsten or tin is diffused in a porous nickel body or a nickel-plated layer.
摘要翻译：提供一种多孔金属体，其耐腐蚀性优异，适用于锂离子电池，电容器或燃料电池等电池用集电体; 以及多孔金属体的制造方法。一种制备方法包括用至少含有镍和钨的合金或至少含有锡的金属涂覆多孔镍体的步骤; 和随后的热处理步骤。另一种生产方法包括在多孔基底上形成镀镍层，然后连续地形成至少含有镍和钨或锡的合金镀层，除去多孔基底的步骤和还原金属的步骤。这种方法可以提供一种多孔金属体，其中钨或锡在多孔镍体或镀镍层中扩散。

4. 发明授权

US07998621B2 Collector, battery electrode substrate, and methods for producing the same 有权
标题翻译：集电体，电池用电极基板及其制造方法
公开(公告)号：US07998621B2
公开(公告)日：2011-08-16
申请号：US11328219
申请日：2006-01-10
申请人： Keizo Harada , Masahiro Kato , Hidetoshi Saito , Tadashi Omura , Hitoshi Tsuchida
发明人： Keizo Harada , Masahiro Kato , Hidetoshi Saito , Tadashi Omura , Hitoshi Tsuchida
IPC分类号： H01M4/66 , H01M4/70 , H01M4/80 , B32B15/085
CPC分类号： H01M4/32 , D06M11/83 , H01M4/04 , H01M4/667 , H01M4/80 , H01M4/806 , H01M2004/021 , Y10T29/10 , Y10T29/49115 , Y10T428/2958
摘要： A battery electrode substrate includes a metallic porous body. The metallic porous body has a structure in which a surface of a plastic fiber in a woven or unwoven fabric is coated with a nickel film. The nickel film coats the surface with an average coverage ratio of not less than 85%.
摘要翻译：电池电极基板包括金属多孔体。金属多孔体具有这样的结构，其中织造或非织造织物中的塑料纤维的表面涂覆有镍膜。镍膜的表面平均覆盖率不低于85％。

5. 发明申请

US20060159998A1 Collector, battery electrode substrate, and methods for producing the same 有权
标题翻译：集电体，电池用电极基板及其制造方法
公开(公告)号：US20060159998A1
公开(公告)日：2006-07-20
申请号：US11328219
申请日：2006-01-10
申请人： Keizo Harada , Masahiro Kato , Hidetoshi Saito , Tadashi Omura , Hitoshi Tsuchida
发明人： Keizo Harada , Masahiro Kato , Hidetoshi Saito , Tadashi Omura , Hitoshi Tsuchida
IPC分类号： H01M4/80 , H01M4/66 , B32B15/085 , B05D5/12
CPC分类号： H01M4/32 , D06M11/83 , H01M4/04 , H01M4/667 , H01M4/80 , H01M4/806 , H01M2004/021 , Y10T29/10 , Y10T29/49115 , Y10T428/2958
摘要： A collector that has enough hardness and flexibility and a battery electrode substrate that uses this collector are provided. Also provided is a low-cost battery electrode substrate that exhibits excellent high-rate charge/discharge characteristics and low electrical resistance and that is able to avoid the decline in cycle characteristics caused by repetitive charging/discharging. The invention is a battery electrode substrate having a structure in which a nickel film is coated on the surface of plastic fiber of a woven or unwoven fabric, wherein a metallic porous body in which the average coverage ratio by the nickel film is not less than 85% is used. The invention is also a collector comprising a metallic porous body having a structure in which a surface of plastic fiber of a woven or unwoven fabric is coated with a nickel film so as to be an average coverage ratio of not less than 85%, wherein the metallic porous body comprises at least two layers of a lower density region and a higher density region in the thickness direction between which there is a difference in density of included nickel, and a thickness of the lower density region is not less than 1.5-times a thickness of the higher density region. The invention is also a battery electrode substrate that has a structure in which a surface of a plastic fiber in a unwoven fabric is coated with a nickel film, wherein the battery electrode substrate uses a metallic porous body in which a transverse-to-longitudinal ratio of the electrical resistance is not less than two times. The plastic fiber is preferably a fiber that has a core/sheath composite fiber structure in which the core is polypropylene and the sheath is polyethylene.
摘要翻译：提供具有足够的硬度和柔性的收集器以及使用该收集器的电池电极基板。还提供了一种低成本的电池电极基板，其表现出优异的高速率充放电特性和低电阻，并且能够避免由重复的充电/放电引起的循环特性的下降。本发明是一种电池电极基板，其具有将镍膜涂布在机织或非织造织物的塑料纤维的表面上的结构，其中，镍膜的平均覆盖率不小于85的金属多孔体％用来。本发明也是一种包含金属多孔体的收集器，该金属多孔体具有这样的结构，其中织造或非织造织物的塑料纤维的表面被镍膜涂覆，以使其平均覆盖率不小于85％，其中金属多孔体包括至少两层厚度方向上的较低密度区域和较高密度区域，其间存在所包含的镍的密度差，并且较低密度区域的厚度不小于1.5倍较高密度区域的厚度。本发明也是一种电池电极基板，其具有以下结构：无纺布中的塑料纤维的表面被镍膜覆盖，其中，电池电极基板使用金属多孔体，其中横向纵向比的电阻不小于2次。塑料纤维优选是具有芯/皮复合纤维结构的纤维，其中芯是聚丙烯，护套是聚乙烯。

6. 发明授权

US08649234B2 Semiconductor memory device 失效
标题翻译：半导体存储器件
公开(公告)号：US08649234B2
公开(公告)日：2014-02-11
申请号：US13285181
申请日：2011-10-31
申请人： Toshifumi Watanabe , Hidetoshi Saito
发明人： Toshifumi Watanabe , Hidetoshi Saito
IPC分类号： G11C7/00
CPC分类号： G11C7/222 , G11C16/10 , G11C16/32
摘要： According to one embodiment, an interface includes first to third input circuits, delay and selection circuits. The first input circuit outputs an active first internal signal in response to an active first control signal received by a memory device. The second input circuit outputs an active second internal signal in response to an active second control signal received by the device while the device is receiving the active first control signal. The delay circuit outputs a selection signal in first or second states after the elapse of a first period from inactivation or activation of the first control signal. The selection circuit outputs the first and second internal signals as an enable signal while receiving the selection signal of the first and second states. The third input circuit outputs an input signal received from the outside from the interface to inside the device while receiving the active enable signal.
摘要翻译：根据一个实施例，接口包括第一至第三输入电路，延迟和选择电路。第一输入电路响应于由存储器件接收到的有效的第一控制信号而输出有效的第一内部信号。第二输入电路响应于设备在接收到有效的第一控制信号时接收到的有效的第二控制信号而输出有效的第二内部信号。延迟电路在从第一控制信号的失活或激活开始经过第一周期之后，输出第一或第二状态的选择信号。选择电路在接收第一和第二状态的选择信号的同时，将第一和第二内部信号作为使能信号输出。第三输入电路在接收到有效使能信号的同时，将从外部接收的输入信号输出到设备内部。

7. 发明授权

US08542184B2 Driving device and driving method of electrophoretic display 失效
标题翻译：电泳显示器的驱动装置和驱动方法
公开(公告)号：US08542184B2
公开(公告)日：2013-09-24
申请号：US12637020
申请日：2009-12-14
申请人： Hidetoshi Saito
发明人： Hidetoshi Saito
IPC分类号： G09G3/34
CPC分类号： G09G3/344 , G09G2310/0275 , G09G2310/0289 , G09G2310/06 , G09G2370/08
摘要： A driving device of an electrophoretic display panel having a common electrode and a plurality of divided electrodes disposed opposite to the common electrode includes: a first driving circuit that outputs a plurality of voltages corresponding to a plurality of voltage data supplied as a series of data and supplies the plurality of voltages to the plurality of divided electrodes; and a second driving circuit that outputs a voltage corresponding to supplied data and supplies the voltage to the common electrode.
摘要翻译：具有公共电极和与公共电极相对设置的多个分割电极的电泳显示面板的驱动装置包括：第一驱动电路，其输出与作为一系列数据提供的多个电压数据相对应的多个电压;以及将多个电压提供给所述多个分割电极; 以及第二驱动电路，其输出与所提供的数据相对应的电压，并将电压提供给公共电极。

8. 发明授权

US08400376B2 Voltage selection circuit, electrophoretic display apparatus, and electronic device 有权
标题翻译：电压选择电路，电泳显示装置和电子装置
公开(公告)号：US08400376B2
公开(公告)日：2013-03-19
申请号：US12366103
申请日：2009-02-05
申请人： Hidetoshi Saito
发明人： Hidetoshi Saito
IPC分类号： G09G3/30
CPC分类号： G09G3/344 , G09G2300/0814 , Y10T307/696
摘要： Provided is a voltage selection circuit for outputting a potential selected from a plurality of input potentials, the voltage selection circuit capable of selectively outputting a first high-level potential being a highest potential, a second high-level potential, or a third high-level potential being a lowest potential from an output terminal thereof. The voltage selection circuit includes a first switching circuit that supplies the first high-level potential to the output terminal, a second switching circuit that supplies the second high-level potential to the output terminal, and a third switching circuit that supplies the third high-level potential to the output terminal. The first switching circuit includes a high-voltage transistor and a level shifter connected to a gate terminal of the high-voltage transistor. The second switching circuit includes a first low-voltage transistor, a level shifter connected to a gate terminal of the first low-voltage transistor, and a diode disposed between the first low-voltage transistor and the output terminal. The third switching circuit includes a second low-voltage transistor and a diode disposed between the second low-voltage transistor and the output terminal.
摘要翻译：提供了一种电压选择电路，用于输出从多个输入电位中选择的电位，该电压选择电路能够选择性地输出最高电位的第一高电平电位，第二高电位电位或第三高电平电位是其输出端子的最低电位。电压选择电路包括向输出端提供第一高电平电位的第一开关电路，向输出端提供第二高电位电位的第二开关电路和供给第三高电位电位的第三开关电路，电平电位到输出端子。第一开关电路包括高压晶体管和连接到高电压晶体管的栅极端子的电平移位器。第二开关电路包括第一低压晶体管，连接到第一低压晶体管的栅极端子的电平移位器和设置在第一低压晶体管和输出端子之间的二极管。第三开关电路包括第二低压晶体管和设置在第二低压晶体管和输出端之间的二极管。

9. 发明授权

US07739560B2 Nonvolatile semiconductor memory device and method of self-testing the same 有权
标题翻译：非易失性半导体存储器件及其自检方法相同
公开(公告)号：US07739560B2
公开(公告)日：2010-06-15
申请号：US11567995
申请日：2006-12-07
申请人： Hidetoshi Saito
发明人： Hidetoshi Saito
IPC分类号： G11C29/00
CPC分类号： G11C16/0416 , G11C16/04 , G11C16/3459 , G11C29/16 , G11C29/44 , G11C29/48 , G11C29/765 , G11C2029/0409 , G11C2029/1208 , G11C2229/723
摘要： A test interface receives a test command designating execution of a test for a memory cell. The test storage circuit stores test information necessary to execute the test. The test storage circuit includes an erasable programmable storage unit. The decoder decodes the test command input to the test interface, and selects the test information stored in the test storage circuit. The sense amplifier reads out, from the test storage circuit, the test information selected by the decoder. The holding circuit holds the test information read out by the sense amplifier. The control circuit controls a test operation of checking whether the memory cell normally operates, on the basis of the test information held in the holding circuit. The defect storage circuit is formed for the memory cell, and stores fail information indicating that the memory cell is defective if the memory cell does not normally operate in the test operation.
摘要翻译：测试接口接收指定执行存储器单元的测试的测试命令。测试存储电路存储执行测试所需的测试信息。测试存储电路包括可擦除可编程存储单元。解码器对测试接口的测试命令输入进行解码，并选择存储在测试存储电路中的测试信息。读出放大器从测试存储电路读出由解码器选择的测试信息。保持电路保持由读出放大器读出的测试信息。控制电路基于保持在保持电路中的测试信息来控制检查存储单元是否正常工作的测试操作。为存储单元形成缺陷存储电路，并且如果在测试操作中存储单元不正常地操作，则存储指示存储单元有故障的故障信息。

10. 发明申请

US20070165454A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF SELF-TESTING THE SAME 有权
标题翻译：非易失性半导体存储器件及其自身测试方法
公开(公告)号：US20070165454A1
公开(公告)日：2007-07-19
申请号：US11567995
申请日：2006-12-07
申请人： Hidetoshi Saito
发明人： Hidetoshi Saito
IPC分类号： G11C16/04
CPC分类号： G11C16/0416 , G11C16/04 , G11C16/3459 , G11C29/16 , G11C29/44 , G11C29/48 , G11C29/765 , G11C2029/0409 , G11C2029/1208 , G11C2229/723
摘要： A test interface receives a test command designating execution of a test for a memory cell. The test storage circuit stores test information necessary to execute the test. The test storage circuit includes an erasable programmable storage unit. The decoder decodes the test command input to the test interface, and selects the test information stored in the test storage circuit. The sense amplifier reads out, from the test storage circuit, the test information selected by the decoder. The holding circuit holds the test information read out by the sense amplifier. The control circuit controls a test operation of checking whether the memory cell normally operates, on the basis of the test information held in the holding circuit. The defect storage circuit is formed for the memory cell, and stores fail information indicating that the memory cell is defective if the memory cell does not normally operate in the test operation.
摘要翻译：测试接口接收指定执行存储器单元的测试的测试命令。测试存储电路存储执行测试所需的测试信息。测试存储电路包括可擦除可编程存储单元。解码器对测试接口的测试命令输入进行解码，并选择存储在测试存储电路中的测试信息。读出放大器从测试存储电路读出由解码器选择的测试信息。保持电路保持由读出放大器读出的测试信息。控制电路基于保持在保持电路中的测试信息来控制检查存储单元是否正常工作的测试操作。为存储单元形成缺陷存储电路，并且如果在测试操作中存储单元不正常地操作，则存储指示存储单元有故障的故障信息。

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