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1. 发明授权

US08528081B2 Memory system 有权
标题翻译：内存系统
公开(公告)号：US08528081B2
公开(公告)日：2013-09-03
申请号：US12632384
申请日：2009-12-07
申请人： Jimyung Na , Gijin Kang , Jung-Hyun Kim
发明人： Jimyung Na , Gijin Kang , Jung-Hyun Kim
IPC分类号： G06F21/00
CPC分类号： G06F11/1008 , G06F21/54
摘要： A memory system includes a storage device storing a plurality of instructions and a central processing unit processing an instruction fetched from the storage device, wherein the central processing unit detects a change in the instruction fetched from the storage device while processing the instruction.
摘要翻译：存储系统包括存储多个指令的存储装置和处理从存储装置取出的指令的中央处理单元，其中，中央处理单元在处理指令的同时检测从存储装置取出的指令的变化。

2. 发明授权

US08476631B2 Thin film transistor with offset structure and electrodes in a symmetrical arrangement 有权
标题翻译：具有偏移结构的薄膜晶体管和对称布置的电极
公开(公告)号：US08476631B2
公开(公告)日：2013-07-02
申请号：US13084357
申请日：2011-04-11
申请人： Ki-Hong Kim , Jeong-Hwan Kim , Yong-Jae Jang , Jung-Hyun Kim
发明人： Ki-Hong Kim , Jeong-Hwan Kim , Yong-Jae Jang , Jung-Hyun Kim
IPC分类号： H01L29/786
CPC分类号： H01L29/41733 , H01L29/78609 , H01L29/78624 , H01L29/78696
摘要： A thin film transistor (TFT) having an offset structure is disclosed. The TFT maintains a sufficiently low “off” current and a sufficiently high “on” current. The TFT includes an active region. The active region includes a gate electrode; an active layer that overlaps with the gate electrode; a gate insulating layer between the gate electrode and the active layer; and a source/drain electrode layer including source/drain electrodes that are electrically connected to the active region. Some of the source/drain electrodes overlap partially with the gate electrode. Other of the source/drain electrodes are offset from the gate electrode. The source/drain electrodes and the gate electrode are in a symmetrical arrangement.
摘要翻译：公开了一种具有偏移结构的薄膜晶体管（TFT）。 TFT保持足够低的“截止”电流和足够高的“导通”电流。 TFT包括有源区。有源区包括栅电极; 与栅电极重叠的有源层; 栅电极和有源层之间的栅极绝缘层; 以及包括电连接到有源区的源极/漏极的源极/漏极电极层。一些源极/漏极电极部分地与栅电极重叠。源极/漏极中的其他源极与栅电极偏移。源极/漏极和栅电极处于对称的布置。

3. 发明申请

US20130020726A1 PACKAGE MODULE STRUCTURE FOR HIGH POWER DEVICE WITH METAL SUBSTRATE AND METHOD OF MANUFACTURING THE SAME 有权
标题翻译：具有金属基底的高功率器件的封装模块结构及其制造方法
公开(公告)号：US20130020726A1
公开(公告)日：2013-01-24
申请号：US13520284
申请日：2010-02-16
申请人： Kyoung-Min Kim , Jung-Hyun Kim
发明人： Kyoung-Min Kim , Jung-Hyun Kim
IPC分类号： H01L29/02 , H01L21/56
CPC分类号： H01L23/367 , H01L23/4006 , H01L23/562 , H01L2224/32245
摘要： A method of manufacturing a package module structure of a high power device using a metal substrate that can improve reliability by minimizing stress due to a thermal expansion coefficient difference between a metal substrate and a semiconductor device includes: preparing a metal substrate; forming an oxide layer by selectively anodizing the metal substrate; forming a mounting groove for mounting a semiconductor device by etching a portion of the oxide layer; installing a shock-absorbing substrate that is made of a material having a thermal expansion coefficient in a range similar to a material of a semiconductor device to expose the entirety or a portion of a bottom portion of the mounting groove; mounting the semiconductor device in the shock-absorbing substrate exposed to the mounting groove; and electrically connecting an electrode terminal of the semiconductor device and an electrode line formed in an upper surface of the oxide layer.
摘要翻译：一种使用能够通过使由于金属基板与半导体器件之间的热膨胀系数差导致的应力最小化而提高可靠性的金属基板的高功率器件的封装模块结构的制造方法，其特征在于，包括：准备金属基板; 通过选择性地阳极氧化金属基底来形成氧化物层; 通过蚀刻所述氧化物层的一部分形成用于安装半导体器件的安装槽; 安装由具有与半导体器件的材料类似的范围内的热膨胀系数的材料制成的吸震衬底，以露出安装槽的整个或一部分底部; 将半导体器件安装在暴露于安装槽的减震基板中; 并且电连接半导体器件的电极端子和形成在氧化物层的上表面中的电极线。

4. 发明申请

US20110297937A1 THIN FILM TRANSISTOR WITH OFFSET STRUCTURE 有权
标题翻译：具有偏移结构的薄膜晶体管
公开(公告)号：US20110297937A1
公开(公告)日：2011-12-08
申请号：US13084357
申请日：2011-04-11
申请人： Ki-Hong Kim , Jeong-Hwan Kim , Yong-Jae Jang , Jung-Hyun Kim
发明人： Ki-Hong Kim , Jeong-Hwan Kim , Yong-Jae Jang , Jung-Hyun Kim
IPC分类号： H01L29/04
CPC分类号： H01L29/41733 , H01L29/78609 , H01L29/78624 , H01L29/78696
摘要： A thin film transistor (TFT) having an offset structure is disclosed. The TFT maintains a sufficiently low “off” current and a sufficiently high “on” current. The TFT includes an active region. The active region includes a gate electrode; an active layer that overlaps with the gate electrode; a gate insulating layer between the gate electrode and the active layer; and a source/drain electrode layer including source/drain electrodes that are electrically connected to the active region. Some of the source/drain electrodes overlap partially with the gate electrode. Other of the source/drain electrodes are offset from the gate electrode. The source/drain electrodes and the gate electrode are in a symmetrical arrangement.
摘要翻译：公开了一种具有偏移结构的薄膜晶体管（TFT）。 TFT保持足够低的“截止”电流和足够高的“导通”电流。 TFT包括有源区。有源区包括栅电极; 与栅电极重叠的有源层; 栅电极和有源层之间的栅极绝缘层; 以及包括电连接到有源区的源极/漏极的源极/漏极电极层。一些源极/漏极电极部分地与栅电极重叠。源极/漏极中的其他源极与栅电极偏移。源极/漏极和栅电极处于对称的布置。

5. 发明申请

US20100174888A1 Memory System 有权
标题翻译：内存系统
公开(公告)号：US20100174888A1
公开(公告)日：2010-07-08
申请号：US12632384
申请日：2009-12-07
申请人： Jimyung Na , Gijin Kang , Jung-Hyun Kim
发明人： Jimyung Na , Gijin Kang , Jung-Hyun Kim
IPC分类号： H03M13/09 , G06F9/30 , G06F11/10
CPC分类号： G06F11/1008 , G06F21/54
摘要： A memory system includes a storage device storing a plurality of instructions and a central processing unit processing an instruction fetched from the storage device, wherein the central processing unit detects a change in the instruction fetched from the storage device while processing the instruction.
摘要翻译：存储系统包括存储多个指令的存储装置和处理从存储装置取出的指令的中央处理单元，其中，中央处理单元在处理指令的同时检测从存储装置取出的指令的变化。

6. 发明申请

US20100022006A1 GAMMA SATELLITE INSULATOR SEQUENCES AND THEIR USE IN PREVENTING GENE SILENCING 有权
标题翻译： GAMMA卫星绝缘子序列及其在预防基因沉默中的应用
公开(公告)号：US20100022006A1
公开(公告)日：2010-01-28
申请号：US12527122
申请日：2008-02-15
申请人： Jung-Hyun Kim , Vladimir L. Larionov , Tom Ebersole
发明人： Jung-Hyun Kim , Vladimir L. Larionov , Tom Ebersole
IPC分类号： C12N15/85 , C12N15/87
CPC分类号： C12N15/85 , C12N2830/46
摘要： Regulatory elements, specifically insulators and transgene constructs containing insulator nucleic acid sequences, are disclosed herein. Methods of using insulators and transgene constructs including insulators to inhibit, delay, or prevent gene silencing are also disclosed herein.
摘要翻译：本文公开了包含绝缘体核酸序列的调节元件，特别是绝缘体和转基因构建体。本文还公开了使用绝缘体和转基因构建体的方法，包括用于抑制，延迟或预防基因沉默的绝缘体。

7. 发明申请

US20090309656A1 MULTIPLE OUTPUT POWER MODE AMPLIFIER 有权
标题翻译：多路输出功率模式放大器
公开(公告)号：US20090309656A1
公开(公告)日：2009-12-17
申请号：US12544308
申请日：2009-08-20
申请人： Moon-Suk Jeon , Jung-Hyun Kim , Youngwoo Kwon
发明人： Moon-Suk Jeon , Jung-Hyun Kim , Youngwoo Kwon
IPC分类号： H03F1/00
CPC分类号： H03F1/0211 , H03F1/56
摘要： A multi-mode power amplifier and an electronic device including the amplifier are described.
摘要翻译：描述了包括放大器的多模功率放大器和电子装置。

8. 发明申请

US20050000388A1 Preparation method of solvent-free water-dispersible hydroxypropyl methly cellulose phthalate nanoparticle 失效
标题翻译：无溶剂水分散性羟丙基甲基纤维素邻苯二甲酸酯纳米粒子的制备方法
公开(公告)号：US20050000388A1
公开(公告)日：2005-01-06
申请号：US10250790
申请日：2001-11-22
申请人： Kyu-II Cho , Hyon-Ho Baek , Jung-Hyun Kim , Jun Lee , Il Kim , Jung Park
发明人： Kyu-II Cho , Hyon-Ho Baek , Jung-Hyun Kim , Jun Lee , Il Kim , Jung Park
IPC分类号： C08B13/00 , A61K9/28 , B01D61/14 , B01F17/42 , B01F17/52 , B01F17/56 , B01J19/00 , B01J39/04 , C08B15/02 , C08J3/16 , C08L1/32 , C08L1/26
CPC分类号： C08J3/16 , A61K9/2866 , C08J2301/32 , C08L1/32
摘要： The present invention relates to a preparation method of solvent-free water-dispersible hydroxypropyl methyl cellulose phthalate nanoparticle, and more particularly, to a preparation method of solvent-free water-dispersible hydroxypropyl methyl cellulose phthalate nanoparticle, which is environment-friendly and advantageous in disintegration and dissolution when used as an enteric coating material, which is prepared by obtaining suitable hydroxypropyl methyl cellulose phthalate (HPMCP) particle through aqueous emulsification process and regulating content of remaining electrolyte through ion exchange process.
摘要翻译：本发明涉及无溶剂的水分散性羟丙基甲基纤维素邻苯二甲酸酯纳米颗粒的制备方法，更具体地涉及一种无溶剂的水分散型羟丙基甲基纤维素邻苯二甲酸酯纳米颗粒的制备方法，其环境友好且有利于用作肠溶衣材料时的崩解和溶解，其通过水乳化方法获得合适的羟丙基甲基纤维素邻苯二甲酸酯（HPMCP）颗粒并通过离子交换方法调节剩余电解质的含量来制备。

9. 发明申请

US20110029768A1 METHOD FOR TRANSMITTING CONTENTS FOR CONTENTS MANAGEMENT TECHNOLOGY INTERWORKING, AND RECORDING MEDIUM FOR STORING PROGRAM THEREOF 有权
标题翻译：用于内容管理技术交互的内容传输方法及其存储程序的记录介质
公开(公告)号：US20110029768A1
公开(公告)日：2011-02-03
申请号：US12674039
申请日：2007-12-20
申请人： Do-Won Nam , Yeon-Jeong Jeong , Ki-Song Yoon , Jung-Hyun Kim , Jee-Hyun Park , Jung-Soo Lee
发明人： Do-Won Nam , Yeon-Jeong Jeong , Ki-Song Yoon , Jung-Hyun Kim , Jee-Hyun Park , Jung-Soo Lee
IPC分类号： G06F15/16 , H04L9/00
CPC分类号： G06F21/10 , G06F21/62 , G06F2221/0728 , G06F2221/0759
摘要： A DRM technique interoperability system includes an exporter and an importer. The exporter cancels the DRM technique from the contents to which the DRM technique of a DRM device is applied to generate a contents stream, generates a plurality of packets from the contents stream, and transmits the packets to the importer. The importer receives a plurality of packets from the exporter, generates a contents stream from the plurality of packets, applies a DRM technique of a second DRM device to the contents stream, and provides it to the second DRM device.
摘要翻译： DRM技术互操作系统包括出口商和进口商。出口商从应用DRM设备的DRM技术的内容取消DRM技术以生成内容流，从内容流生成多个分组，并将该分组发送到进口商。导入器从出口者接收多个分组，从多个分组生成内容流，将第二DRM设备的DRM技术应用于内容流，并将其提供给第二DRM设备。

10. 发明授权

US07483328B2 Voltage glitch detection circuits and methods thereof 有权
标题翻译：电压毛刺检测电路及其方法
公开(公告)号：US07483328B2
公开(公告)日：2009-01-27
申请号：US11434933
申请日：2006-05-17
申请人： Eui-Seung Kim , Jung-Hyun Kim
发明人： Eui-Seung Kim , Jung-Hyun Kim
IPC分类号： G11C5/01
CPC分类号： G11C7/1051 , G11C7/02 , G11C7/06 , G11C7/1063 , G11C29/026
摘要： Voltage glitch detection circuits and methods thereof. The voltage glitch detection circuit may include a monitoring memory array including at least one memory cell storing reference data, a monitoring sense amplifier receiving stored reference data from the monitoring memory array, amplifying the received stored reference data in response to an operation control signal and outputting data based on the reference data, a data storage circuit including at least one latch to store the reference data and a comparator circuit receiving and comparing the data output from the monitoring sense amplifier and the stored reference data from the data storage circuit, and outputting a detection signal based on the comparison. The voltage glitch detection circuit may include a first storage unit configured to latch a first voltage, a second storage unit configured to latch a second voltage, a first comparator circuit first comparing the latched first voltage with a first reference voltage and outputting a first comparison result, a second compariator circuit second comparing the second voltage with a second reference voltage and outputting a second comparison result and a third comparator circuit third comparing the first and second comparison results and outputting a reset detection signal based on the third comparison.
摘要翻译：电压毛刺检测电路及其方法。电压毛刺检测电路可以包括监视存储器阵列，其包括存储参考数据的至少一个存储器单元，监视读出放大器，接收来自监视存储器阵列的存储的参考数据，响应于操作控制信号放大所接收的存储的参考数据并输出基于参考数据的数据的数据存储电路，包括用于存储参考数据的至少一个锁存器的数据存储电路;以及比较器电路，接收和比较来自监视读出放大器的数据和来自数据存储电路的存储的参考数据，检测信号基于比较。电压毛刺检测电路可以包括被配置为锁存第一电压的第一存储单元，被配置为锁存第二电压的第二存储单元，第一比较器电路，首先将锁存的第一电压与第一参考电压进行比较，并输出第一比较结果第二比较器电路，其将所述第二电压与第二参考电压进行比较，并输出第二比较结果;以及第三比较器电路，其对所述第一和第二比较结果进行比较，并输出基于所述第三比较的复位检测信号。

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