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    • 1. 发明授权
    • Integrated circuit memory devices with improved layout of fuse boxes and
buses
    • 集成电路存储器件,具有改进的保险丝盒和总线布局
    • US6094382A
    • 2000-07-25
    • US200008
    • 1998-11-25
    • Jong-Hyun ChoiJun-Young Jeon
    • Jong-Hyun ChoiJun-Young Jeon
    • G11C11/401G11C29/00G11C29/04H01L21/8242H01L27/108G11C7/00
    • G11C29/80
    • A row redundancy fuse box that replaces a defective row with a redundant row of an integrated circuit memory device is located between a row decoder, a row predecoder and a subarray block control circuit. By locating the row redundancy fuse box between the row decoder and the subarray block control circuit, the size of an integrated circuit memory device and the bus line loading in the device may be reduced. A row predecoder is coupled to the row redundancy fuse box and is located remote from the row decoder, the subarray block control circuit and the row redundancy fuse box. A column decoder is located adjacent the row predecoder and remote from the row decoder, the subarray block control circuit and the row redundancy fuse box. A pad layer receives and transmits external input and output signals respectively, and is located adjacent the subarray block control circuit, opposite the row redundancy fuse box. The predecoded row address bus and the row decoder overlap one another in the integrated circuit memory device. More specifically, the row decoder is preferably beneath the predecoded row address bus in the integrated circuit memory device. This can also decrease the size of the integrated circuit memory device. According to another aspect, the redundancy enable bus extends from the fuse box, up to but not beyond the predecoded row address bus.
    • 行冗余保险丝盒用于替代具有集成电路存储器件的冗余行的有缺陷的行位于行解码器,行预解码器和子阵列块控制电路之间。 通过将行冗余保险丝盒定位在行解码器和子阵列块控制电路之间,可以减小集成电路存储器件的尺寸和装载中的总线线路。 一行预解码器耦合到行冗余保险丝盒,并且位于远离行解码器,子阵列控制电路和行冗余保险丝盒的位置。 列解码器位于行预解码器附近并且远离行解码器,子阵列控制电路和行冗余保险丝盒。 衬垫层分别接收和发送外部输入和输出信号,并且位于与阵列冗余保险丝盒相对的子阵列控制电路附近。 预解码行地址总线和行解码器在集成电路存储器件中彼此重叠。 更具体地,行解码器优选地在集成电路存储器件中的预编码行地址总线下方。 这也可以减小集成电路存储器件的尺寸。 根据另一方面,冗余使能总线从保险丝盒延伸到但不超过预先解码的行地址总线。
    • 2. 发明授权
    • Integrated circuit packaging systems and methods that use the same packaging substrates for integrated circuits of different data path widths
    • 集成电路封装系统和方法,使用不同数据路径宽度的集成电路的相同封装基板
    • US06274931B1
    • 2001-08-14
    • US09395649
    • 1999-09-14
    • Jun-Young JeonJong-Hyun Choi
    • Jun-Young JeonJong-Hyun Choi
    • H01L2348
    • H01L23/49838H01L21/485H01L23/50H01L23/5256H01L2924/0002H01L2924/00
    • Integrated circuit packages include an integrated circuit substrate having microelectronic devices therein and pads, wherein first ones of the pads are enabled to provide output data from the microelectronic devices, and wherein second ones of the pads are disabled to provide a reduced path width for the integrated circuit substrate. A packaging substrate includes terminals, a respective one of which is connected to a respective one of the pads, including the second ones of pads that are disabled to provide a reduced path width for the integrated circuit substrate. Accordingly, the same packaging substrates may be used with integrated circuit substrates having different path widths. In a preferred embodiment, the integrated circuit substrate includes a control circuit that disables the second ones of the pads to provide a reduced path width for the integrated circuit substrate. The control circuit preferably includes at least one fuse that disables the second ones of pads to provide the reduced path width for the integrated circuit substrate.
    • 集成电路封装包括其中具有微电子器件的集成电路衬底和焊盘,其中第一焊盘能够提供来自微电子器件的输出数据,并且其中第二焊盘被禁用以提供集成的减小的路径宽度 电路基板。 封装基板包括端子,其中的一个连接到相应的一个焊盘,包括禁用以提供集成电路基板的减小的路径宽度的第二焊盘。 因此,相同的封装基板可以与具有不同路径宽度的集成电路基板一起使用。 在优选实施例中,集成电路基板包括禁止第二个焊盘以提供集成电路基板的减小路径宽度的控制电路。 控制电路优选地包括至少一个保险丝,其禁用第二个焊盘以为集成电路基板提供减小的路径宽度。
    • 4. 发明授权
    • Organic light emitting display apparatus and method of manufacturing the same
    • 有机发光显示装置及其制造方法
    • US08575609B2
    • 2013-11-05
    • US13200826
    • 2011-10-03
    • Jong-Hyun Choi
    • Jong-Hyun Choi
    • H01L29/04
    • H01L27/3265H01L27/3258
    • An organic light emitting display apparatus includes a substrate, a thin film transistor formed on the substrate and comprising an active layer, a gate electrode, a source electrode, and a drain electrode, a first gate insulation layer arranged between the gate electrode and the active layer and including an opening portion, a first electrode arranged between the substrate and the first gate insulation layer to overlap the opening portion, an intermediate layer formed on the first electrode and including an organic light emitting layer, a second electrode formed on the intermediate layer, and a capacitor including a first capacitor electrode that is arranged between the substrate and the first gate insulation layer and a second capacitor electrode that is arranged on an upper surface of the first gate insulation layer.
    • 一种有机发光显示装置,包括:基板,形成在基板上的薄膜晶体管,具有有源层,栅电极,源电极和漏电极,配置在栅电极和活性层之间的第一栅极绝缘层 并且包括开口部分,布置在所述基板和所述第一栅极绝缘层之间以与所述开口部分重叠的第一电极,形成在所述第一电极上并包括有机发光层的中间层,形成在所述中间层上的第二电极 以及电容器,其包括布置在所述基板和所述第一栅极绝缘层之间的第一电容器电极和布置在所述第一栅极绝缘层的上表面上的第二电容器电极。
    • 5. 发明申请
    • ORGANIC LIGHT-EMITTING DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
    • 有机发光显示装置及其制造方法
    • US20130288413A1
    • 2013-10-31
    • US13928120
    • 2013-06-26
    • Jong-Hyun ChoiJong-Yun KimJin-Goo KangDae-Hyun Noh
    • Jong-Hyun ChoiJong-Yun KimJin-Goo KangDae-Hyun Noh
    • H01L51/56
    • H01L51/56H01L27/3246
    • An organic light-emitting display device including a substrate; at least one thin-film transistor (TFT) formed on the substrate; a planarizing layer covering the TFT; a pixel electrode, which is formed on the planarizing layer and is connected to the TFT; a protective layer surrounding an edge of the pixel electrode; a pixel defining layer (PDL), which has an overhang (OH) structure protruding more than the top surface of the protective layer, covers the protective layer and the edge of the pixel electrode, and exposes a portion of the pixel electrode surrounded by the protective layer; a counter electrode facing the pixel electrode; and an intermediate layer, which is interposed between the pixel electrode and the counter electrode and includes a light-emitting layer and at least one organic layer, where the thickness of the intermediate layer is greater than the thickness of the protective layer.
    • 一种有机发光显示装置,包括:基板; 在所述基板上形成的至少一个薄膜晶体管(TFT); 覆盖TFT的平坦化层; 像素电极,其形成在平坦化层上并连接到TFT; 围绕像素电极的边缘的保护层; 具有比保护层的顶表面突出的突出(OH)结构的像素限定层(PDL)覆盖保护层和像素电极的边缘,并且暴露由像素电极包围的像素电极的一部分 保护层; 面对像素电极的对置电极; 以及中间层,其介于像素电极和对电极之间,并且包括发光层和至少一个有机层,其中中间层的厚度大于保护层的厚度。
    • 7. 发明授权
    • Organic light emitting diode display and method of manufacturing the same
    • 有机发光二极管显示器及其制造方法
    • US08455876B2
    • 2013-06-04
    • US12805702
    • 2010-08-16
    • Jong-Hyun ChoiJune-Woo LeeKwang-Hae KimKyoung-Bo Kim
    • Jong-Hyun ChoiJune-Woo LeeKwang-Hae KimKyoung-Bo Kim
    • H01L33/16H01L29/786
    • H01L27/1251H01L27/1225H01L27/3262
    • An OLED display including a substrate main body; a first gate electrode and a second semiconductor layer; a gate insulating layer on the first gate electrode and the second semiconductor layer; a first semiconductor layer and a second gate electrode overlying the first gate electrode and the second semiconductor layer, respectively; etching stopper layers contacting portions of the first semiconductor layer; an interlayer insulating layer on the first semiconductor layer and the second gate electrode and including contact holes exposing the plurality of etching stopper layers, respectively; a first source electrode and a first drain electrode on the interlayer insulating layer and the contact holes being indirectly connected to the first semiconductor layer via the etching stopper layers or directly connected to the first semiconductor layer; and a second source electrode and a second drain electrode on the interlayer insulating layer being connected to the second semiconductor layer.
    • 一种OLED显示器,包括:基板主体; 第一栅电极和第二半导体层; 在第一栅电极和第二半导体层上的栅极绝缘层; 分别覆盖所述第一栅电极和所述第二半导体层的第一半导体层和第二栅电极; 蚀刻阻挡层接触第一半导体层的部分; 在所述第一半导体层和所述第二栅电极上的层间绝缘层,并且包括分别暴露所述多个蚀刻停止层的接触孔; 层间绝缘层上的第一源电极和第一漏电极,并且所述接触孔经由所述蚀刻停止层间接地连接到所述第一半导体层,或者直接连接到所述第一半导体层; 并且所述层间绝缘层上的第二源极和第二漏极连接到所述第二半导体层。