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1. 发明申请

US20130009226A1 DRAM DEVICES AND METHODS OF MANUFACTURING THE SAME 有权
标题翻译： DRAM器件及其制造方法
公开(公告)号：US20130009226A1
公开(公告)日：2013-01-10
申请号：US13540816
申请日：2012-07-03
申请人： Jong-Chul Park , Byung-Jin Kang , Sang-Sup Jeong
发明人： Jong-Chul Park , Byung-Jin Kang , Sang-Sup Jeong
IPC分类号： H01L21/8242 , H01L27/108
CPC分类号： H01L27/10888 , H01L21/76816 , H01L21/76897 , H01L27/10855 , H01L27/10876 , H01L27/10894
摘要： A DRAM device includes a substrate including an active region having an island shape and a buried gate pattern. A mask pattern is over an upper surface portion of the substrate between portions of the buried gate pattern. A capping insulating layer fills a gap between portions of the mask pattern. A first pad contact penetrates the capping insulating layer and the mask pattern, and contacts a first portion of the substrate in the active region. Second pad contacts are under the capping insulating layer, and contact a second portion of the substrate in the active region positioned at both sides of the first pad contact. A spacer is between the first and second pad contacts to insulate the first and second pad contacts. A bit line configured to electrically connect with the first pad contact, and a capacitor configured to electrically connect with the second pad contacts, are provided.
摘要翻译： DRAM器件包括具有岛形状的有源区和掩埋栅极图案的衬底。掩模图案位于掩埋栅极图案的部分之间的衬底的上表面部分之上。封盖绝缘层填充掩模图案的部分之间的间隙。第一焊盘接触件穿透封盖绝缘层和掩模图案，并且与有源区域中的基板的第一部分接触。第二焊盘触点位于封盖绝缘层下方，并且接触位于第一焊盘触点两侧的有源区域中的基板的第二部分。间隔物位于第一和第二焊盘触点之间，以使第一和第二焊盘触点绝缘。提供了构造成与第一焊盘触点电连接的位线和被配置为与第二焊盘触点电连接的电容器。

2. 发明授权

US08906763B2 Method of manufacturing a dynamic random access memory (DRAM) including forming contact pads of adjacent cells by laterally etching a contact opening of a cell therebetween 有权
标题翻译：制造动态随机存取存储器（DRAM）的方法，包括通过横向蚀刻其间的单元的接触开口来形成相邻单元的接触垫
公开(公告)号：US08906763B2
公开(公告)日：2014-12-09
申请号：US13540816
申请日：2012-07-03
申请人： Jong-Chul Park , Byung-Jin Kang , Sang-Sup Jeong
发明人： Jong-Chul Park , Byung-Jin Kang , Sang-Sup Jeong
IPC分类号： H01L21/8242 , H01L27/108 , H01L21/768
CPC分类号： H01L27/10888 , H01L21/76816 , H01L21/76897 , H01L27/10855 , H01L27/10876 , H01L27/10894
摘要： A DRAM device includes a substrate including an active region having an island shape and a buried gate pattern. A mask pattern is over an upper surface portion of the substrate between portions of the buried gate pattern. A capping insulating layer fills a gap between portions of the mask pattern. A first pad contact penetrates the capping insulating layer and the mask pattern, and contacts a first portion of the substrate in the active region. Second pad contacts are under the capping insulating layer, and contact a second portion of the substrate in the active region positioned at both sides of the first pad contact. A spacer is between the first and second pad contacts to insulate the first and second pad contacts. A bit line configured to electrically connect with the first pad contact, and a capacitor configured to electrically connect with the second pad contacts, are provided.
摘要翻译： DRAM器件包括具有岛形状的有源区和掩埋栅极图案的衬底。掩模图案位于掩埋栅极图案的部分之间的衬底的上表面部分之上。封盖绝缘层填充掩模图案的部分之间的间隙。第一焊盘接触件穿透封盖绝缘层和掩模图案，并且与有源区域中的基板的第一部分接触。第二焊盘触点位于封盖绝缘层下方，并且接触位于第一焊盘触点两侧的有源区域中的基板的第二部分。间隔物位于第一和第二焊盘触点之间，以使第一和第二焊盘触点绝缘。提供了构造成与第一焊盘触点电连接的位线和被配置为与第二焊盘触点电连接的电容器。

3. 发明申请

US20120132970A1 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING THE SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120132970A1
公开(公告)日：2012-05-31
申请号：US13306112
申请日：2011-11-29
申请人： Jongchul PARK , Sangsup Jeong , Byung-Jin Kang
发明人： Jongchul PARK , Sangsup Jeong , Byung-Jin Kang
IPC分类号： H01L23/48 , H01L27/06 , H01L29/78
CPC分类号： H01L27/10897 , H01L21/76804 , H01L21/76831 , H01L27/10844 , H01L27/10855 , H01L27/10888
摘要： Provided are semiconductor devices and methods of manufacturing the same. The semiconductor device may include a substrate provided with a transistor, an insulating layer disposed on the substrate, the insulating layer including a contact hole exposing a portion of the transistor, a spacer disposed on an inner sidewall of the contact hole, and a contact plug disposed in the contact hole. Here, a space defined by the spacer may increase in width from a bottom side thereof to a top side thereof.
摘要翻译：提供半导体器件及其制造方法。半导体器件可以包括设置有晶体管的衬底，设置在衬底上的绝缘层，绝缘层包括暴露晶体管的一部分的接触孔，设置在接触孔的内侧壁上的间隔件和接触插塞设置在接触孔中。这里，由间隔件限定的空间的宽度可以从其底侧增加到其顶侧。

4. 发明授权

US08581314B2 Semiconductor devices having spacers disposed on an inner sidewall of a contact hole formed in a layer of the semiconductor devices, and a contact plug disposed therein 有权
标题翻译：具有设置在形成在半导体器件的层中的接触孔的内侧壁上的间隔物的半导体器件和设置在其中的接触插塞
公开(公告)号：US08581314B2
公开(公告)日：2013-11-12
申请号：US13306112
申请日：2011-11-29
申请人： Jongchul Park , Sangsup Jeong , Byung-Jin Kang
发明人： Jongchul Park , Sangsup Jeong , Byung-Jin Kang
IPC分类号： H01L29/94
CPC分类号： H01L27/10897 , H01L21/76804 , H01L21/76831 , H01L27/10844 , H01L27/10855 , H01L27/10888
摘要： Provided are semiconductor devices that may include a substrate provided with a transistor, an insulating layer disposed on the substrate, the insulating layer including a contact hole exposing a portion of the transistor, a spacer disposed on an inner sidewall of the contact hole, and a contact plug disposed in the contact hole. Here, a space defined by the spacer may increase in width from a bottom side thereof to a top side thereof.
摘要翻译：提供的半导体器件可以包括设置有晶体管的衬底，设置在衬底上的绝缘层，绝缘层包括暴露晶体管的一部分的接触孔，设置在接触孔的内侧壁上的间隔件和接触插头设置在接触孔中。这里，由间隔件限定的空间的宽度可以从其底侧增加到其顶侧。

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