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1. 发明申请

US20120108048A1 THREE-DIMENSIONAL SEMICONDUCTOR DEVICES AND METHODS OF FABRICATING THE SAME 审中-公开
标题翻译：三维半导体器件及其制造方法
公开(公告)号：US20120108048A1
公开(公告)日：2012-05-03
申请号：US13286384
申请日：2011-11-01
申请人： Jong Heun Lim , Jae Joo Shim , Hyo Jung Kim , Kyung Hyun Kim , Chang Sup Mun
发明人： Jong Heun Lim , Jae Joo Shim , Hyo Jung Kim , Kyung Hyun Kim , Chang Sup Mun
IPC分类号： H01L21/28
CPC分类号： H01L21/28 , H01L27/11529 , H01L27/11548 , H01L27/11556 , H01L27/1157 , H01L27/11573 , H01L27/11575 , H01L27/11582
摘要： A method of fabricating a three-dimensional semiconductor memory device includes providing a substrate which includes a cell array region and a peripheral region. The method further includes a peripheral structure on the peripheral region of the substrate, where the peripheral structure includes peripheral circuits and is configured to expose the cell array region of the substrate. The method further includes forming a lower cell structure on the cell array region of the substrate, forming an insulating layer to cover the peripheral structure and the lower cell structure on the substrate, planarizing the insulating layer using top surfaces of the peripheral structure and the lower cell structure as a planarization stop layer, and forming an upper cell structure on the lower cell structure.
摘要翻译：一种制造三维半导体存储器件的方法包括提供包括单元阵列区域和周边区域的衬底。该方法还包括在基板的外围区域上的周边结构，其中外围结构包括外围电路并且被配置为暴露基板的单元阵列区域。该方法还包括在基板的单元阵列区域上形成下单元结构，形成绝缘层以覆盖基板上的外围结构和下单元结构，使用外围结构的顶表面和下层单元平面化绝缘层电池结构作为平坦化停止层，并在下电池结构上形成上电池结构。

2. 发明授权

US08345405B2 Multilayer ceramic capacitor 失效
标题翻译：多层陶瓷电容器
公开(公告)号：US08345405B2
公开(公告)日：2013-01-01
申请号：US12768993
申请日：2010-04-28
申请人： Ji Hun Jeong , Hyo Jung Kim , Hyo Jung Kim , Dong Ik Chang , Doo Young Kim
发明人： Ji Hun Jeong , Hyo Jung Kim , Hyo Jung Kim , Dong Ik Chang , Doo Young Kim
IPC分类号： H01G4/06
CPC分类号： H01G4/1227 , H01G4/005
摘要： Disclosed is multilayer ceramic capacitor. The multilayer ceramic capacitor includes a capacitive part including dielectric layers and first and second internal electrodes alternately laminated therein, wherein the dielectric layers include first ceramic particles having an average particle size of 0.1 μm to 0.3 μm, and one set of ends of the first internal electrodes and one set of ends of the second internal electrodes are exposed in a lamination direction of the dielectric layers, a protective layer formed on at least one of top and bottom surfaces of the capacitive part, including second ceramic particles and having a porosity of 2% to 4%, wherein an average particle size ratio of the second ceramic particles to the first ceramic particles ranges from 1.1 to 1.3; and first and second external electrodes electrically connected to the first and second internal electrodes exposed in the lamination direction of the dielectric layers.
摘要翻译：公开了多层陶瓷电容器。所述多层陶瓷电容器包括电容部，所述电容部包括电介质层和交替层叠的第一和第二内部电极，其中所述电介质层包括平均粒径为0.1μm〜0.3μm的第一陶瓷粒子，以及所述第一内部电极的一组端部电极和第二内部电极的一组端部沿电介质层的层叠方向露出，形成在电容部分的顶表面和底表面中的至少一个上的保护层，包括第二陶瓷颗粒，孔隙率为2 ％至4％，其中第二陶瓷颗粒与第一陶瓷颗粒的平均粒径比为1.1至1.3; 以及电连接到在电介质层的层叠方向上露出的第一和第二内部电极的第一外部电极和第二外部电极。

3. 发明申请

US20110141655A1 MULTILAYER CERAMIC CAPACITOR 失效
标题翻译：多层陶瓷电容器
公开(公告)号：US20110141655A1
公开(公告)日：2011-06-16
申请号：US12768993
申请日：2010-04-28
申请人： Ji Hun Jeong , Hyo Jung Kim , Hyo Jung Kim , Dong Ik Chang , Doo Young Kim
发明人： Ji Hun Jeong , Hyo Jung Kim , Hyo Jung Kim , Dong Ik Chang , Doo Young Kim
IPC分类号： H01G4/12 , H01G4/005
CPC分类号： H01G4/1227 , H01G4/005
摘要： Disclosed is multilayer ceramic capacitor. The multilayer ceramic capacitor includes a capacitive part including dielectric layers and first and second internal electrodes alternately laminated therein, wherein the dielectric layers include first ceramic particles having an average particle size of 0.1 μm to 0.3 μm, and one set of ends of the first internal electrodes and one set of ends of the second internal electrodes are exposed in a lamination direction of the dielectric layers, a protective layer formed on at least one of top and bottom surfaces of the capacitive part, including second ceramic particles and having a porosity of 2% to 4%, wherein an average particle size ratio of the second ceramic particles to the first ceramic particles ranges from 1.1 to 1.3; and first and second external electrodes electrically connected to the first and second internal electrodes exposed in the lamination direction of the dielectric layers.
摘要翻译：公开了多层陶瓷电容器。所述多层陶瓷电容器包括电容部，所述电容部包括电介质层和交替层叠的第一和第二内部电极，其中所述电介质层包括平均粒径为0.1μm〜0.3μm的第一陶瓷粒子，以及所述第一内部电极的一组端部电极和第二内部电极的一组端部沿电介质层的层叠方向露出，形成在电容部分的顶表面和底表面中的至少一个上的保护层，包括第二陶瓷颗粒，孔隙率为2 ％至4％，其中第二陶瓷颗粒与第一陶瓷颗粒的平均粒径比为1.1至1.3; 以及电连接到在电介质层的层叠方向上露出的第一和第二内部电极的第一外部电极和第二外部电极。

4. 发明申请

US20120151763A1 METHOD OF MANUFACTURING MULTILAYER CERAMIC ELECTRONIC COMPONENT AND MULTILAYER CERAMIC ELECTRONIC COMPONENT USING THE SAME 审中-公开
标题翻译：使用该方法制造多层陶瓷电子元件和多层陶瓷电子元件
公开(公告)号：US20120151763A1
公开(公告)日：2012-06-21
申请号：US13091797
申请日：2011-04-21
申请人： Seon Gu JUNG , Hyo Jung Kim , Jin Hyung Lim , Doo Young Kim
发明人： Seon Gu JUNG , Hyo Jung Kim , Jin Hyung Lim , Doo Young Kim
IPC分类号： H05K3/10
CPC分类号： H01G4/12 , H01G4/012 , H01G4/30 , Y10T29/49155
摘要： Disclosed are a method of manufacturing multilayer ceramic electronic components and a multilayer ceramic electronic component using the same. There is provided a method of preparing a plurality of ceramic layers including a first side, a second side, a third side, and a fourth side; printing a first inner electrode pattern and a second inner electrode pattern on the ceramic layers, the first inner electrode pattern and the second inner electrode pattern being exposed to the first side or the third side and having concave portions in the second side and fourth side directions; and stacking and compressing the plurality of ceramic layers printed with the first inner electrode pattern and the second inner electrode pattern.
摘要翻译：公开了一种制造多层陶瓷电子部件的方法和使用其的多层陶瓷电子部件。提供一种制备包括第一侧，第二侧，第三侧和第四侧的多个陶瓷层的方法; 在陶瓷层上印刷第一内部电极图案和第二内部电极图案，第一内部电极图案和第二内部电极图案暴露于第一侧面或第三侧面，并且在第二侧面和第四侧面方向上具有凹部 ; 并且堆叠和压缩印刷有第一内部电极图案和第二内部电极图案的多个陶瓷层。

5. 发明授权

US08390983B2 Multilayer ceramic capacitor 失效
标题翻译：多层陶瓷电容器
公开(公告)号：US08390983B2
公开(公告)日：2013-03-05
申请号：US12766161
申请日：2010-04-23
申请人： Ji Hun Jeong , Hyo Jung Kim , Dong Ik Chang , Doo Young Kim
发明人： Ji Hun Jeong , Hyo Jung Kim , Dong Ik Chang , Doo Young Kim
IPC分类号： H01G4/06 , C04B35/00
CPC分类号： H01G4/12 , H01G4/30
摘要： Disclosed is a multilayer ceramic capacitor. The multilayer ceramic capacitor includes a capacitive part including a plurality of dielectric layers and first and second internal electrodes that are laminated in an alternating manner, wherein one set of ends of the first internal electrodes and the other set of ends of the second internal electrodes are exposed in a lamination direction in which the dielectric layers are laminated, a protective layer formed on at least one of top and bottom surfaces of the capacitive part, including a plurality of pores having an average pore size of 0.5 μm to 3 μm, and having a porosity of 2% to 10%, and first and second external electrodes electrically connected to the first and second internal electrodes exposed in the lamination direction of the dielectric layers.
摘要翻译：公开了一种多层陶瓷电容器。多层陶瓷电容器包括：电容部，其包括多个电介质层和以交替的方式层叠的第一和第二内部电极，其中，第一内部电极的一组端部和第二内部电极的另一组端部为在层叠电介质层的层叠方向上露出形成在所述电容部的顶面和底面的至少一个上的保护层，所述保护层包括平均孔径为0.5μm〜3μm的多个孔，并且具有孔隙率为2％至10％，以及电连接到在电介质层的层压方向上暴露的第一和第二内部电极的第一和第二外部电极。

6. 发明授权

US08273265B2 Phosphors and light emitting device using the same 有权
标题翻译：荧光体和使用其的发光装置
公开(公告)号：US08273265B2
公开(公告)日：2012-09-25
申请号：US12003812
申请日：2008-01-02
申请人： Mihail Nazarov , Chul Soo Yoon , Hyo Jung Kim
发明人： Mihail Nazarov , Chul Soo Yoon , Hyo Jung Kim
IPC分类号： H01L33/00 , C09K11/56 , C09K11/55 , C09K11/62
CPC分类号： H05B33/14 , C09K11/7731 , Y10T428/2991 , Y10T428/2993
摘要： There are provided phosphors having high luminous efficiency at desired wavelengths and good light output stability and a light emitting device using the same. A phosphor according to an aspect of the invention includes a sulfide crystallographic phase and an oxide crystallographic phase. Here, the phosphor is a multiphase compound in which the sulfide crystallographic phase and the oxide crystallographic phase exist together.
摘要翻译：提供了在所需波长下具有高发光效率和良好光输出稳定性的荧光体和使用该荧光体的发光装置。根据本发明的一个方面的荧光体包括硫化物晶相和氧化物晶相。这里，荧光体是其中存在硫化物结晶相和氧化物结晶相的多相化合物。

7. 发明申请

US20110141660A1 MULTILAYER CERAMIC CAPACITOR 失效
标题翻译：多层陶瓷电容器
公开(公告)号：US20110141660A1
公开(公告)日：2011-06-16
申请号：US12766161
申请日：2010-04-23
申请人： Ji Hun JEONG , Hyo Jung Kim , Dong Ik Chang , Doo Young Kim
发明人： Ji Hun JEONG , Hyo Jung Kim , Dong Ik Chang , Doo Young Kim
IPC分类号： H01G4/06
CPC分类号： H01G4/12 , H01G4/30
摘要： Disclosed is a multilayer ceramic capacitor. The multilayer ceramic capacitor includes a capacitive part including a plurality of dielectric layers and first and second internal electrodes that are laminated in an alternating manner, wherein one set of ends of the first internal electrodes and the other set of ends of the second internal electrodes are exposed in a lamination direction in which the dielectric layers are laminated, a protective layer formed on at least one of top and bottom surfaces of the capacitive part, including a plurality of pores having an average pore size of 0.5 μm to 3 μm, and having a porosity of 2% to 10%, and first and second external electrodes electrically connected to the first and second internal electrodes exposed in the lamination direction of the dielectric layers.
摘要翻译：公开了一种多层陶瓷电容器。多层陶瓷电容器包括：电容部，其包括多个电介质层和以交替的方式层叠的第一和第二内部电极，其中，第一内部电极的一组端部和第二内部电极的另一组端部为在层叠电介质层的层叠方向上露出形成在所述电容部的顶面和底面的至少一个上的保护层，所述保护层包括平均孔径为0.5μm〜3μm的多个孔，并且具有孔隙率为2％至10％，以及电连接到在电介质层的层压方向上暴露的第一和第二内部电极的第一和第二外部电极。

8. 发明授权

US08259434B2 Multilayer ceramic capacitor and method of fabricating the same 有权
标题翻译：多层陶瓷电容器及其制造方法
公开(公告)号：US08259434B2
公开(公告)日：2012-09-04
申请号：US12843235
申请日：2010-07-26
申请人： Hyo Jung Kim , Ji Hun Jeong , Dong Ik Chang , Doo Young Kim
发明人： Hyo Jung Kim , Ji Hun Jeong , Dong Ik Chang , Doo Young Kim
IPC分类号： H01G4/06
CPC分类号： H01G4/12 , H01G4/005 , H01G13/00 , Y10T29/435
摘要： There is provided a multilayer ceramic capacitor including: a capacitor main body formed by stacking a dielectric layer having a thickness of td and alternately stacking more than one opposing pair of a first internal electrode having a thickness of te and a second internal electrode having the same thickness as the first internal electrode, and having the dielectric layer therebetween; and a protective layer formed by stacking a second dielectric layer on at least one of an upper surface and a lower surface of the capacitor main body so that a dielectric material layer has a thickness of tc, wherein when a thickness from an end of a region where the first internal electrode and the second internal electrode oppose each other to side and end surfaces of the capacitor main body is a, it satisfies the following Equation 1 and a method of fabricating a multilayer ceramic capacitor are provided. 10
摘要翻译：提供了一种多层陶瓷电容器，其包括：电容器主体，其通过堆叠具有厚度td的电介质层并且交替堆叠多个相对的一对具有厚度的第一内部电极和具有其的第二内部电极厚度为第一内部电极，并且其间具有电介质层; 以及保护层，其通过在电容器主体的上表面和下表面中的至少一个上层叠第二电介质层而形成，使得电介质材料层具有厚度tc，其中当从区域的端部的厚度其中第一内部电极和第二内部电极彼此相对于电容器主体的侧面和端面是a，其满足以下等式1，并且提供制造多层陶瓷电容器的方法。 10

9. 发明申请

US20120049414A1 METHOD AND APPARATUS FOR MEASURING DEFORMATION OF LAMINATED BODY 审中-公开
标题翻译：用于测量层压体变形的方法和装置
公开(公告)号：US20120049414A1
公开(公告)日：2012-03-01
申请号：US13290766
申请日：2011-11-07
申请人： Dong Jin KIM , Sung Kyu Ha , Hyo Jung Kim , Ju Ho Kim , Dae Bok Oh , Won Seop Choi
发明人： Dong Jin KIM , Sung Kyu Ha , Hyo Jung Kim , Ju Ho Kim , Dae Bok Oh , Won Seop Choi
IPC分类号： B29C35/08 , B29C71/04
CPC分类号： H01G2/065 , H01G13/00
摘要： There is provided a method of measuring deformation of a laminated body, the method including: laminating and pressurizing a plurality of green sheets each having a plurality of inner electrodes arranged therein to form a laminated body having a plurality of unit chips arranged therein; marking location information of each of the unit chips on an XY plane of the laminated body on a surface of the unit chip; cutting the laminated body into the plurality of unit chips; measuring a deformation level of each of the cut unit chips; and storing the deformation level measured from the each of the cut unit chips to correspond to the location information of the unit chip.
摘要翻译：提供了一种测量层压体的变形的方法，该方法包括：层压并加压多个其中布置有多个内部电极的生片，以形成其中布置有多个单元芯片的层叠体; 在单元芯片的表面上标记层叠体的XY平面上的每个单元芯片的位置信息; 将层叠体切割成多个单位芯片; 测量每个切割单元芯片的变形水平; 并且存储从每个切割单元芯片测量的变形水平对应于单元芯片的位置信息。

10. 发明授权

US08194390B2 Multilayer ceramic capacitor and fabricating method thereof 有权
标题翻译：多层陶瓷电容器及其制造方法
公开(公告)号：US08194390B2
公开(公告)日：2012-06-05
申请号：US12843280
申请日：2010-07-26
申请人： Hyo Jung Kim , Dong Ik Chang , Doo Young Kim , Ji Hun Jeong
发明人： Hyo Jung Kim , Dong Ik Chang , Doo Young Kim , Ji Hun Jeong
IPC分类号： H01G4/06
CPC分类号： H01G4/01 , Y10T29/417
摘要： A multilayer ceramic capacitor includes a capacitor body in which inner electrodes and dielectric layers are alternately laminated, and a length difference rate (D) of the inner electrodes is 7% or less. The length difference rate (D) is defined by D={L−1}/L×100, where L is a maximum length of the inner electrode, and l is a minimum length of the inner electrode.
摘要翻译：多层陶瓷电容器包括交替层叠内电极和电介质层的电容器体，内电极的长度差率（D）为7％以下。长度差速比（D）由D = {L-1} / L×100定义，其中L是内电极的最大长度，l是内电极的最小长度。

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