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    • 2. 发明授权
    • Downstream channel change technique implemented in an access network
    • 在接入网中实现的下行信道改变技术
    • US07672230B2
    • 2010-03-02
    • US11484249
    • 2006-07-10
    • John T. ChapmanDaniel W. CrockerFeisal Y. DaruwallaJoanna Qun ZangYong Lu
    • John T. ChapmanDaniel W. CrockerFeisal Y. DaruwallaJoanna Qun ZangYong Lu
    • G01R31/08G06F11/00H04L1/00H04L12/28
    • H04L12/2801H04N21/242
    • A dynamic channel change technique is disclosed which may be implemented between nodes and a Head End of an access network. Initially a network device may communicate with the Head End via a first downstream channel and a first upstream channel. When the network device receives a dynamic channel change request which includes instructions for the network device to switch to a second downstream channel, the network device may respond by switching from the first downstream channel to the second downstream channel. Thereafter, the network device may communicate with the Head End via the second downstream channel and first upstream channel. Further, according to a specific embodiment, the dynamic channel change request may also include an upstream channel change request for causing the network device to switch from a first upstream channel to a second upstream channel.
    • 公开了可以在接入网络的节点和头端之间实现的动态信道改变技术。 最初,网络设备可以经由第一下游信道和第一上行信道与头端进行通信。 当网络设备接收到包括用于网络设备切换到第二下行信道的指令的动态信道改变请求时,网络设备可以通过从第一下游信道切换到第二下游信道来进行响应。 此后,网络设备可以经由第二下游信道和第一上行信道与头端进行通信。 此外,根据具体实施例,动态信道改变请求还可以包括用于使网络设备从第一上行信道切换到第二上行信道的上行信道改变请求。
    • 7. 发明授权
    • System for managing signals in different clock domains and a programmable digital filter
    • 用于管理不同时钟域中的信号的系统和可编程数字滤波器
    • US06175603B1
    • 2001-01-16
    • US08908278
    • 1997-08-07
    • John T. ChapmanDaniel W. CrockerBruce Y. Chen
    • John T. ChapmanDaniel W. CrockerBruce Y. Chen
    • H04L700
    • H04L7/0012H04L7/02
    • A synchronizer circuit manages signals in different clock domains by generating clock pulses synchronized with a system clock. The clock pulses are generated at a rate proportional to the frequency of a clock operating in a first clock domain. Digital circuitry is then driven at the frequency of the first clock and in the time domain of the system clock. A hand-shaking protocol prevents the synchronizer circuit from going into a metastable condition when passing clock or data signals into different time domains. A programmable digital filter includes multiple sampling stages that sample an input signal. A detection circuit has inputs coupled to the outputs of the multiple sampling stages and changes the logic state of an output signal when no glitches are detected in the samples of the input signal. A control circuit selectively varies a time period used by the filter for sampling the input signal.
    • 同步器电路通过产生与系统时钟同步的时钟脉冲来管理不同时钟域中的信号。 时钟脉冲以与在第一时钟域中操作的时钟的频率成比例的速率产生。 然后以第一时钟的频率和系统时钟的时域驱动数字电路。 握手协议可防止同步电路在将时钟或数据信号传输到不同的时域时进入亚稳态。 可编程数字滤波器包括对输入信号进行采样的多个采样级。 检测电路具有耦合到多个采样级的输出的输入,并且当在输入信号的采样中没有检测到毛刺时改变输出信号的逻辑状态。 控制电路选择性地改变由滤波器使用的时间段以对输入信号进行采样。
    • 8. 发明授权
    • Upstream physical interface for modular cable modem termination system
    • 模块化电缆调制解调器终端系统的上行物理接口
    • US07639617B2
    • 2009-12-29
    • US11131766
    • 2005-05-17
    • John T. ChapmanDaniel W. CrockerEric YoungmanAlon S. Bernstein
    • John T. ChapmanDaniel W. CrockerEric YoungmanAlon S. Bernstein
    • H04J1/16H04L12/26
    • H04L12/4633H04L12/2801
    • A modular Cable Modem Termination System (CMTS) includes a packet shelf operating a Data Over Cable Service Interface Specifications (DOCSIS) Media Access Control (MAC) framer. One or more downstream Physical Interface (PHY) shelves receive DOCSIS data from the packet shelf over a packet switched network and modulate the DOCSIS data for sending on a downstream path of a cable plant. One or more upstream PHY shelves send DOCSIS data received from an upstream path of the cable plant over the packet switched network to the packet shelf. By separating the PHY components from the MAC and from the system software, the PHY components for a Hybrid Fiber Coax (HFC) plant may be replaced with different PHY components for other access technologies such as wireless, Digital Subscriber Lines (DSL), Ethernet-to-the-Home, Fiber-to-the-Home, or fiber Passive Optical Networks (PONs).
    • 模块化电缆调制解调器终端系统(CMTS)包括操作数据有线服务接口规范(DOCSIS)媒体访问控制(MAC)成帧器的分组机架。 一个或多个下行物理接口(PHY)机架通过分组交换网络从分组机架接收DOCSIS数据,并且调制DOCSIS数据以在电缆设备的下游路径上发送。 一个或多个上游PHY层架将从电缆设备的上行路径接收的DOCSIS数据通过分组交换网络发送到分组架。 通过将PHY组件与MAC和系统软件分离,用于混合光纤同轴电缆(HFC)设备的PHY组件可以被用于其他接入技术的不同PHY组件来替代,诸如无线,数字用户线(DSL),以太网 - 光纤到户或光纤无源光网络(PON)。
    • 10. 发明授权
    • Technique for synchronizing multiple access controllers at the head end of an access network
    • 在接入网络的头端同步多个接入控制器的技术
    • US07065779B1
    • 2006-06-20
    • US09490761
    • 2000-01-24
    • Daniel W. CrockerJohn T. Chapman
    • Daniel W. CrockerJohn T. Chapman
    • H04N7/16
    • H04L12/2801H04N21/242
    • A technique is described which may be used to synchronize a plurality of different access controllers which control a plurality of distinct ports at the Head End of an access network. In the context of a cable network, the technique of the present invention may be used to synchronize desired upstream and/or downstream channels across different line cards within a Cable Modem Termination System (CMTS). The technique involves utilizing a master time reference device which maintains and updates a current time reference, and periodically distributes synchronization signals to desired line cards in the system in order to synchronize these line cards. In a specific embodiment, the synchronization signals include current timestamp data generated from the master time reference device and distributed to all (or selected) line cards in the system. A slave time reference device on each of the line cards receives the periodic synchronization updates and uses the synchronization data to remain synchronized with the master time reference device. There are also provisions in this protocol to allow for hot insertion and removal of line cards, software reset or loading of the master and/or slave time reference devices, and redundant master time reference devices, including master time reference device fault detection and automatic fail over.
    • 描述了一种技术,其可以用于同步多个不同的访问控制器,其控制在接入网络的头端处的多个不同端口。 在有线网络的上下文中,本发明的技术可以用于在电缆调制解调器终端系统(CMTS)内的不同线路卡上同步期望的上行和/或下行信道。 该技术涉及利用维持和更新当前时间基准的主时间参考装置,并且将同步信号周期性地分配给系统中期望的线路卡,以便同步这些线路卡。 在一个具体实施例中,同步信号包括从主时间参考设备产生并分发给系统中的所有(或选定)线路卡的当前时间戳数据。 每个线路卡上的从时间参考设备接收周期性同步更新,并使用同步数据与主时间参考设备保持同步。 本协议还规定允许热插拔线路卡,主机和/或从机时间参考设备的软件复位或加载,以及冗余主时间参考设备,包括主时间参考设备故障检测和自动故障 过度。