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1. 再颁专利

USRE39501E1 Multiple network protocol encoder/decoder and data processor 有权
标题翻译：多网络协议编码器/解码器和数据处理器
公开(公告)号：USRE39501E1
公开(公告)日：2007-03-06
申请号：US10093340
申请日：2002-03-06
申请人： John Shigeto Minami , Ryo Koyama , Michael Ward Johnson , Masaru Shinohara , Thomas C. Poff , Daniel F. Burkes
发明人： John Shigeto Minami , Ryo Koyama , Michael Ward Johnson , Masaru Shinohara , Thomas C. Poff , Daniel F. Burkes
IPC分类号： G06F13/00 , G06F15/16
CPC分类号： H04L69/12 , H04L47/50 , H04L47/6225 , H04L47/623 , H04L49/90 , H04L49/901 , H04L69/16 , H04L69/161 , H04L69/32
摘要： A multiple network protocol encoder/decoder comprising a network protocol layer, data handler, O.S. State machine, and memory manager state machines implemented at a hardware gate level. Network packets are received from a physical transport level mechanism by the network protocol layer state machine which decodes network protocols such as TCP, IP, User Datagram Protocol (UDP), PPP, and Raw Socket concurrently as each byte is received. Each protocol handler parses and strips header information immediately from the packet, requiring no intermediate memory. The resulting data are passed to the data handler which consists of data state machines that decode data formats such as email, graphics, Hypertext Transfer Protocol (HTTP), Java, and Hypertext Markup Language (HTML). Each data state machine reacts accordingly to the pertinent data, and any data that are required by more than one data state machine is provided to each state machine concurrently, and any data required more than once by a specific data state machine, are placed in a specific memory location with a pointer designating such data (thereby ensuring minimal memory usage). Resulting display data are immediately passed to a display controller. Any outgoing network packets are created by the data state machines and passed through the network protocol state machine which adds header information and forwards the resulting network packet via a transport level mechanism.
摘要翻译：一种多网络协议编码器/解码器，包括网络协议层，数据处理器，O.S. 状态机和内存管理器状态机在硬件门级实现。网络协议层状态机通过网络协议层状态机从物理传输层次机制接收网络数据包，该协议层状态机在收到每个字节时同时解码诸如TCP，IP，用户数据报协议（UDP），PPP和Raw Socket之类的网络协议。每个协议处理程序从数据包中分析和剥离标题信息，不需要中间存储器。生成的数据被传递给数据处理程序，数据处理程序由解码数据格式（如电子邮件，图形，超文本传输协议（HTTP）），Java和超文本标记语言（HTML）等数据状态机组成。每个数据状态机对相关数据做出相应的反应，同时向每个状态机提供由多个数据状态机所需的任何数据，并且由特定数据状态机多次需要的任何数据被放置在具有指定这种数据的指针（从而确保最小的内存使用）的特定存储器位置。结果显示数据立即传递到显示控制器。任何传出的网络数据包都是由数据状态机创建的，并通过网络协议状态机，通过传输级别机制来增加报头信息，并转发所产生的网络数据包。

2. 发明授权

US6034963A Multiple network protocol encoder/decoder and data processor 失效
标题翻译：多网络协议编码器/解码器和数据处理器
公开(公告)号：US6034963A
公开(公告)日：2000-03-07
申请号：US742085
申请日：1996-10-31
申请人： John Shigeto Minami , Ryo Koyama , Michael Ward Johnson , Masaru Shinohara , Thomas C. Poff , Daniel F. Burkes
发明人： John Shigeto Minami , Ryo Koyama , Michael Ward Johnson , Masaru Shinohara , Thomas C. Poff , Daniel F. Burkes
IPC分类号： H04L12/28 , H04L12/56 , H04L29/06 , H04L29/08 , G06F13/00 , G06F15/16
CPC分类号： H04L12/5693 , H04L47/6225 , H04L47/623 , H04L49/90 , H04L49/901 , H04L69/12 , H04L69/16 , H04L69/161 , H04L69/32
摘要： A multiple network protocol encoder/decoder comprising a network protocol layer, data handler, O.S. State machine, and memory manager state machines implemented at a hardware gate level. Network packets are received from a physical transport level mechanism by the network protocol layer state machine which decodes network protocols such as TCP, IP, User Datagram Protocol (UDP), PPP, and Raw Socket concurrently as each byte is received. Each protocol handler parses and strips header information immediately from the packet, requiring no intermediate memory. The resulting data are passed to the data handler which consists of data state machines that decode data formats such as email, graphics, Hypertext Transfer Protocol (HTTP), Java, and Hypertext Markup Language (HTML). Each data state machine reacts accordingly to the pertinent data, and any data that are required by more than one data state machine is provided to each state machine concurrently, and any data required more than once by a specific data state machine, are placed in a specific memory location with a pointer designating such data (thereby ensuring minimal memory usage). Resulting display data are immediately passed to a display controller. Any outgoing network packets are created by the data state machines and passed through the network protocol state machine which adds header information and forwards the resulting network packet via a transport level mechanism.
摘要翻译：一种多网络协议编码器/解码器，包括网络协议层，数据处理器，O.S. 状态机和内存管理器状态机在硬件门级实现。网络协议层状态机通过网络协议层状态机从物理传输层次机制接收网络数据包，该协议层状态机在收到每个字节时同时解码诸如TCP，IP，用户数据报协议（UDP），PPP和Raw Socket之类的网络协议。每个协议处理程序从数据包中分析和剥离标题信息，不需要中间存储器。生成的数据被传递给数据处理程序，数据处理程序由解码数据格式（如电子邮件，图形，超文本传输协议（HTTP）），Java和超文本标记语言（HTML）等数据状态机组成。每个数据状态机对相关数据做出相应的反应，同时向每个状态机提供由多个数据状态机所需的任何数据，并且由特定数据状态机多次需要的任何数据被放置在具有指定这种数据的指针（从而确保最小的内存使用）的特定存储器位置。结果显示数据立即传递到显示控制器。任何传出的网络数据包都是由数据状态机创建的，并通过网络协议状态机，通过传输级别机制来增加报头信息，并转发所产生的网络数据包。

3. 发明授权

US09098297B2 Hardware accelerator for an object-oriented programming language 有权
标题翻译：用于面向对象编程语言的硬件加速器
公开(公告)号：US09098297B2
公开(公告)日：2015-08-04
申请号：US11152544
申请日：2005-06-14
申请人： Thomas C. Poff , John Shigeto Minami , Ryo Koyama
发明人： Thomas C. Poff , John Shigeto Minami , Ryo Koyama
IPC分类号： G06F9/38 , G06F9/44 , G06F9/455 , G06F9/54 , G09G5/00 , G09G5/14 , G09G5/36
CPC分类号： G06F9/3879 , G06F9/4488 , G06F9/45504 , G06F9/45529 , G06F9/544 , G06F9/545 , G09G5/003 , G09G5/14 , G09G5/363 , G09G2340/02
摘要： An apparatus and method are provided including a hardware accelerator capable of being interfaced with a processor for accelerating the execution of an application written utilizing an object-oriented programming language. Such object-oriented programming language may include Java and/or C++.
摘要翻译：提供了一种装置和方法，包括能够与处理器接口的硬件加速器，用于加速使用面向对象编程语言编写的应用程序的执行。这种面向对象的编程语言可以包括Java和/或C ++。

4. 发明授权

US06330659B1 Hardware accelerator for an object-oriented programming language 失效
标题翻译：用于面向对象编程语言的硬件加速器
公开(公告)号：US06330659B1
公开(公告)日：2001-12-11
申请号：US08965540
申请日：1997-11-06
申请人： Thomas C. Poff , John Shigeto Minami , Ryo Koyama
发明人： Thomas C. Poff , John Shigeto Minami , Ryo Koyama
IPC分类号： G06F1500
CPC分类号： G06F9/3879
摘要： A method and apparatus for accelerating an object-oriented programming language are provided at a hardware gate level. In a Java-compliant embodiment, a Java Application framework is implemented in hardware. The Java.AWT, Java.NET, and Java.IO application frameworks are supported in the preferred embodiment of the invention. Application framework classes are stored as libraries in a shared memory. Instances and methods of supported application framework classes that are executed by a Java program are offloaded to a hardware object management system. A software stub is provided as an interface between the hardware object management system and the central processing unit. Central processing unit processing of non-supported application framework instructions is continued during hardware accelerator execution of hardware object management system requests.
摘要翻译：在硬件门级提供用于加速面向对象的编程语言的方法和装置。在符合Java的实施例中，Java应用程序框架在硬件中实现。在本发明的优选实施例中，支持Java.AWT，Java.NET和Java.IO应用程序框架。应用程序框架类作为库存储在共享内存中。由Java程序执行的支持的应用程序框架类的实例和方法被卸载到硬件对象管理系统。提供软件存根作为硬件对象管理系统和中央处理单元之间的接口。在硬件对象管理系统请求的硬件加速器执行期间，继续执行不支持的应用程序框架指令的中央处理单元处理。

5. 发明授权

US06983357B2 Hardware accelerator for an object-oriented programming language 有权
标题翻译：用于面向对象编程语言的硬件加速器
公开(公告)号：US06983357B2
公开(公告)日：2006-01-03
申请号：US09886167
申请日：2001-06-20
申请人： Thomas C. Poff , John Shigeto Minami , Ryo Koyama
发明人： Thomas C. Poff , John Shigeto Minami , Ryo Koyama
IPC分类号： G06F15/00
CPC分类号： G06F9/3879 , G06F9/45504 , G06F9/45529
摘要： A method and apparatus for accelerating an object-oriented programming language are provided at a hardware gate level. In a Java-compliant embodiment, a Java Application framework is implemented in hardware. The Java.AWT, Java.NET. and Java.IO application frameworks are supported in the preferred embodiment of the invention. Instances and methods of supported application framework classes that are executed by a Java program are offloaded to a hardware object management system. A software stub is provided as an interface between the hardware object management system and the central processing unit.
摘要翻译：在硬件门级提供用于加速面向对象的编程语言的方法和装置。在符合Java的实施例中，Java应用程序框架在硬件中实现。 Java.AWT，Java.NET。并且在本发明的优选实施例中支持Java.IO应用框架。由Java程序执行的支持的应用程序框架类的实例和方法被卸载到硬件对象管理系统。提供软件存根作为硬件对象管理系统和中央处理单元之间的接口。

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