会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 1. 发明申请
    • Programmable transmitter architecture for non-constant and constant envelope modulation
    • 可编程发射机架构,用于非恒定和恒定包络调制
    • US20070293163A1
    • 2007-12-20
    • US11454134
    • 2006-06-15
    • John KilpatrickJoel DawsonJose BohorquezJeff Venuti
    • John KilpatrickJoel DawsonJose BohorquezJeff Venuti
    • H04B1/40
    • H04B1/0483H04B1/406H04L27/0008
    • Transmitter architectures designed to accommodate both constant and non-constant of envelope modulation schemes and capable of providing local oscillator carrier frequencies within any one of numerous desired frequency bands, thus allowing compliance with many different communication standards. One example of a programmable frequency synthesizer includes a plurality of transmitter components and a microcontroller coupled to the frequency synthesizer and to the plurality of transmitter components. The microcontroller is adapted to provide a frequency control signal to the frequency synthesizer to control a frequency of the local oscillator carrier frequency. In addition, the microcontroller is also adapted to provide digital control signals to at least some of the plurality of transmitter components to turn on and off different ones of the plurality of transmitter components based on an operating mode of the transmitter, such that the transmitter can accommodate both constant envelope modulation and non-constant envelope modulation schemes.
    • 发射机体系结构旨在适应常数和非常数的包络调制方案,并且能够在许多期望的频带内提供本地振荡器载波频率,从而允许符合许多不同的通信标准。 可编程频率合成器的一个示例包括多个发射器部件和耦合到频率合成器和多个发射器部件的微控制器。 微控制器适于向频率合成器提供频率控制信号以控制本地振荡器载波频率的频率。 此外,微控制器还适于基于发射器的操作模式向多个发射器部件中的至少一些提供数字控制信号,以接通和关闭多个发射器部件中的不同发射器部件,使得发射器 适应恒定包络调制和非恒定包络调制方案。
    • 2. 发明授权
    • Programmable transmitter architecture for non-constant and constant envelope modulation
    • 可编程发射机架构,用于非恒定和恒定包络调制
    • US07672645B2
    • 2010-03-02
    • US11454134
    • 2006-06-15
    • John KilpatrickJoel DawsonJose BohorquezJeff Venuti
    • John KilpatrickJoel DawsonJose BohorquezJeff Venuti
    • H04B1/40H04Q7/20
    • H04B1/0483H04B1/406H04L27/0008
    • Transmitter architectures designed to accommodate both constant and non-constant of envelope modulation schemes and capable of providing local oscillator carrier frequencies within any one of numerous desired frequency bands, thus allowing compliance with many different communication standards. One example of a programmable frequency synthesizer includes a plurality of transmitter components and a microcontroller coupled to the frequency synthesizer and to the plurality of transmitter components. The microcontroller is adapted to provide a frequency control signal to the frequency synthesizer to control a frequency of the local oscillator carrier frequency. In addition, the microcontroller is also adapted to provide digital control signals to at least some of the plurality of transmitter components to turn on and off different ones of the plurality of transmitter components based on an operating mode of the transmitter, such that the transmitter can accommodate both constant envelope modulation and non-constant envelope modulation schemes.
    • 发射机体系结构旨在适应常数和非常数的包络调制方案,并且能够在许多期望的频带内提供本地振荡器载波频率,从而允许符合许多不同的通信标准。 可编程频率合成器的一个示例包括多个发射器部件和耦合到频率合成器和多个发射器部件的微控制器。 微控制器适于向频率合成器提供频率控制信号以控制本地振荡器载波频率的频率。 此外,微控制器还适于基于发射器的操作模式向多个发射器部件中的至少一些提供数字控制信号,以接通和关闭多个发射器部件中的不同发射器部件,使得发射器 适应恒定包络调制和非恒定包络调制方案。
    • 5. 发明授权
    • Gate bias circuit for MOS Charge Coupled Devices
    • MOS电荷耦合器件的栅极偏置电路
    • US07109784B2
    • 2006-09-19
    • US10870488
    • 2004-06-17
    • Michael P. AnthonyJeff Venuti
    • Michael P. AnthonyJeff Venuti
    • G05F1/10
    • H01L27/14812
    • A biasing circuit for use with a Charged Coupled Device (CCD) that creates a gate bias voltage by maintaining a model or surrogate representation of the surface potentials within the CCD storage and barrier regions. In one embodiment the invention is a bias circuit that includes at least a first and second model transistor for modeling the two regions. The first model transistor is connected to a supply voltage to provide a first reference voltage at a first node, and models the first charge storage region. A resistive circuit element is coupled between the first node N1 and a second node N2 in order to allow a step voltage to be developed. The second model transistor is in turn connected to the second node N2 and provides the bias voltage at an output portion that can be used to control the gate of the barrier region. The model circuit therefore allows a proper bias voltage to be maintained through process and operating condition variations.
    • 用于与电荷耦合器件(CCD)一起使用的偏置电路,其通过维持CCD存储和屏障区域内的表面电位的模型或替代表示来产生栅极偏置电压。 在一个实施例中,本发明是一种偏置电路,其包括用于对两个区域建模的至少第一和第二模型晶体管。 第一模型晶体管连接到电源电压以在第一节点处提供第一参考电压,并且对第一电荷存储区域进行建模。 电阻电路元件耦合在第一节点N 1和第二节点N 2之间,以允许阶跃电压被显影。 第二模型晶体管又连接到第二节点N 2,并且在可用于控制屏障区域的栅极的输出部分处提供偏置电压。 因此,模型电路允许通过过程和操作条件变化来维持适当的偏置电压。
    • 6. 发明申请
    • Gate bias circuit for MOS charge coupled devices
    • 用于MOS电荷耦合器件的栅极偏置电路
    • US20050280025A1
    • 2005-12-22
    • US10870488
    • 2004-06-17
    • Michael AnthonyJeff Venuti
    • Michael AnthonyJeff Venuti
    • H01L27/148H01L29/732
    • H01L27/14812
    • A biasing circuit for use with a Charged Coupled Device (CCD) that creates a gate bias voltage by maintaining a model or surrogate representation of the surface potentials within the CCD storage and barrier regions. In one embodiment the invention is a bias circuit that includes at least a first and second model transistor for modeling the two regions. The first model transistor is connected to a supply voltage to provide a first reference voltage at a first node, and models the first charge storage region. A resistive circuit element is coupled between the first node N1 and a second node N2 in order to allow a step voltage to be developed. The second model transistor is in turn connected to the second node N2 and provides the bias voltage at an output portion that can be used to control the gate of the barrier region. The model circuit therefore allows a proper bias voltage to be maintained through process and operating condition variations.
    • 用于与电荷耦合器件(CCD)一起使用的偏置电路,其通过维持CCD存储和屏障区域内的表面电位的模型或替代表示来产生栅极偏置电压。 在一个实施例中,本发明是一种偏置电路,其包括用于对两个区域建模的至少第一和第二模型晶体管。 第一模型晶体管连接到电源电压以在第一节点处提供第一参考电压,并且对第一电荷存储区域进行建模。 电阻电路元件耦合在第一节点N 1和第二节点N 2之间,以允许阶跃电压被显影。 第二模型晶体管又连接到第二节点N 2,并且在可用于控制屏障区域的栅极的输出部分处提供偏置电压。 因此,模型电路允许通过过程和操作条件变化来维持适当的偏置电压。