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1. 发明授权

US4852044A Programmable data security circuit for programmable logic device 失效
标题翻译：可编程逻辑器件的可编程数据安全电路
公开(公告)号：US4852044A
公开(公告)日：1989-07-25
申请号：US236348
申请日：1988-08-22
申请人： John E. Turner , Jerome E. Liebler
发明人： John E. Turner , Jerome E. Liebler
IPC分类号： H03K19/177
CPC分类号： H03K19/17768 , H03K19/17704 , H03K19/1778
摘要： An architecture security fuse circuit is disclosed for securing the architecture of a configurable programmable logic device. The storage element of the circuit is a floating gate transistor cell. Data stored in the cell is determined by the amount of charge trapped within the oxide-isolated polysilicon floating gate region. The security fuse is initialized (erased) during device fabrication to allow access to device architectural data. Such initialization is accomplished by a technique that the device user cannot duplicate, via an extra probe pad accessible only during wafer probe. To deter the effects of floating gate charge loss which may occur during subsequent fabrication steps, the fuse circuit is adapted to provide a reduced memory cell read voltage, thus providing greater margin against thermally defeating the security fuse. A regenerative feature is provided to strengthen the erased cell during every device "clear" cycle. Once the security fuse is programmed, the data defining the device architecture may not be interrogated or altered, and the memory cell is unchanged by the regenerative feature.
摘要翻译：公开了用于保护可配置可编程逻辑器件的架构的架构安全熔丝电路。电路的存储元件是浮栅晶体管单元。存储在单元中的数据由在氧化物隔离多晶硅浮动栅极区域内捕获的电荷量确定。在设备制造期间，安全保险丝被初始化（擦除），以允许访问设备架构数据。这种初始化是通过一种技术实现的，该技术是通过仅在晶片探针期间可访问的额外的探针焊盘才能复制设备。为了阻止在随后的制造步骤期间可能发生的浮栅电荷损失的影响，熔丝电路适于提供减小的存储单元读取电压，从而提供更大的抵抗热破坏安全保险丝的裕度。提供再生特征以在每个器件“清除”周期期间加强擦除的单元。一旦安全保险丝被编程，定义设备架构的数据可能不被询问或改变，并且存储器单元由再生特征保持不变。

2. 发明授权

US06509721B1 Buck regulator with ability to handle rapid reduction of load current 失效
标题翻译：降压调节器具有处理负载电流快速降低的能力
公开(公告)号：US06509721B1
公开(公告)日：2003-01-21
申请号：US09940366
申请日：2001-08-27
申请人： Jerome E. Liebler
发明人： Jerome E. Liebler
IPC分类号： G05F1613
CPC分类号： H02M3/158 , H02M2001/0019
摘要： A buck converter has an input circuit for receiving an input signal, a controller connected to and controlling the input circuit, a switch controllable by the controller for switching on/off, a current storage element connected to the input circuit and the switch, and an output voltage storage element connected to the current storage element for connecting in parallel with a load. In a charging phase, the controller causes (a) the input circuit to allow the input signal to pass through for provision to the load via the current storage element and (b) the switch to switch off (becoming an open circuit). In a discharging phase, the controller causes (a) the input circuit to decouple from the input signal and (b) the switch to switch on (become a short circuit), so that (c) current flows within a loop formed by the switch and the current storage element.
摘要翻译：降压转换器具有用于接收输入信号的输入电路，连接到并控制输入电路的控制器，由控制器控制的用于接通/断开的开关，连接到输入电路和开关的电流存储元件，以及输出电压存储元件连接到当前存储元件，用于与负载并联连接。在充电阶段，控制器使（a）输入电路允许输入信号通过，以经由电流存储元件提供给负载，并且（b）开关关断（成为开路）。在放电阶段，控制器使（a）输入电路与输入信号分离，（b）开关导通（变为短路），使得（c）电流在由开关形成的环路内流动和当前存储元件。

3. 发明授权

US06646450B2 Method and apparatus for near losslessly measuring inductor current 有权
标题翻译：接近无损测量电感电流的方法和装置
公开(公告)号：US06646450B2
公开(公告)日：2003-11-11
申请号：US09981471
申请日：2001-10-16
申请人： Jerome E. Liebler
发明人： Jerome E. Liebler
IPC分类号： G01R2706
CPC分类号： G01R19/0092 , H02M3/1588 , H02M2001/0009 , Y02B70/1466
摘要： The present invention provides an improved measuring circuit for measuring a current of an inductor with minimum losses and errors. According to one embodiment of the invention, the measuring circuit comprises an op-amp, a RC network connected in a feedback loop of the op-amp, and a scaling resistor connected in series to one of the input terminals of the op-amp. By setting the RC constant of the RC network to be equal to the ratio of the inductor value over its internal resistance value, the inductor current can be derived independent of the frequencies of AC signals.
摘要翻译：本发明提供了一种用于以最小的损耗和误差来测量电感器的电流的改进的测量电路。根据本发明的一个实施例，测量电路包括连接在运算放大器的反馈回路中的运算放大器，RC网络和与运算放大器的输入端之一串联连接的缩放电阻器。通过将RC网络的RC常数设置为等于电感值与其内部电阻值的比值，可以独立于交流信号的频率导出电感电流。

4. 发明授权

US4112252A Multi-terminal serially communicating shared logic text editing system 失效
标题翻译：多终端串行通信共享逻辑文本编辑系统
公开(公告)号：US4112252A
公开(公告)日：1978-09-05
申请号：US734236
申请日：1976-10-20
申请人： Jerome E. Liebler
发明人： Jerome E. Liebler
IPC分类号： H04N5/232 , H04N7/173 , H04N7/18 , H04L5/14
CPC分类号： H04N7/173 , H04N5/23203 , H04N7/183 , H04N2007/17372
摘要： A text editing system is provided in which a central station communicates a video signal, timing signals, and control signal to a remote station by way of a single communication pathway for subsequent display on a cathode ray tube at the remote station and wherein keyboard information may be communicated from the remote station to the central station across the same communication pathway. The video signal from the central station includes conventional horizontal and vertical synchronization pulses which are encoded prior to transmission to the remote station and decoded at the remote station. In addition, the video signal is inhibited during both the horizontal and vertical synchronization pulses so that during the horizontal synchronization pulse, keyboard information from the remote station may be communicated to the central station across the communication pathway while during the vertical synchronization period control signals may be communicated from the central station to the remote station via the communication pathway.
摘要翻译：提供了一种文本编辑系统，其中中心站通过单个通信路径将视频信号，定时信号和控制信号传送到远程站，用于随后在远程站的阴极射线管上显示，并且其中键盘信息可以通过相同的通信路径从远程站传送到中心站。来自中心站的视频信号包括常规的水平和垂直同步脉冲，其在传输到远程站之前被编码并在远程站处进行解码。此外，视频信号在水平同步脉冲和垂直同步脉冲期间被禁止，使得在水平同步脉冲期间，来自远程站的键盘信息可以通过通信路径被传送到中心站，而在垂直同步期间，控制信号可以通过通信路径从中心站传送到远程站。

5. 发明授权

US4167752A Color video display for audio signals 失效
标题翻译：音频信号的彩色视频显示
公开(公告)号：US4167752A
公开(公告)日：1979-09-11
申请号：US838829
申请日：1977-10-03
申请人： Jerome E. Liebler , Walter M. Rubinstein
发明人： Jerome E. Liebler , Walter M. Rubinstein
IPC分类号： H04N11/00 , H04N9/02
CPC分类号： H04N11/00
摘要： A system for generating an aesthetically pleasing abstract display on the screen of a color television receiver in timed relation to an audio signal derived from music or the like employs a filter network to divide the audio signal into a plurality of separate frequency bands. These signals are provided to the inputs of three modulators along with video pattern signals developed by a digital/analog mapping network connected to the outputs of various stages of an oscillator driven counter chain. The same counter chain produces the horizontal and vertical synchronization signals for the receiver so that the display is generated in timed relation to the raster scan of the television receiver. The three modulators receive certain of the audio signals and certain of the analog signals and their outputs are provided to the three chrominance inputs of the receiver either directly or via an RF transmitter which allows connection to the antenna of the TV set.
摘要翻译：用于在与由音乐等导出的音频信号定时关联的彩色电视接收机的屏幕上产生美观的抽象显示的系统采用滤波器网络将音频信号划分成多个单独的频带。这些信号被提供给三个调制器的输入以及由连接到振荡器驱动的反向链的各个级的输出的数字/模拟映射网络开发的视频图形信号。相同的反向链产生用于接收机的水平和垂直同步信号，使得显示器以与电视接收机的光栅扫描的定时关系产生。三个调制器接收某些音频信号，并且某些模拟信号及其输出被直接地或通过允许连接到电视机的天线的RF发射器提供给接收机的三个色度输入。

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