专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08667110B2 Method and apparatus for providing a remotely managed expandable computer system 有权
标题翻译：用于提供远程管理的可扩展计算机系统的方法和装置
公开(公告)号：US08667110B2
公开(公告)日：2014-03-04
申请号：US12655015
申请日：2009-12-22
申请人： Johan van de Groenendaal , Matthew Adiletta , Myles Wilde , Michael Fallon , Aaron Gorius , William Wheeler , Chengda Yang , Paul Dormitzer , Douglas Carrigan
发明人： Johan van de Groenendaal , Matthew Adiletta , Myles Wilde , Michael Fallon , Aaron Gorius , William Wheeler , Chengda Yang , Paul Dormitzer , Douglas Carrigan
IPC分类号： G06F15/173
CPC分类号： H04L63/20 , H04L63/0428 , H04L63/08
摘要： A remotely managed expandable multi-user computer system is provided. The computer system includes a removable compute cartridge and a removable storage cartridge allowing easy upgrade of the computer system. The computer system self-configures when powered on to allow remote management by another system over a network. Automatic failover support is provided without the need for a separate compute element. A self-configurable removable secure-to-wireless converter to couple to a client computer system allows secure communications between the multi-user system and the client computer system via a wireless network.
摘要翻译：提供远程管理的可扩展多用户计算机系统。计算机系统包括可移动计算盒和可移动存储盒，从而容易地升级计算机系统。计算机系统在通电时自配置，以允许其他系统通过网络进行远程管理。提供自动故障转移支持，而不需要单独的计算元素。可配置的可拆卸安全到无线转换器耦合到客户端计算机系统允许经由无线网络的多用户系统和客户端计算机系统之间的安全通信。

2. 发明申请

US20110153798A1 Method and apparatus for providing a remotely managed expandable computer system 有权
标题翻译：用于提供远程管理的可扩展计算机系统的方法和装置
公开(公告)号：US20110153798A1
公开(公告)日：2011-06-23
申请号：US12655015
申请日：2009-12-22
申请人： Johan van de Groenendaal , Matthew Adiletta , Myles Wilde , Michael Fallon , Aaron Gorius , William Wheeler , Chengda Yang , Paul Dormitzer , Douglas Carrigan
发明人： Johan van de Groenendaal , Matthew Adiletta , Myles Wilde , Michael Fallon , Aaron Gorius , William Wheeler , Chengda Yang , Paul Dormitzer , Douglas Carrigan
IPC分类号： G06F15/16 , H04L9/00 , G06F13/00
CPC分类号： H04L63/20 , H04L63/0428 , H04L63/08
摘要： A remotely managed expandable multi-user computer system is provided. The computer system includes a removable compute cartridge and a removable storage cartridge allowing easy upgrade of the computer system. The computer system self-configures when powered on to allow remote management by another system over a network. Automatic failover support is provided without the need for a separate compute element. A self-configurable removable secure-to-wireless converter to couple to a client computer system allows secure communications between the multi-user system and the client computer system via a wireless network.
摘要翻译：提供远程管理的可扩展多用户计算机系统。计算机系统包括可移动计算盒和可移动存储盒，从而容易地升级计算机系统。计算机系统在通电时自配置，以允许其他系统通过网络进行远程管理。提供自动故障转移支持，而不需要单独的计算元素。可配置的可拆卸安全到无线转换器耦合到客户端计算机系统允许经由无线网络的多用户系统和客户端计算机系统之间的安全通信。

3. 发明申请

US20070140282A1 Managing on-chip queues in switched fabric networks 审中-公开
标题翻译：管理交换式网络中的片上队列
公开(公告)号：US20070140282A1
公开(公告)日：2007-06-21
申请号：US11315582
申请日：2005-12-21
申请人： Sridhar Lakshmanamurthy , Hugh Wilkinson , Jaroslaw Sydir , Paul Dormitzer
发明人： Sridhar Lakshmanamurthy , Hugh Wilkinson , Jaroslaw Sydir , Paul Dormitzer
IPC分类号： H04L12/56
CPC分类号： H04L47/6255 , H04L47/562 , H04L47/6215 , H04L49/3036 , H04L49/90 , H04L49/9084
摘要： Methods and apparatus, including computer program products, implementing techniques for monitoring a state of a device of a switched fabric network, the device including on-chip queues to store queue descriptors and a data buffer to store data packets, each queue descriptor having a corresponding data packet; detecting a first trigger condition to transition the device from a first state to a second state; and recovering space in the data buffer in response to the first trigger condition detecting, the recovering comprising selecting one or more of the on-chip queues for discard, and removing the data packets corresponding to queue descriptors in the selected one or more on-chip queues from the data buffer.
摘要翻译：包括计算机程序产品的方法和装置，用于监视交换结构网络的设备的状态的实现技术，所述设备包括用于存储队列描述符的片上队列和用于存储数据分组的数据缓冲器，每个队列描述符具有对应的数据包; 检测将所述设备从第一状态转换到第二状态的第一触发条件; 以及响应于所述第一触发条件检测来恢复所述数据缓冲器中的空间，所述恢复包括选择所述片上队列中的一个或多个以进行丢弃，以及移除与所选择的一个或多个片上的队列描述符相对应的数据分组来自数据缓冲区的队列。

4. 发明申请

US20060146864A1 Flexible use of compute allocation in a multi-threaded compute engines 审中-公开
标题翻译：在多线程计算引擎中灵活使用计算分配
公开(公告)号：US20060146864A1
公开(公告)日：2006-07-06
申请号：US11026386
申请日：2004-12-30
申请人： Mark Rosenbluth , Peter Barry , Paul Dormitzer , Brad Burres
发明人： Mark Rosenbluth , Peter Barry , Paul Dormitzer , Brad Burres
IPC分类号： H04L12/43 , H04B7/212
CPC分类号： G06F9/3851 , G06F9/4881
摘要： Techniques for arbitrating and scheduling thread usage in multi-threaded compute engines. Various schemes are disclosed for allocating compute (execution) usage of compute engines supporting multiple hardware contexts. The schemes include non-pre-emptive (cooperative) round-robin, priority-based round-robin with pre-emption, time division, cooperative round-robin with time division, and priority-based round-robin with pre-emption and time division. Aspects of the foregoing schemes may also be combined to form new schemes. The schemes enable finer control of thread execution in pipeline execution environments, such as employed for performing packet-processing operations.
摘要翻译：在多线程计算引擎中仲裁和调度线程使用的技术。公开了用于分配支持多个硬件上下文的计算引擎的计算（执行）使用的各种方案。这些方案包括非优先（合作）循环，优先考虑循环优先，时间划分，时分合作循环，优先循环优先考虑和时间优先师。上述方案的方面也可以组合以形成新的方案。这些方案能够更好地控制流水线执行环境中的线程执行，例如用于执行分组处理操作。

5. 发明授权

US06873195B2 Compensating for differences between clock signals 有权
标题翻译：补偿时钟信号之间的差异
公开(公告)号：US06873195B2
公开(公告)日：2005-03-29
申请号：US09935209
申请日：2001-08-22
申请人： Paul Dormitzer , Willem Engelse , Raymond Robidoux
发明人： Paul Dormitzer , Willem Engelse , Raymond Robidoux
IPC分类号： H03K5/00 , H03L7/00 , H03L7/06 , H04L7/00 , H04L7/033
CPC分类号： H03L7/06 , H04L7/0008
摘要： A clock compensation circuit is provided. The circuit comprises a clock synchronization circuit coupled to receive an input clock signal, wherein the clock synchronization circuit generates a master clock signal and produces a plurality of internal logic clock signals. The circuit further comprises a phase comparator coupled to receive one of the plurality of internal logic clock signals and a sample clock from an associated receiver, wherein the phase comparator generates a control signal based on a phase comparison between the sample clock and the one of the plurality of internal logic clock signals and a down converter channel coupled to receive each of the plurality of internal logic clock signals and the control signal and to pass data in phase with the sample clock using the internal logic clock signal based on the control signal.
摘要翻译：提供时钟补偿电路。该电路包括耦合以接收输入时钟信号的时钟同步电路，其中时钟同步电路产生主时钟信号并产生多个内部逻辑时钟信号。电路还包括相位比较器，其被耦合以从相关接收器接收多个内部逻辑时钟信号中的一个和采样时钟，其中相位比较器基于采样时钟与采样时钟之间的相位比较产生控制信号多个内部逻辑时钟信号和下变换器通道，其耦合以接收所述多个内部逻辑时钟信号中的每一个和所述控制信号，并且使用所述内部逻辑时钟信号基于所述控制信号将与所述采样时钟同相的数据传送。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式