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1. 发明授权

US08786017B2 Strained Ge-on-insulator structure and method for forming the same 有权
标题翻译：应变绝缘体上的结构及其形成方法
公开(公告)号：US08786017B2
公开(公告)日：2014-07-22
申请号：US13263222
申请日：2011-08-25
申请人： Jing Wang , Jun Xu , Lei Guo
发明人： Jing Wang , Jun Xu , Lei Guo
IPC分类号： H01L27/12
CPC分类号： H01L29/78684 , H01L29/7846
摘要： A strained Ge-on-insulator structure is provided, comprising: a silicon substrate, in which an oxide insulating layer is formed on a surface of the silicon substrate; a Ge layer formed on the oxide insulating layer, in which a first passivation layer is formed between the Ge layer and the oxide insulating layer; a gate stack formed on the Ge layer, a channel region formed below the gate stack, and a source and a drain formed on sides of the channel region; and a plurality of shallow trench isolation structures extending into the silicon substrate and filled with an insulating dielectric material to produce a strain in the channel region. Further, a method for forming the strained Ge-on-insulator structure is also provided.
摘要翻译：提供了一种应变绝缘体上的结构，包括：硅衬底，其中在硅衬底的表面上形成氧化物绝缘层; 形成在所述氧化物绝缘层上的Ge层，其中在所述Ge层和所述氧化物绝缘层之间形成第一钝化层; 形成在Ge层上的栅极叠层，形成在栅叠层下方的沟道区，以及形成在沟道区的侧面上的源极和漏极; 以及延伸到硅衬底中并填充有绝缘电介质材料以在沟道区域中产生应变的多个浅沟槽隔离结构。此外，还提供了用于形成应变的绝缘体上Ge的结构的方法。

2. 发明授权

US08772873B2 Ge-on-insulator structure and method for forming the same 有权
标题翻译：绝缘体上的结构及其形成方法
公开(公告)号：US08772873B2
公开(公告)日：2014-07-08
申请号：US13201903
申请日：2011-07-27
申请人： Jing Wang , Jun Xu , Lei Guo
发明人： Jing Wang , Jun Xu , Lei Guo
IPC分类号： H01L27/12 , H01L21/336 , H01L29/786 , H01L21/28 , H01L21/762 , H01L29/66
CPC分类号： H01L29/78684 , H01L21/28255 , H01L21/76256 , H01L29/66742 , H01L29/78603
摘要： A method for forming a Ge-on-insulator structure is provided, comprising steps of: forming a Ge layer (1200) on a substrate (2000); treating a first surface of the Ge layer (1200) to form a first semiconducting metal-germanide passivation layer (1300); bonding the first semiconducting metal-germanide passivation layer (1300) with a silicon substrate (1100), wherein on a surface of the silicon substrate (1100) an oxide insulating layer is formed; and removing the substrate (2000). Further, a Ge-on-insulator structure formed by the method is also provided.
摘要翻译：提供一种形成绝缘体上Ge结构的方法，包括以下步骤：在衬底（2000）上形成Ge层（1200）; 处理所述Ge层（1200）的第一表面以形成第一半导体金属 - 锗化物钝化层（1300）; 将第一半导体金属 - 锗化物钝化层（1300）与硅衬底（1100）接合，其中在所述硅衬底（1100）的表面上形成氧化物绝缘层; 并移除基板（2000）。此外，还提供了通过该方法形成的绝缘体上Ge结构。

3. 发明申请

US20120032231A1 MOS TRANSISTOR STRUCTURE WITH IN-SITU DOPED SOURCE AND DRAIN AND METHOD FOR FORMING THE SAME 有权
标题翻译：具有现场输入源和漏极的MOS晶体管结构及其形成方法
公开(公告)号：US20120032231A1
公开(公告)日：2012-02-09
申请号：US13132768
申请日：2011-01-19
申请人： Jing Wang , Lei Guo , Jun Xu
发明人： Jing Wang , Lei Guo , Jun Xu
IPC分类号： H01L29/772 , H01L21/336
CPC分类号： H01L29/1054 , H01L29/66636 , H01L29/7833 , H01L29/7848
摘要： A MOS transistor structure with an in-situ doped source and/or drain and a method for forming the same are provided. The method comprises steps of: providing a substrate; forming a high Ge content layer on the substrate; forming a gate stack on the high Ge content layer and forming a side wall of one or more layers on both sides of the gate stack; etching the high Ge content layer to form a source region and/or a drain region; and forming a source and/or a drain in the source region and/or the drain region respectively by a low-temperature selective epitaxy, and introducing a doping gas during the low-temperature selective epitaxy to heavily dope the source and/or the drain and to in-situ activate a doping element.
摘要翻译：提供具有原位掺杂源极和/或漏极的MOS晶体管结构及其形成方法。该方法包括以下步骤：提供衬底; 在所述基板上形成高Ge含量层; 在高Ge含量层上形成栅极叠层，并在栅叠层的两侧形成一层或多层的侧壁; 蚀刻高Ge含量层以形成源区和/或漏区; 以及通过低温选择性外延分别在源区和/或漏区中形成源极和/或漏极，并且在低温选择性外延期间引入掺杂气体以使源极和/或漏极并原位激活掺杂元素。

4. 发明授权

US08704306B2 Strained Ge-on-insulator structure and method for forming the same 有权
标题翻译：应变绝缘体上的结构及其形成方法
公开(公告)号：US08704306B2
公开(公告)日：2014-04-22
申请号：US13263236
申请日：2011-08-25
申请人： Jing Wang , Jun Xu , Lei Guo
发明人： Jing Wang , Jun Xu , Lei Guo
IPC分类号： H01L27/12
CPC分类号： H01L29/78684 , H01L21/28255 , H01L29/165 , H01L29/7843 , H01L29/7846 , H01L29/7848
摘要： A strained Ge-on-insulator structure is provided, comprising: a silicon substrate, in which an oxide insulating layer is formed on a surface of the silicon substrate; a Ge layer formed on the oxide insulating layer, in which a first passivation layer is formed between the Ge layer and the oxide insulating layer; a gate stack formed on the Ge layer; and a channel region formed below the gate stack, and a source and a drain formed on sides of the channel region, in which the source and the drain are a SixGe1-x:C source and a SixGe1-x:C drain respectively to produce a tensile strain in the channel region, in which x is within a range from 0 to 1 and a content of C is within a range from 0 to 7.5%. Further, a method for forming the strained Ge-on-insulator structure is also provided.
摘要翻译：提供了一种应变绝缘体上的结构，包括：硅衬底，其中在硅衬底的表面上形成氧化物绝缘层; 形成在所述氧化物绝缘层上的Ge层，其中在所述Ge层和所述氧化物绝缘层之间形成第一钝化层; 形成在Ge层上的栅叠层; 以及形成在栅极堆叠下方的沟道区，以及形成在沟道区的侧面上的源极和漏极，源极和漏极分别为SixGe1-x：C源极和SixGe1-x：C沟道，以产生在通道区域中的拉伸应变，其中x在0至1的范围内，并且C的含量在0至7.5％的范围内。此外，还提供了用于形成应变的绝缘体上Ge的结构的方法。

5. 发明申请

US20130207161A1 SEMICONDUCTOR DEVICE AND METHOD FOR FORMING THE SAME 有权
标题翻译：半导体器件及其形成方法
公开(公告)号：US20130207161A1
公开(公告)日：2013-08-15
申请号：US13499661
申请日：2011-06-27
申请人： Jing Wang , Jun Xu , Lei Guo
发明人： Jing Wang , Jun Xu , Lei Guo
IPC分类号： H01L29/267 , H01L21/02
CPC分类号： H01L29/267 , H01L21/02381 , H01L21/0245 , H01L21/0251 , H01L21/02538 , H01L21/0262 , H01L21/02639 , H01L21/02647
摘要： A semiconductor device and a method for forming the same are provided. The semiconductor device comprises: a substrate (1); an insulating layer (2), formed on the substrate (1) and having a trench (21) to expose an upper surface of the substrate (1); a first buffer layer (3), formed on the substrate (1) and in the trench (21); and a compound semiconductor layer (4), formed on the first buffer layer (3), wherein an aspect ratio of the trench (21) is larger than 1 and smaller than 10, wherein the first buffer layer (3) is formed by a low-temperature reduced pressure chemical vapor deposition process at a temperature between 200° C. and 500° C., and wherein the compound semiconductor layer (4) is formed by a low-temperature metal organic chemical vapor deposition process at a temperature between 200° C. and 600° C.
摘要翻译：提供半导体器件及其形成方法。半导体器件包括：衬底（1）; 形成在所述基板（1）上并具有用于露出所述基板（1）的上表面的沟槽（21）的绝缘层（2）; 形成在所述基板（1）和所述沟槽（21）中的第一缓冲层（3）; 和形成在第一缓冲层（3）上的化合物半导体层（4），其中沟槽（21）的纵横比大于1且小于10，其中第一缓冲层（3）由在200℃至500℃之间的温度下进行低温减压化学气相沉积工艺，其中化合物半导体层（4）通过低温金属有机化学气相沉积工艺在200℃ ℃和600℃

6. 发明授权

US08440550B2 Method for forming strained layer with high Ge content on substrate and semiconductor structure 有权
标题翻译：在基板和半导体结构上形成具有高Ge含量的应变层的方法
公开(公告)号：US08440550B2
公开(公告)日：2013-05-14
申请号：US13126730
申请日：2010-11-29
申请人： Jing Wang , Jun Xu , Lei Guo
发明人： Jing Wang , Jun Xu , Lei Guo
IPC分类号： H01L29/78 , H01L21/20 , H01L21/265
CPC分类号： H01L21/76254 , H01L29/1054 , H01L29/78684 , H01L29/78687
摘要： A semiconductor structure and a method for forming the same are provided. The semiconductor structure may comprise a substrate (110); an insulation layer (120) formed on the substrate (110); a strained layer (130) formed on the insulation layer (120); a strained layer (140) with high Ge content formed on the strained layer (130); and a gate stack (160) formed on the strained layer (140) with high Ge content.
摘要翻译：提供半导体结构及其形成方法。半导体结构可以包括衬底（110）; 形成在所述基板（110）上的绝缘层（120）; 形成在绝缘层（120）上的应变层（130）; 在应变层（130）上形成具有高Ge含量的应变层（140）; 以及形成在具有高Ge含量的应变层（140）上的栅极堆叠（160）。

7. 发明申请

US20120228708A1 STRAINED GE-ON-INSULATOR STRUCTURE AND METHOD FOR FORMING THE SAME 有权
标题翻译：应变导电绝缘体结构及其形成方法
公开(公告)号：US20120228708A1
公开(公告)日：2012-09-13
申请号：US13263236
申请日：2011-08-25
申请人： Jing Wang , Jun Xu , Lei Guo
发明人： Jing Wang , Jun Xu , Lei Guo
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/78684 , H01L21/28255 , H01L29/165 , H01L29/7843 , H01L29/7846 , H01L29/7848
摘要： A strained Ge-on-insulator structure is provided, comprising: a silicon substrate, in which an oxide insulating layer is formed on a surface of the silicon substrate; a Ge layer formed on the oxide insulating layer, in which a first passivation layer is formed between the Ge layer and the oxide insulating layer; a gate stack formed on the Ge layer; and a channel region formed below the gate stack, and a source and a drain formed on sides of the channel region, in which the source and the drain are a SixGe1-x:C source and a SixGe1-x:C drain respectively to produce a tensile strain in the channel region, in which x is within a range from 0 to 1 and a content of C is within a range from 0 to 7.5%. Further, a method for forming the strained Ge-on-insulator structure is also provided.
摘要翻译：提供了一种应变绝缘体上的结构，包括：硅衬底，其中在硅衬底的表面上形成氧化物绝缘层; 形成在所述氧化物绝缘层上的Ge层，其中在所述Ge层和所述氧化物绝缘层之间形成第一钝化层; 形成在Ge层上的栅叠层; 以及形成在栅极堆叠下方的沟道区，以及形成在沟道区的侧面上的源极和漏极，源极和漏极分别为SixGe1-x：C源极和SixGe1-x：C沟道，以产生在通道区域中的拉伸应变，其中x在0至1的范围内，并且C的含量在0至7.5％的范围内。此外，还提供了用于形成应变的绝缘体上Ge的结构的方法。

8. 发明申请

US20120012906A1 Si-Ge-Si SEMICONDUCTOR STRUCTURE HAVING DOUBLE GRADED JUNCTIONS AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：具有双重分级结的Si-Ge-Si半导体结构及其形成方法
公开(公告)号：US20120012906A1
公开(公告)日：2012-01-19
申请号：US13126722
申请日：2010-12-31
申请人： Jing Wang , Jun Xu , Lei Guo
发明人： Jing Wang , Jun Xu , Lei Guo
IPC分类号： H01L29/772 , H01L21/336
CPC分类号： H01L29/665 , H01L21/0237 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02502 , H01L21/0251 , H01L21/02532 , H01L21/0262 , H01L29/1054 , H01L29/165 , H01L29/6659 , H01L29/778 , H01L29/7833
摘要： A Si—Ge—Si semiconductor structure having double compositionally-graded hetero-structures is provided, comprising: a substrate; a buffer layer or an insulation layer formed on the substrate; a strained SiGe layer formed on the buffer layer or the insulation layer, wherein a Ge content in a central portion of the strained SiGe layer is higher than the Ge content in an upper surface or in a lower surface of the strained SiGe layer, and the Ge content presents a compositionally-graded distribution from the central portion to the upper surface and to the lower surface respectively. According to the present disclosure, a compositionally-graded hetero-structure replaces an abrupt hetero-structure so as to form a triangular hole carrier potential well, so that most of hole carriers may be distributed in the strained SiGe layer with high Ge content and a reduction of the carrier mobility caused by interface scattering may be avoided, thus further improving a performance of a device.
摘要翻译：提供了具有双组分梯度异质结构的Si-Ge-Si半导体结构，包括：基板; 形成在基板上的缓冲层或绝缘层; 形成在缓冲层或绝缘层上的应变SiGe层，其中应变SiGe层的中心部分的Ge含量高于应变SiGe层的上表面或下表面中的Ge含量， Ge含量呈现出从中心部分到上表面和下表面的成分分级分布。根据本公开，组成渐变异质结构取代了突变异质结构以便形成三角形空穴载流子阱，使得大多数空穴载流子可以分布在具有高Ge含量的应变SiGe层中，并且可以避免由界面散射引起的载流子迁移率的降低，从而进一步提高器件的性能。

9. 发明申请

US20140145312A1 SEMICONDUCTOR STRUCTURE WITH RARE EARTH OXIDE 审中-公开
标题翻译：具有稀土氧化物的半导体结构
公开(公告)号：US20140145312A1
公开(公告)日：2014-05-29
申请号：US13816173
申请日：2012-12-18
申请人： Jing Wang , Renrong Liang , Lei Guo , Jun Xu
发明人： Jing Wang , Renrong Liang , Lei Guo , Jun Xu
IPC分类号： H01L29/02
CPC分类号： H01L29/02 , H01L21/02507 , H01L21/0251 , H01L21/28255 , H01L29/1054 , H01L29/161 , H01L29/517 , H01L29/78
摘要： A semiconductor structure with a rare earth oxide is provided. The semiconductor structure comprises: a semiconductor substrate (100); and a plurality of insulation oxide layers (201, 202 . . . 20x) and a plurality of single crystal semiconductor layers (301, 302 . . . 30x) alternately stacked on the semiconductor substrate (100). A material of the insulation oxide layer (201) contacted with the semiconductor substrate (100) is any one of a rare earth oxide, SiO2, SiOxNy and a combination thereof, a material of other insulation oxide layers (202 . . . 20x) is a single crystal rare earth oxide.
摘要翻译：提供了具有稀土氧化物的半导体结构。半导体结构包括：半导体衬底（100）; 以及交替层叠在半导体基板（100）上的多个绝缘氧化物层（201,202,20.0x）和多个单晶半导体层（301,302,30 ...）。与半导体衬底（100）接触的绝缘氧化物层（201）的材料是稀土氧化物，SiO 2，SiO x N y及其组合中的任一种，其它绝缘氧化物层（202.0×20×）的材料为单晶稀土氧化物。

10. 发明申请

US20130295733A1 Si-Ge-Si SEMICONDUCTOR STRUCTURE HAVING DOUBLE COMPOSITIONALLY-GRADED HETERO-STRUCTURES AND METHOD FOR FORMING THE SAME 审中-公开
标题翻译：具有双重组成平面异质结构的Si-Ge-Si半导体结构及其形成方法
公开(公告)号：US20130295733A1
公开(公告)日：2013-11-07
申请号：US13935850
申请日：2013-07-05
申请人： Jing Wang , Jun Xu , Lei Guo
发明人： Jing Wang , Jun Xu , Lei Guo
IPC分类号： H01L29/66
CPC分类号： H01L29/665 , H01L21/0237 , H01L21/02381 , H01L21/0245 , H01L21/02488 , H01L21/02502 , H01L21/0251 , H01L21/02532 , H01L21/0262 , H01L29/1054 , H01L29/165 , H01L29/6659 , H01L29/778 , H01L29/7833
摘要： A Si—Ge—Si semiconductor structure having double compositionally-graded hetero-structures is provided, comprising: a substrate; a buffer layer or an insulation layer formed on the substrate; a strained SiGe layer formed on the buffer layer or the insulation layer, wherein a Ge content in a central portion of the strained SiGe layer is higher than the Ge content in an upper surface or in a lower surface of the strained SiGe layer, and the Ge content presents a compositionally-graded distribution from the central portion to the upper surface and to the lower surface respectively. According to the present disclosure, a compositionally-graded hetero-structure replaces an abrupt hetero-structure so as to form a triangular hole carrier potential well, so that most of hole carriers may be distributed in the strained SiGe layer with high Ge content and a reduction of the carrier mobility caused by interface scattering may be avoided, thus further improving a performance of a device.
摘要翻译：提供了具有双组分梯度异质结构的Si-Ge-Si半导体结构，包括：基板; 形成在基板上的缓冲层或绝缘层; 形成在缓冲层或绝缘层上的应变SiGe层，其中应变SiGe层的中心部分的Ge含量高于应变SiGe层的上表面或下表面中的Ge含量， Ge含量呈现出从中心部分到上表面和下表面的成分分级分布。根据本公开，组成渐变异质结构取代了突变异质结构以便形成三角形空穴载流子阱，使得大多数空穴载流子可以分布在具有高Ge含量的应变SiGe层中，并且可以避免由界面散射引起的载流子迁移率的降低，从而进一步提高器件的性能。

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