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    • 2. 发明授权
    • Semiconductor memory device capable of accessing data in continuous burst mode regardless of location of accessed data
    • 能够以连续脉冲串模式访问数据而不管访问数据的位置如何的半导体存储器件
    • US06930951B2
    • 2005-08-16
    • US10744322
    • 2003-12-22
    • Jin-Hong AhnSang-Hoon HongJae-Bum KoSe-Jun Kim
    • Jin-Hong AhnSang-Hoon HongJae-Bum KoSe-Jun Kim
    • G11C8/08G11C7/10G11C8/00G11C8/12
    • G11C7/1018
    • There is provided a semiconductor memory device and a method for driving the same, which is capable of accessing data in a continuous burst mode regardless of locations of accessed data. The semiconductor memory device includes: a first bank including a first word line corresponding to a first row address; and a second bank including a second word line corresponding to a second row address, wherein the second row address is consecutive to the first row address. The method for driving a semiconductor memory device includes the steps of: receiving a first row address corresponding to a command; activating a word line of a first bank corresponding to the first row address; activating a word line of a second bank corresponding to a second row address, in which the second row address is consecutive to the first row address; sequentially accessing the predetermined number of data among the N data in a plurality of unit cells corresponding to the word line of the first bank; and sequentially accessing the remaining data in a plurality of unit cells corresponding to a word line of the second bank.
    • 提供了一种半导体存储器件及其驱动方法,其能够以连续的突发模式访问数据,而不管访问数据的位置如何。 半导体存储器件包括:第一存储体,包括对应于第一行地址的第一字线; 以及包括对应于第二行地址的第二字线的第二存储体,其中所述第二行地址与所述第一行地址连续。 驱动半导体存储器件的方法包括以下步骤:接收与命令对应的第一行地址; 激活对应于第一行地址的第一存储体的字线; 激活对应于第二行地址的第二存储体的字线,其中第二行地址与第一行地址连续; 在对应于第一存储单元的字线的多个单位单元中,依次访问N个数据中的预定数量的数据; 并且依次访问与第二存储体的字线对应的多个单位单元中的剩余数据。
    • 5. 发明授权
    • Semiconductor memory device having tag block for reducing initialization time
    • 具有用于减少初始化时间的标签块的半导体存储器件
    • US07363460B2
    • 2008-04-22
    • US10749900
    • 2003-12-30
    • Jae-Bum KoJin-Hong AhnSang-Hoon HongSe-Jun Kim
    • Jae-Bum KoJin-Hong AhnSang-Hoon HongSe-Jun Kim
    • G06F12/00
    • G06F12/0607G11C7/1042G11C11/406G11C11/4072
    • A memory device includes a cell area having N+1 unit cell blocks. Each cell block includes M word lines. The N unit cell blocks are each corresponded to a logical cell block address. The one additional unit cell block is added for accessing data with high speed. A tag block receives a row address, senses the logical cell block address in the row address and outputs a physical cell block address based on the logical cell block address and the candidate information. The tag block includes:N+1 unit tag tables corresponding to the N+l unit cell blocks. Each tag block has M number of registers. The M number of registers correspond to M number of word lines of the corresponding unit cell blocks. Each register stores one logical cell block address. The tag block also includes an initialization unit that initializes the N+1 unit tag tables.
    • 存储器件包括具有N + 1个单位单元块的单元区域。 每个单元格块包括M个字线。 N个单元单元块分别对应于逻辑单元块地址。 添加一个附加单元单元块以高速访问数据。 标签块接收行地址,感测行地址中的逻辑单元块地址,并根据逻辑单元块地址和候选信息输出物理单元块地址。 标签块包括:对应于N + 1个单元块的N + 1个单元标签表。 每个标签块都有M个寄存器。 M个寄存器对应于相应单元单元块的M个字线。 每个寄存器存储一个逻辑单元块地址。 标签块还包括初始化N + 1单位标签表的初始化单元。