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    • 1. 发明授权
    • Desulfurization method for LNT system
    • LNT系统脱硫方法
    • US08664139B2
    • 2014-03-04
    • US13315003
    • 2011-12-08
    • Jin Ha LeeJae Beom ParkJeong Ho KimJin Woo ParkSoon Hyung Kwon
    • Jin Ha LeeJae Beom ParkJeong Ho KimJin Woo ParkSoon Hyung Kwon
    • B01J38/14
    • F02D41/028F02D41/029F02D2200/0812
    • A desulfurization method of a nitrogen oxide absorption catalyst when diesel is used may include determining how many times a regeneration of a diesel particulate filter (DPF) is completed, ending a DPF regeneration, if the number of times of the DPF regeneration reaches a predetermined value and entering into a desulfurization mode to desulfurize the DPF, ending the desulfurization mode after the desulfurization mode is performed for a predetermined time, and calculating a particulate matters (PM) amount that is trapped in the DPF after the desulfurization, compensating the trapped PM amount, and determining a time of the DPF regeneration. A desulfurization timing is determined based on the number of times that the DPF is regenerated to be able to simplify the desulfurization logic and also reduce the memory of ECU, when the LNT catalyst is poisoned by a small amount of sulfur included in exhaust gas.
    • 当使用柴油时,氮氧化物吸收催化剂的脱硫方法可以包括如果DPF再生的次数达到预定值,则确定柴油机微粒过滤器(DPF)的再生次数完成多少次,结束DPF再生 进入脱硫模式,对DPF进行脱硫,在脱硫模式进行规定时间后结束脱硫模式,计算脱硫后的DPF中捕集的颗粒物质(PM)的量,补偿被捕获的PM量 ,并确定DPF再生的时间。 当LNT催化剂被废气中包含的少量硫中毒时,基于DPF再生次数能够简化脱硫逻辑并减少ECU的存储量来确定脱硫时间。
    • 3. 发明授权
    • Manufacturing method for semiconductor device
    • 半导体器件的制造方法
    • US06528418B1
    • 2003-03-04
    • US09957094
    • 2001-09-20
    • Jeong Ho KimJae Seon Yu
    • Jeong Ho KimJae Seon Yu
    • H01L2144
    • H01L21/76897
    • A method for manufacturing a semiconductor device is disclosed. In a method for forming a contact plug according to a high integration of a semiconductor device, the method for manufacturing a semiconductor device leaves a low dielectric insulating film as a release film in a bit line contact and a storage electrode contact region of an upper semiconductor substrate where a MOSFET is provided, forms a contact plug which buries a spacing between the bit line contact and the storage electrode contact region, forms a contact plug without damaging a lower layer by removing the release layer, and solves a misalignment problem that occurs during a photolithography process and solves a problem in obtaining a contact area by a slope etching profile that occurs during the etching process, thereby providing an improved process margin.
    • 公开了一种制造半导体器件的方法。 在根据半导体器件的高集成度形成接触插塞的方法中,半导体器件的制造方法在位线接触中留下作为剥离膜的低介电绝缘膜和上半导体的存储电极接触区域 提供MOSFET的衬底形成了在位线接触和存储电极接触区域之间形成间隔的接触插塞,通过移除释放层而形成接触插塞而不损坏下层,并且解决了在 光刻工艺,并且通过在蚀刻工艺期间发生的斜率蚀刻轮廓来解决获得接触面积的问题,从而提供改进的工艺余量。
    • 7. 发明授权
    • Method for fabricating semiconductor device
    • 制造半导体器件的方法
    • US06660652B2
    • 2003-12-09
    • US09745429
    • 2000-12-26
    • Jeong Ho KimYu Chang Kim
    • Jeong Ho KimYu Chang Kim
    • H01L21302
    • H01L21/76897H01L21/76802
    • The present invention discloses a method for fabricating a semiconductor device. In a process for forming metal interconnection contact holes on both a gate electrode including an Si-rich SiON film as a mask insulating film in a peripheral circuit region and on a semiconductor substrate, the metal interconnection contact hole is formed according to a three-step etching process using a photoresist film pattern exposing the intended locations of a metal interconnection contacts as an etching mask. Accordingly, contact properties are improved by preventing damage to the semiconductor substrate, thereby reducing leakage current and improving yield.
    • 本发明公开了一种半导体器件的制造方法。 在外围电路区域的半导体衬底上,作为掩模绝缘膜的富Si硅膜的栅极上形成金属互连接触孔的工序中,金属互连接触孔根据三步骤 使用暴露金属互连触点的预期位置作为蚀刻掩模的光致抗蚀剂膜图案的蚀刻工艺。 因此,通过防止对半导体衬底的损坏来改善接触性能,从而减少漏电流并提高产量。
    • 8. 发明授权
    • Method for fabricating semiconductor device
    • 制造半导体器件的方法
    • US06444559B2
    • 2002-09-03
    • US09741880
    • 2000-12-22
    • Jeong Ho KimYu Chang Kim
    • Jeong Ho KimYu Chang Kim
    • H01L2144
    • H01L21/28525H01L21/76885H01L21/76897
    • The present invention discloses a method for fabricating a semiconductor device. In a process for forming a contact plug, a pad polycrystalline silicon layer pattern is formed at the presumed contact region, and a contact plug is formed according to a selective epitaxial growth (SEG) method using the pad polycrystalline silicon layer pattern as a seed. Accordingly, a higher contact plug is formed by improving a growth rate of the SEG process, and thus a succeeding process can be easily performed. In the SEG process, a contact property is improved by compensating for a semiconductor substrate damaged in a process for forming an insulating film spacer at the sidewalls of a gate electrode. As a result, the property and yield of the semiconductor device are remarkably improved.
    • 本发明公开了一种半导体器件的制造方法。 在形成接触插塞的工艺中,在推定的接触区域形成焊盘多晶硅层图案,并且使用焊盘多晶硅层图案作为种子,根据选择性外延生长(SEG)方法形成接触插塞。 因此,通过提高SEG处理的生长速度来形成更高的接触塞,因此可以容易地进行后续处理。 在SEG工艺中,通过补偿在栅电极的侧壁处形成绝缘膜间隔物的工艺中损坏的半导体衬底,提高了接触性能。 结果,显着提高了半导体器件的性能和产率。