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1. 发明授权

US06573569B2 Trench MOSFET with low gate charge 有权
标题翻译：沟槽MOSFET栅极电荷低
公开(公告)号：US06573569B2
公开(公告)日：2003-06-03
申请号：US09992629
申请日：2001-11-06
申请人： Jifa Hao , Thomas Grebs , Rodney S. Ridley , Louise Skurkey , Chris Gasser
发明人： Jifa Hao , Thomas Grebs , Rodney S. Ridley , Louise Skurkey , Chris Gasser
IPC分类号： H01L2976
CPC分类号： H01L29/7813 , H01L29/4232 , H01L29/42368 , H01L29/4238
摘要： A trench MOS-gated device has an upper surface and includes a substrate having an upper layer of doped monocrystalline semiconductor material of a first conduction type. A gate trench in the upper layer has sidewalls and a floor lined with a first dielectric material and a centrally disposed core formed of a second dielectric material extending upwardly from the first dielectric material on the trench floor and having lateral and top surfaces. The remainder of the trench is substantially filled with a conductive material that encompasses and contacts the lateral and top surfaces of the core of second dielectric material. A doped well region of a second conduction type overlies a drain zone of the first conduction type in the upper layer, and a heavily doped source region of the first conduction type contiguous to the gate trench and a heavily doped body region of the second conduction type are disposed in the well region at the upper surface of the device. An interlevel dielectric layer disposed on the upper surface overlies the gate trench and the source region, and a metal layer in electrical contact with the source and body regions overlies the upper surface and the interlevel dielectric layer.
摘要翻译：沟槽MOS门控器件具有上表面并且包括具有第一导电类型的掺杂单晶半导体材料的上层的衬底。上层中的栅极沟槽具有侧壁和内衬有第一电介质材料的底板和由第二电介质材料形成的居中设置的芯，该第二电介质材料从沟槽底板上的第一介电材料向上延伸并且具有侧表面和顶表面。沟槽的其余部分基本上填充有导电材料，该导电材料包围并接触第二电介质材料的芯的侧表面和顶表面。第二导电类型的掺杂阱区域覆盖在上层中的第一导电类型的漏极区域和与栅极沟槽连续的第一导电类型的重掺杂源极区域和第二导电类型的重掺杂体区域设置在装置的上表面的阱区域中。设置在上表面上的层间介质层覆盖栅极沟槽和源极区域，与源极和体区电接触的金属层覆盖上表面和层间电介质层。

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