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1. 发明授权

US07268590B2 Method and apparatus for implementing subthreshold leakage reduction in LSDL 有权
标题翻译：在LSDL中实现亚阈值泄漏减少的方法和装置
公开(公告)号：US07268590B2
公开(公告)日：2007-09-11
申请号：US11304142
申请日：2005-12-15
申请人： Jerry C. Kao , Chung-Tao Li , Salvatore Nicholas Storino , Christophe Robert Tretz
发明人： Jerry C. Kao , Chung-Tao Li , Salvatore Nicholas Storino , Christophe Robert Tretz
IPC分类号： H03K19/096
CPC分类号： H03K19/0013
摘要： A method and apparatus are provided for implementing subthreshold leakage current reduction in limited switch dynamic logic (LSDL). A limited switch dynamic logic circuit includes a cross-coupled NAND and inverter logic. A dynamic node provides a first input to the NAND. A sleep signal provides a second input to the NAND. An output of the NAND provides an input to the inverter logic that inverts the NAND output and provides a complementary output. The NAND logic includes a series connected first sleep transistor receiving the sleep input. The first sleep transistor is turned OFF during the sleep mode. A second sleep transistor is connected between a voltage supply rail and the NAND output. The second sleep transistor is turned ON during the sleep mode to force high the NAND output and force low complementary output.
摘要翻译：提供了一种用于在限制开关动态逻辑（LSDL）中实现亚阈值泄漏电流降低的方法和装置。有限开关动态逻辑电路包括交叉耦合NAND和反相器逻辑。动态节点为NAND提供第一个输入。睡眠信号为NAND提供第二输入。 NAND的输出为反相器逻辑提供反相NAND输出并提供互补输出的输入。 NAND逻辑包括接收睡眠输入的串联连接的第一睡眠晶体管。在睡眠模式期间，第一睡眠晶体管被关闭。第二个睡眠晶体管连接在电源轨和NAND输出之间。在休眠模式期间，第二个睡眠晶体管导通，以强制NAND输出并强制低互补输出。

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