专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明授权

US08728887B2 Method for fabricating capacitor of semiconductor device 有权
标题翻译：制造半导体器件电容器的方法
公开(公告)号：US08728887B2
公开(公告)日：2014-05-20
申请号：US13468319
申请日：2012-05-10
申请人： Jeong-Yeop Lee , Hyung-Soon Park , Young-Bang Lee , Su-Young Kim
发明人： Jeong-Yeop Lee , Hyung-Soon Park , Young-Bang Lee , Su-Young Kim
IPC分类号： H01L21/8242
CPC分类号： H01L28/90 , H01L27/10852
摘要： A method for fabricating a capacitor of a semiconductor device includes sequentially forming an etch-stop layer and a mold layer over a substrate, sequentially forming a support layer and a hard mask pattern over the mold layer, forming a storage node hole by etching the support layer and the mold layer using the hard mask pattern as an etch barrier, forming a barrier layer on the sidewall of the mold layer inside the storage node hole, etching the etch-stop layer under the storage node hole, forming a storage node inside the storage node hole, and removing the hard mask pattern, the mold layer, and the barrier layer.
摘要翻译：一种用于制造半导体器件的电容器的方法包括在衬底上顺序地形成蚀刻停止层和模具层，在模具层上依次形成支撑层和硬掩模图案，通过蚀刻支撑体形成存储节点孔层和模具层，使用硬掩模图案作为蚀刻阻挡层，在存储节点孔内部的模具层的侧壁上形成阻挡层，蚀刻存储节点孔下方的蚀刻停止层，在其内部形成存储节点存储节点孔，以及去除硬掩模图案，模具层和阻挡层。

2. 发明申请

US20130164903A1 METHOD FOR FABRICATING CAPACITOR OF SEMICONDUCTOR DEVICE 有权
标题翻译：用于制造半导体器件电容器的方法
公开(公告)号：US20130164903A1
公开(公告)日：2013-06-27
申请号：US13468319
申请日：2012-05-10
申请人： Jeong-Yeop Lee , Hyung-Soon Park , Young-Bang Lee , Su-Young Kim
发明人： Jeong-Yeop Lee , Hyung-Soon Park , Young-Bang Lee , Su-Young Kim
IPC分类号： H01L21/02
CPC分类号： H01L28/90 , H01L27/10852
摘要： A method for fabricating a capacitor of a semiconductor device includes sequentially forming an etch-stop layer and a mold layer over a substrate, sequentially forming a support layer and a hard mask pattern over the mold layer, forming a storage node hole by etching the support layer and the mold layer using the hard mask pattern as an etch barrier, forming a barrier layer on the sidewall of the mold layer inside the storage node hole, etching the etch-stop layer under the storage node hole, forming a storage node inside the storage node hole, and removing the hard mask pattern, the mold layer, and the barrier layer.
摘要翻译：一种用于制造半导体器件的电容器的方法包括在衬底上顺序地形成蚀刻停止层和模具层，在模具层上依次形成支撑层和硬掩模图案，通过蚀刻支撑体形成存储节点孔层和模具层，使用硬掩模图案作为蚀刻阻挡层，在存储节点孔内部的模具层的侧壁上形成阻挡层，蚀刻存储节点孔下方的蚀刻停止层，在其内部形成存储节点存储节点孔，以及去除硬掩模图案，模具层和阻挡层。

3. 发明授权

US08035193B2 Method of fabricating capacitor in semiconductor device 失效
标题翻译：在半导体器件中制造电容器的方法
公开(公告)号：US08035193B2
公开(公告)日：2011-10-11
申请号：US12343379
申请日：2008-12-23
申请人： Kwan-Woo Do , Kee-Jeung Lee , Deok-Sin Kil , Young-Dae Kim , Jin-Hyock Kim , Kyung-Woong Park , Jeong-Yeop Lee
发明人： Kwan-Woo Do , Kee-Jeung Lee , Deok-Sin Kil , Young-Dae Kim , Jin-Hyock Kim , Kyung-Woong Park , Jeong-Yeop Lee
IPC分类号： H01L27/00
CPC分类号： H01L28/65
摘要： A capacitor includes a bottom electrode, a dielectric layer and a top electrode over a substrate. A RuXTiYOZ film is included in at least one of the bottom and top electrodes, where x, y and z are positive real numbers. A method of fabricating the capacitor through a sequential formation of a bottom electrode, a dielectric layer and a top electrode over a substrate includes forming a RuXTiYOZ film during a formation of at least one of the bottom electrode and top electrode, where x, y and z are positive real numbers.
摘要翻译：电容器包括底部电极，电介质层和衬底上的顶部电极。至少一个底部电极和顶部电极中包含RuXTiYOZ膜，其中x，y和z为正实数。通过顺序形成底部电极，电介质层和衬底上的顶部电极来制造电容器的方法包括在形成底部电极和顶部电极中的至少一个时形成RuXTiYOZ膜，其中x，y和 z是正实数。

4. 发明授权

US07858405B2 Process condition evaluation method for liquid crystal display module 有权
标题翻译：液晶显示模块的工艺条件评估方法
公开(公告)号：US07858405B2
公开(公告)日：2010-12-28
申请号：US12314695
申请日：2008-12-15
申请人： Jeong-Yeop Lee , Hoon Choi , Young Seok Choi , Kwang-Sik Oh
发明人： Jeong-Yeop Lee , Hoon Choi , Young Seok Choi , Kwang-Sik Oh
IPC分类号： H01L21/66 , G01R31/26 , G01R31/00
CPC分类号： G09G3/006 , G09G3/3648
摘要： A process condition evaluation method for a liquid crystal display module (LCM) includes: a first step of obtaining a threshold power measuring pattern, an analysis sample for a cell bonding status in an LCD fabrication process, and obtaining a lower substrate sample by separating an upper substrate from the threshold power measuring pattern; a second step of supplying voltages on a gate pad on the lower substrate sample with sequentially increasing a voltage level by a predetermined unit by using an electrical device, and obtaining a threshold current and a threshold voltage by measuring currents at a drain pad whenever voltage increased by a predetermined unit is applied to the gate pad; and a third step of obtaining threshold power based on the threshold current and the threshold voltage, and thereby evaluating process conditions of the LCM.
摘要翻译：液晶显示模块（LCM）的工艺条件评估方法包括：获得阈值功率测量图案的第一步骤，LCD制造工艺中的单元接合状态的分析样本，以及通过分离下一个上基板从阈值功率测量图案; 第二步骤，通过使用电气装置依次增加预定单位的电压电平，在下部基板样品上的栅极焊盘上提供电压，并且每当电压增加时，通过测量漏极焊盘处的电流来获得阈值电流和阈值电压通过预定单元施加到栅极焊盘; 以及第三步骤，基于阈值电流和阈值电压获得阈值功率，从而评估LCM的处理条件。

5. 发明授权

US08372746B2 Electrode of semiconductor device and method for fabricating capacitor 失效
标题翻译：半导体器件的电极及制造电容器的方法
公开(公告)号：US08372746B2
公开(公告)日：2013-02-12
申请号：US12824670
申请日：2010-06-28
申请人： Kwan-Woo Do , Kee-Jeung Lee , Kyung-Woong Park , Jeong-Yeop Lee
发明人： Kwan-Woo Do , Kee-Jeung Lee , Kyung-Woong Park , Jeong-Yeop Lee
IPC分类号： H01L21/44
CPC分类号： H01L29/4966 , H01L28/75 , H01L29/47 , H01L29/92 , H01L29/94
摘要： An electrode of a semiconductor device includes a TiCN layer and a TiN layer. A method for fabricating an electrode of a semiconductor device includes preparing a substrate, forming a TiCN layer, and forming a TiN layer.
摘要翻译：半导体器件的电极包括TiCN层和TiN层。制造半导体器件的电极的方法包括制备衬底，形成TiCN层并形成TiN层。

6. 发明授权

US08148231B2 Method of fabricating capacitor 有权
标题翻译：制造电容器的方法
公开(公告)号：US08148231B2
公开(公告)日：2012-04-03
申请号：US12344182
申请日：2008-12-24
申请人： Kwan-Woo Do , Kee-Jeung Lee , Deok-Sin Kil , Young-Dae Kim , Jin-Hyock Kim , Kyung-Woong Park , Jeong-Yeop Lee
发明人： Kwan-Woo Do , Kee-Jeung Lee , Deok-Sin Kil , Young-Dae Kim , Jin-Hyock Kim , Kyung-Woong Park , Jeong-Yeop Lee
IPC分类号： H01L21/44
CPC分类号： C23C16/45525 , C23C16/16 , H01L28/60 , Y10T29/435
摘要： A semiconductor device and a method of fabricating the same include an electrode having a nickel layer with impurities. The electrode having a nickel layer with impurities can be a gate electrode or a capacitor electrode. The electrode having a nickel layer with impurities may include a combination of a pure nickel layer and a nickel layer with impurities.
摘要翻译：半导体器件及其制造方法包括具有杂质的镍层的电极。具有杂质的镍层的电极可以是栅电极或电容电极。具有带有杂质的镍层的电极可以包括纯镍层和具有杂质的镍层的组合。

7. 发明授权

US08319296B2 Semiconductor device including carbon-containing electrode and method for fabricating the same 有权
标题翻译：包含含碳电极的半导体装置及其制造方法
公开(公告)号：US08319296B2
公开(公告)日：2012-11-27
申请号：US12648337
申请日：2009-12-29
申请人： Kwan-Woo Do , Kee-Jeung Lee , Young-Dae Kim , Mi-Hyoung Lee , Jeong-Yeop Lee
发明人： Kwan-Woo Do , Kee-Jeung Lee , Young-Dae Kim , Mi-Hyoung Lee , Jeong-Yeop Lee
IPC分类号： H01L29/78 , H01L21/28
CPC分类号： C23C16/45531 , C23C16/34 , C23C16/36 , C23C16/4554 , H01L21/28537 , H01L21/28562 , H01L21/28568 , H01L27/10885 , H01L28/60 , H01L29/4966
摘要： In a semiconductor device including a carbon-containing electrode and a method for fabricating the same, an electrode has a high work function due to a carbon-containing TiN layer contained therein. It is possible to provide a dielectric layer having a high permittivity and thus to reduce the leakage current by forming an electrode having a high work function. Also, sufficient capacitance of a capacitor can be secured by employing an electrode having a high work function and a dielectric layer having a high permittivity.
摘要翻译：在包含含碳电极的半导体器件及其制造方法中，由于其中含有含碳的TiN层，电极具有高功函数。可以提供具有高介电常数的介电层，从而通过形成具有高功函的电极来减小漏电流。此外，通过使用具有高功函数的电极和具有高介电常数的电介质层，可以确保电容器的足够的电容。

8. 发明授权

US08288274B2 Method of forming noble metal layer using ozone reaction gas 有权
标题翻译：使用臭氧反应气体形成贵金属层的方法
公开(公告)号：US08288274B2
公开(公告)日：2012-10-16
申请号：US12318468
申请日：2008-12-30
申请人： Deok-Sin Kil , Kee-Jeung Lee , Young-Dae Kim , Jin-Hyock Kim , Kwan-Woo Do , Kyung-Woong Park , Jeong-Yeop Lee , Ja-Yong Kim
发明人： Deok-Sin Kil , Kee-Jeung Lee , Young-Dae Kim , Jin-Hyock Kim , Kwan-Woo Do , Kyung-Woong Park , Jeong-Yeop Lee , Ja-Yong Kim
IPC分类号： H01L21/4763
CPC分类号： H01L21/28562 , C23C16/045 , C23C16/18 , C23C16/44 , C23C16/45525 , H01L21/28556 , H01L21/76843 , H01L21/76846 , H01L21/76865 , H01L21/7687 , H01L21/76873 , H01L27/105 , H01L27/11502 , H01L28/65
摘要： A noble metal layer is formed using ozone (O3) as a reaction gas.
摘要翻译：使用臭氧（O 3）作为反应气体形成贵金属层。

9. 发明申请

US20100165226A1 Mother substrate for liquid crystal display device and method of fabricating the same 有权
标题翻译：用于液晶显示装置的母体衬底及其制造方法
公开(公告)号：US20100165226A1
公开(公告)日：2010-07-01
申请号：US12654069
申请日：2009-12-09
申请人： Jeong-Yeop Lee , Jae-myung Seok , Jae-woo Jung , Young-seok Choi , Hyock-jae Shin
发明人： Jeong-Yeop Lee , Jae-myung Seok , Jae-woo Jung , Young-seok Choi , Hyock-jae Shin
IPC分类号： G02F1/1333 , G02F1/13
CPC分类号： G02F1/133351 , G02F1/136204
摘要： A mother substrate for a liquid crystal display device includes: a substrate; a plurality of unit array patterns on the substrate, each of the plurality of unit array patterns including a gate line, a data line crossing the gate line, a thin film transistor connected to the gate line and the data line and a pixel electrode connected to the thin film transistor; a first electrostatic discharge pattern surrounding the plurality of unit array patterns; a second electrostatic discharge pattern connected to the gate line and crossing the first electrostatic discharge pattern; and a third electrostatic discharge pattern connected to the data line and crossing the first electrostatic discharge pattern, the third electrostatic discharge pattern contacting the second electrostatic discharge pattern.
摘要翻译：液晶显示装置用母基板包括：基板; 多个单元阵列图案，多个单元阵列图案中的每一个包括栅极线，与栅极线交叉的数据线，连接到栅极线和数据线的薄膜晶体管和连接到薄膜晶体管; 围绕所述多个单元阵列图案的第一静电放电图案; 连接到栅极线并与第一静电放电图案交叉的第二静电放电图案; 以及第三静电放电图案，其连接到所述数据线并与所述第一静电放电图案交叉，所述第三静电放电图案与所述第二静电放电图案接触。

10. 发明授权

US08178367B2 Process condition evaluation method for liquid crystal display module 有权
标题翻译：液晶显示模块的工艺条件评估方法
公开(公告)号：US08178367B2
公开(公告)日：2012-05-15
申请号：US12958031
申请日：2010-12-01
申请人： Jeong-Yeop Lee , Hoon Choi , Young Seok Choi , Kwang-Sik Oh
发明人： Jeong-Yeop Lee , Hoon Choi , Young Seok Choi , Kwang-Sik Oh
IPC分类号： H01L21/66 , G01R31/26
CPC分类号： G09G3/006 , G09G3/3648
摘要： A process condition evaluation method for a liquid crystal display module (LCM) includes: a first step of obtaining a threshold power measuring pattern, an analysis sample for a cell bonding status in an LCD fabrication process, and obtaining a lower substrate sample by separating an upper substrate from the threshold power measuring pattern; a second step of supplying voltages on a gate pad on the lower substrate sample with sequentially increasing a voltage level by a predetermined unit by using an electrical device, and obtaining a threshold current and a threshold voltage by measuring currents at a drain pad whenever voltage increased by a predetermined unit is applied to the gate pad; and a third step of obtaining threshold power based on the threshold current and the threshold voltage, and thereby evaluating process conditions of the LCM.
摘要翻译：液晶显示模块（LCM）的工艺条件评估方法包括：获得阈值功率测量图案的第一步骤，LCD制造工艺中的单元接合状态的分析样本，以及通过分离下一个上基板从阈值功率测量图案; 第二步骤，通过使用电气装置依次增加预定单位的电压电平，在下部基板样品上的栅极焊盘上提供电压，并且每当电压增加时，通过测量漏极焊盘处的电流来获得阈值电流和阈值电压通过预定单元施加到栅极焊盘; 以及第三步骤，基于阈值电流和阈值电压获得阈值功率，从而评估LCM的处理条件。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式