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    • 1. 发明申请
    • ILLUMINATION DEVICE
    • 照明装置
    • US20110249439A1
    • 2011-10-13
    • US13082402
    • 2011-04-08
    • Jen-Feng ChenRou-Ching Yang
    • Jen-Feng ChenRou-Ching Yang
    • F21V19/02
    • F21S2/00F21V21/30F21Y2115/10
    • An illumination device includes a first illumination unit, a second illumination unit and a driving mechanism. The first illumination unit has a first illumination direction and the second illumination unit has a second illumination direction. The first and second illumination units are pivotally connected to the driving mechanism. The driving mechanism is capable of driving the first and second illumination units to rotate with respect to the driving mechanism. The illumination device can be operated in a first state and a second state. When the illumination device is operated in the first state, the first illumination direction does not intersect the second illumination direction. When the illumination device is operated in the second state, the first illumination direction intersects the second illumination direction.
    • 照明装置包括第一照明单元,第二照明单元和驱动机构。 第一照明单元具有第一照明方向,第二照明单元具有第二照明方向。 第一和第二照明单元枢转地连接到驱动机构。 驱动机构能够驱动第一和第二照明单元相对于驱动机构旋转。 照明装置可以在第一状态和第二状态下操作。 当照明装置在第一状态下操作时,第一照明方向与第二照明方向不相交。 当照明装置在第二状态下操作时,第一照明方向与第二照明方向相交。
    • 2. 发明申请
    • Method for wafer level package of sensor chip
    • 传感器芯片晶圆级封装方法
    • US20070224728A1
    • 2007-09-27
    • US11385882
    • 2006-03-22
    • Enboa WuRou-Ching Yang
    • Enboa WuRou-Ching Yang
    • H01L21/00
    • H01L27/14618H01L23/3114H01L2924/0002H01L2924/00
    • A method for wafer level package (WLP) of sensor chips is provided, including the steps of: providing a wafer, the wafer including a plurality of die regions, each the die region on a first surface of the wafer comprising an active area and a pad surrounding the active area; bounding a transparent protective layer to the first surface of the wafer; forming a stress buffer on a second surface of the wafer; using etching or laser drill to form a via hole at the location between two neighboring die regions through the stress buffer and the wafer to expose the pad or a conductive line between two neighboring pads; and forming a plurality of bump electrodes on the stress buffer for electrical connection to the pads through the via holes. The method can prevent pollution of the die, improve the convenience of package, reduce the manufacture cost, increase the package reliability, and solve the stress problem caused by attaching the die directly to the PCB.
    • 提供了一种用于传感器芯片的晶片级封装(WLP)的方法,包括以下步骤:提供晶片,晶片包括多个管芯区域,每个管芯区域在晶片的第一表面上包括有源区和 围绕活动区域的垫; 将透明保护层限定在晶片的第一表面上; 在所述晶片的第二表面上形成应力缓冲器; 使用蚀刻或激光钻孔在通过应力缓冲器和晶片的两个相邻管芯区域之间的位置处形成通孔,以暴露焊盘或两个相邻焊盘之间的导电线; 以及在所述应力缓冲器上形成多个凸起电极,以通过所述通孔与所述焊盘电连接。 该方法可以防止模具污染,提高包装的便利性,降低制造成本,提高包装可靠性,解决将模具直接连接到PCB所引起的应力问题。
    • 3. 发明授权
    • Method for wafer level package of sensor chip
    • 传感器芯片晶圆级封装方法
    • US07351609B2
    • 2008-04-01
    • US11385882
    • 2006-03-22
    • Enboa WuRou-Ching Yang
    • Enboa WuRou-Ching Yang
    • H01L21/00
    • H01L27/14618H01L23/3114H01L2924/0002H01L2924/00
    • A method for wafer level package (WLP) of sensor chips is provided, including the steps of: providing a wafer, the wafer including a plurality of die regions, each the die region on a first surface of the wafer comprising an active area and a pad surrounding the active area; bounding a transparent protective layer to the first surface of the wafer; forming a stress buffer on a second surface of the wafer; using etching or laser drill to form a via hole at the location between two neighboring die regions through the stress buffer and the wafer to expose the pad or a conductive line between two neighboring pads; and forming a plurality of bump electrodes on the stress buffer for electrical connection to the pads through the via holes. The method can prevent pollution of the die, improve the convenience of package, reduce the manufacture cost, increase the package reliability, and solve the stress problem caused by attaching the die directly to the PCB.
    • 提供了一种用于传感器芯片的晶片级封装(WLP)的方法,包括以下步骤:提供晶片,晶片包括多个管芯区域,每个管芯区域在晶片的第一表面上包括有源区和 围绕活动区域的垫; 将透明保护层限定在晶片的第一表面上; 在所述晶片的第二表面上形成应力缓冲器; 使用蚀刻或激光钻孔在通过应力缓冲器和晶片的两个相邻管芯区域之间的位置处形成通孔,以暴露焊盘或两个相邻焊盘之间的导电线; 以及在所述应力缓冲器上形成多个凸起电极,以通过所述通孔与所述焊盘电连接。 该方法可以防止模具污染,提高包装的便利性,降低制造成本,提高包装可靠性,解决将模具直接连接到PCB所引起的应力问题。
    • 4. 发明授权
    • Tunable long period fiber grating structure and fabrication method
    • 可调谐长周期光纤光栅结构及制作方法
    • US07013066B1
    • 2006-03-14
    • US11038321
    • 2005-01-19
    • Enboa WuRou-Ching YangKuo-Ching San
    • Enboa WuRou-Ching YangKuo-Ching San
    • G02B6/34
    • G02B6/02071G02B6/022
    • The invention discloses a tunable long period fiber grating structure and fabrication method, which produces an expected microbending deformation by adjusting the temperature and making use of the unmatched coefficients of thermal expansion between different materials, and thus creating a phenomenon of mode coupling effect occurred in traditional optical gratings in order to provide the structure and fabrication method for having an effect of tuning spectra by controlling the temperature. This invention not only can be applied to the optical communications and wavelength dependent multiplexed devices and equipments, but also can be applied to the temperature and deformation detection. The tunable long period fiber grating structure in accordance to the present invention comprises a substrate; a periodic structure being disposed thereon and having a first coefficient of thermal expansion; a coupling agent, having a second coefficient of thermal expansion for fixing a fiber to the periodic structure; wherein the first and second coefficients of thermal expansion are different.
    • 本发明公开了一种可调谐长周期光纤光栅结构及其制造方法,通过调节温度并利用不同材料之间的不匹配的热膨胀系数产生预期的微弯曲变形,从而产生传统的模式耦合效应现象 光栅,以提供通过控制温度来调节光谱的效果的结构和制造方法。 本发明不仅可以应用于光通信和波长依赖多路复用装置和设备,而且可以应用于温度和变形检测。 根据本发明的可调谐长周期光纤光栅结构包括基板; 周期性结构设置在其上并具有第一热膨胀系数; 具有用于将纤维固定到周期性结构的第二热膨胀系数的偶联剂; 其中所述第一和第二热膨胀系数不同。