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1. 发明授权

US07118680B2 Self-alignment scheme for enhancement of CPP-GMR 失效
标题翻译：用于增强CPP-GMR的自对准方案
公开(公告)号：US07118680B2
公开(公告)日：2006-10-10
申请号：US10718372
申请日：2003-11-20
申请人： Jei-Wei Chang , Chao-Peng Chen , Min Li , Kochan Ju
发明人： Jei-Wei Chang , Chao-Peng Chen , Min Li , Kochan Ju
IPC分类号： G11B5/39
CPC分类号： G11B5/1278 , Y10T29/49052
摘要： A method for fabricating a current-perpendicular-to-plane (CPP) giant magnetoresistive (GMR) sensor of the synthetic spin valve type is provided, the method including an electron-beam lithographic process employing both primary and secondary electron absorption and first and second self-aligned lift-off processes for patterning the capped ferromagnetic free layer and the conducting, non-magnetic spacer layer. The sensor so fabricated has reduced resistance and increased sensitivity.
摘要翻译：提供了一种用于制造合成自旋阀类型的电流垂直平面（CPP）巨磁阻（GMR）传感器的方法，该方法包括采用初级和次级电子吸收的电子束光刻工艺，第一和第二用于对封装的铁磁自由层和导电的非磁性间隔层进行图案化的自对准剥离工艺。所制造的传感器具有降低的电阻和增加的灵敏度。

2. 发明申请

US20050111143A1 Self-alignment scheme for enhancement of CPP-GMR 失效
标题翻译：用于增强CPP-GMR的自对准方案
公开(公告)号：US20050111143A1
公开(公告)日：2005-05-26
申请号：US10718372
申请日：2003-11-20
申请人： Jei-Wei Chang , Chao-Peng Chen , Min Li , Kochan Ju
发明人： Jei-Wei Chang , Chao-Peng Chen , Min Li , Kochan Ju
IPC分类号： G11B5/127 , G11B5/33
CPC分类号： G11B5/1278 , Y10T29/49052
摘要： A method for fabricating a current-perpendicular-to-plane (CPP) giant magnetoresistive (GMR) sensor of the synthetic spin valve type is provided, the method including an electron-beam lithographic process employing both primary and secondary electron absorption and first and second self-aligned lift-off processes for patterning the capped ferromagnetic free layer and the conducting, non-magnetic spacer layer. The sensor so fabricated has reduced resistance and increased sensitivity.
摘要翻译：提供了一种用于制造合成自旋阀类型的电流垂直平面（CPP）巨磁阻（GMR）传感器的方法，该方法包括采用初级和次级电子吸收的电子束光刻工艺，第一和第二用于对封装的铁磁自由层和导电的非磁性间隔层进行图案化的自对准剥离工艺。所制造的传感器具有降低的电阻和增加的灵敏度。

3. 发明授权

US07111386B2 Lead plating method for GMR head manufacture 失效
公开(公告)号：US07111386B2
公开(公告)日：2006-09-26
申请号：US11266418
申请日：2005-11-03
申请人： Chao-Peng Chen , Kevin Lin , Jei-Wei Chang , Kochan Ju , Hui-Chuan Wang
发明人： Chao-Peng Chen , Kevin Lin , Jei-Wei Chang , Kochan Ju , Hui-Chuan Wang
IPC分类号： G11B5/127 , H04R31/00
CPC分类号： B82Y10/00 , G11B5/3116 , G11B5/3163 , G11B5/3903 , Y10T29/49021 , Y10T29/49032 , Y10T29/49041 , Y10T29/49044 , Y10T29/49046 , Y10T29/49048 , Y10T29/49052 , Y10T29/49128
摘要： A major problem in Lead Overlay design for GMR structures is that the magnetic read track width is wider than the physical read track width. This is due to high interfacial resistance between the leads and the GMR layer which is an unavoidable side effect of prior art methods. The present invention uses electroplating preceded by a wet etch to fabricate the leads. This approach requires only a thin protection layer over the GMR layer to ensure that interface resistance is minimal. Using wet surface cleaning avoids sputtering defects and plating is compatible with this so the cleaned surface is preserved Only a single lithography step is needed to define the track since there is no re-deposition involved.

4. 发明申请

US20060048375A1 Lead plating method for GMR head manufacture 失效
公开(公告)号：US20060048375A1
公开(公告)日：2006-03-09
申请号：US11266418
申请日：2005-11-03
申请人： Chao-Peng Chen , Kevin Lin , Jei-Wei Chang , Kochan Ju , Hui-Chuan Wang
发明人： Chao-Peng Chen , Kevin Lin , Jei-Wei Chang , Kochan Ju , Hui-Chuan Wang
IPC分类号： G11B5/127 , H04R31/00 , C25D5/02
CPC分类号： B82Y10/00 , G11B5/3116 , G11B5/3163 , G11B5/3903 , Y10T29/49021 , Y10T29/49032 , Y10T29/49041 , Y10T29/49044 , Y10T29/49046 , Y10T29/49048 , Y10T29/49052 , Y10T29/49128
摘要： A major problem in Lead Overlay design for GMR structures is that the magnetic read track width is wider than the physical read track width. This is due to high interfacial resistance between the leads and the GMR layer which is an unavoidable side effect of prior art methods. The present invention uses electroplating preceded by a wet etch to fabricate the leads. This approach requires only a thin protection layer over the GMR layer to ensure that interface resistance is minimal. Using wet surface cleaning avoids sputtering defects and plating is compatible with this so the cleaned surface is preserved Only a single lithography step is needed to define the track since there is no re-deposition involved.

5. 发明授权

US06973712B2 Lead plating method for GMR head manufacture 失效
标题翻译： GMR头制造的铅电镀方法
公开(公告)号：US06973712B2
公开(公告)日：2005-12-13
申请号：US10093106
申请日：2002-03-07
申请人： Chao-Peng Chen , Kevin Lin , Jei-Wei Chang , Kochan Ju , Hui-Chuan Wang
发明人： Chao-Peng Chen , Kevin Lin , Jei-Wei Chang , Kochan Ju , Hui-Chuan Wang
IPC分类号： G11B5/31 , G11B5/39 , G11B5/127 , H04R31/00
CPC分类号： B82Y10/00 , G11B5/3116 , G11B5/3163 , G11B5/3903 , Y10T29/49021 , Y10T29/49032 , Y10T29/49041 , Y10T29/49044 , Y10T29/49046 , Y10T29/49048 , Y10T29/49052 , Y10T29/49128
摘要： A major problem in Lead Overlay design for GMR structures is that the magnetic read track width is wider than the physical read track width. This is due to high interfacial resistance between the leads and the GMR layer which is an unavoidable side effect of prior art methods. The present invention uses electroplating preceded by a wet etch to fabricate the leads. This approach requires only a thin protection layer over the GMR layer to ensure that interface resistance is minimal. Using wet surface cleaning avoids sputtering defects and plating is compatible with this so the cleaned surface is preserved Only a single lithography step is needed to define the track since there is no re-deposition involved.
摘要翻译： GMR结构的Lead Overlay设计中的一个主要问题是磁性读取磁道宽度比物理读取磁道宽度宽。这是由于引线和GMR层之间的高界面电阻，这是现有技术方法的不可避免的副作用。本发明使用在湿蚀刻之前的电镀来制造引线。该方法仅需要在GMR层上的薄保护层，以确保接口电阻最小。使用湿表面清洁可以避免溅射缺陷，电镀与此相容，因此清洁表面被保留只需要一个光刻步骤来定义轨道，因为没有重新沉积。

6. 发明授权

US07279269B2 CPP head with parasitic shunting reduction 有权
标题翻译： CPP头与寄生分流减少
公开(公告)号：US07279269B2
公开(公告)日：2007-10-09
申请号：US10734422
申请日：2003-12-12
申请人： Jeiwei Chang , Stuart Kao , Chao Peng Chen , Chunping Luo , Kochan Ju , Min Li
发明人： Jeiwei Chang , Stuart Kao , Chao Peng Chen , Chunping Luo , Kochan Ju , Min Li
IPC分类号： G11B5/39
CPC分类号： G11B5/3163 , G11B5/398 , Y10T428/1171
摘要： The series resistance of a CPP GMR stack can be reduced by shaping it into a small upper, on a somewhat larger, lower part. Because of the sub-micron dimensions involved, good alignment between these is normally difficult to achieve. The present invention discloses a self-alignment process based on first laying down a mask that will determine the shape of the top part. Ion beam etching is then initiated, the ion beam being initially applied from one side only at an angle to the surface normal. During etching, all material on the near side of the mask gets etched but, on the far side, only material that is outside the mask's shadow gets removed so, depending on the beam's angle, the size of the lower part is controlled and the upper part is precisely centrally aligned above it.
摘要翻译： CPP GMR堆叠的串联电阻可以通过将其成形为较小的上部，在较小的较低部分上来减小。由于涉及亚微米尺寸，这些之间的良好对准通常难以实现。本发明公开了一种基于第一次铺设掩模的自对准过程，该掩模将确定顶部的形状。然后开始离子束蚀刻，离子束最初仅从一侧以与表面法线成一定角度施加。在蚀刻期间，掩模近侧的所有材料都被蚀刻，但在远侧，只有在掩模阴影之外的材料被去除，因此根据光束的角度，下部的尺寸被控制，并且上部部分精确地集中在其上。

7. 发明授权

US07864490B2 CPP head with parasitic shunting reduction 有权
标题翻译： CPP头与寄生分流减少
公开(公告)号：US07864490B2
公开(公告)日：2011-01-04
申请号：US11901584
申请日：2007-09-18
申请人： Jeiwei Chang , Stuart Kao , Chao Peng Chen , Chunping Luo , Kochan Ju , Min Li
发明人： Jeiwei Chang , Stuart Kao , Chao Peng Chen , Chunping Luo , Kochan Ju , Min Li
IPC分类号： G11B5/33
CPC分类号： G11B5/3163 , G11B5/398 , Y10T428/1171
摘要： The series resistance of a CPP GMR stack can be reduced by shaping it into a small upper, on a somewhat larger, lower part. Because of the sub-micron dimensions involved, good alignment between these is normally difficult to achieve. The present invention discloses a self-alignment process based on first laying down a mask that will determine the shape of the top part. Ion beam etching is then initiated, the ion beam being initially applied from one side only at an angle to the surface normal. During etching, all material on the near side of the mask gets etched but, on the far side, only material that is outside the mask's shadow gets removed so, depending on the beam's angle, the size of the lower part is controlled and the upper part is precisely centrally aligned above it.
摘要翻译： CPP GMR堆叠的串联电阻可以通过将其成形为较小的上部，在较小的较低部分上来减小。由于涉及亚微米尺寸，这些之间的良好对准通常难以实现。本发明公开了一种基于第一次铺设掩模的自对准过程，该掩模将确定顶部的形状。然后开始离子束蚀刻，离子束最初仅从一侧以与表面法线成一定角度施加。在蚀刻期间，掩模近侧的所有材料都被蚀刻，但在远侧，只有在掩模阴影之外的材料被去除，因此根据光束的角度，下部的尺寸被控制，并且上部部分精确地集中在其上。

8. 发明申请

US20070041124A1 Narrow track CPP head with bias cancellation 有权
标题翻译：窄轨CPP头偏置消除
公开(公告)号：US20070041124A1
公开(公告)日：2007-02-22
申请号：US11588564
申请日：2006-10-27
申请人： Jei-Wei Chang , Koichi Terunuma , Youfeng Zheng , Kochan Ju
发明人： Jei-Wei Chang , Koichi Terunuma , Youfeng Zheng , Kochan Ju
IPC分类号： G11B5/09
CPC分类号： B82Y25/00 , B82Y10/00 , G11B5/3932 , G11B2005/3996 , Y10T29/49021 , Y10T29/49032 , Y10T29/49039 , Y10T29/49041 , Y10T29/49043 , Y10T29/49046 , Y10T29/49048 , Y10T29/49052
摘要： The problem of increased edge sensitivity associated with the reduction of the spacing between bias magnets in a CPP head has been solved by limiting the width of the bias cancellation layer and by adding an extra layer of insulation to ensure that current through the device flows only through its central area, thereby minimizing its edge reading sensitivity.
摘要翻译：通过限制偏置消除层的宽度并添加额外的绝缘层来解决与CPP头中的偏置磁体之间的间隔减小相关联的增加的边缘灵敏度的问题，以确保通过器件的电流仅流过其中心区域，从而最小化其边缘读取灵敏度。

9. 发明授权

US07012789B2 Composite shared pole design for magnetoresistive merged heads 失效
标题翻译：用于磁阻合并头的复合共享极设计
公开(公告)号：US07012789B2
公开(公告)日：2006-03-14
申请号：US10131675
申请日：2002-04-24
申请人： Kochan Ju , Cherng-Chyi Han , Po-Kang Wang , Mao-Min Chen , Chun Liu , Jei Wei Chang
发明人： Kochan Ju , Cherng-Chyi Han , Po-Kang Wang , Mao-Min Chen , Chun Liu , Jei Wei Chang
IPC分类号： G11B5/127
CPC分类号： G11B5/3912 , G11B5/3967 , Y10T29/49044 , Y10T29/49046
摘要： A merged read/write magnetic recording head comprises a low magnetic moment first magnetic shield layer over a substrate. A read gap layer with a magnetoresistive head is formed over the first shield layer. A shared pole comprises a low magnetic moment second magnetic shield layer plated on a sputtered seed PLM layer over the read gap layer, a non-magnetic layer plated over the PLM layer and a HMM lower pole layer plated over the second magnetic shield layer. A write gap layer is formed over the first high magnetic moment pole layer of the shared pole. An upper pole comprises a high magnetic moment pole layer over the write gap layer.
摘要翻译：合并的读/写磁记录头包括在衬底上的低磁矩第一磁屏蔽层。在第一屏蔽层上形成具有磁阻头的读取间隙层。共享极包括电镀在读取间隙层上的溅射种子PLM层上的低磁矩第二磁屏蔽层，镀在PLM层上的非磁性层和镀在第二磁屏蔽层上的HMM下极层。在共享极的第一高磁矩极点上形成写间隙层。上极包括写间隙层上的高磁矩极点层。

10. 发明申请

US20050094323A1 Integrated spin valve head 失效
标题翻译：集成自旋阀头
公开(公告)号：US20050094323A1
公开(公告)日：2005-05-05
申请号：US11011994
申请日：2004-12-14
申请人： Kochan Ju , Cheng Horng , Youfeng Zheng , Simon Liao , Jei-Wei Chang
发明人： Kochan Ju , Cheng Horng , Youfeng Zheng , Simon Liao , Jei-Wei Chang
IPC分类号： G01R33/09 , B05D7/00 , G11B5/127 , G11B5/187 , G11B5/29 , G11B5/31 , G11B5/33 , G11B5/39 , H01F10/16 , H01F10/30 , H01F10/32 , H01L43/08 , H01L43/12 , H04R31/00
CPC分类号： G11B5/33 , G11B5/29 , G11B5/31 , Y10T29/49037 , Y10T29/49041 , Y10T29/49043 , Y10T29/49044 , Y10T29/49046 , Y10T29/49052
摘要： Currently, the shield-to-shield separation of a spin valve head cannot be below about 800 Å, mainly due to sensor-to-lead shorting problems. This problem has now been overcome by inserting a high permeability, high resistivity, thin film shield on the top or bottom (or both) sides of the spin valve sensor. A permeability greater than about 500 is required together with a resistivity about 5 times greater than that of the free layer and an MrT value for the thin film shield that is 4 times greater than that of the free layer. Five embodiments of the invention are described.
摘要翻译：目前，自旋阀头的屏蔽到屏蔽分离不能低于约800，这主要是由于传感器到引线短路问题。现在已经通过在自旋阀传感器的顶部或底部（或两个）侧上插入高磁导率，高电阻率的薄膜屏蔽来克服这个问题。需要大于约500的磁导率，其电阻率大约为自由层的电阻率的约5倍，薄膜屏蔽层的电阻值大于自由层的4倍层。描述本发明的五个实施例。

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