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1. 发明授权

US06587813B1 PCI bus system testing and verification apparatus and method 失效
标题翻译： PCI总线系统测试验证设备及方法
公开(公告)号：US06587813B1
公开(公告)日：2003-07-01
申请号：US09546786
申请日：2000-04-11
申请人： Jeffrey K. Whitt , David So , Stuart Nuffer , Erik Paulsen , John Grabarek , Andrew Hadley , William Schmitz , Adam Browen
发明人： Jeffrey K. Whitt , David So , Stuart Nuffer , Erik Paulsen , John Grabarek , Andrew Hadley , William Schmitz , Adam Browen
IPC分类号： G06F1130
CPC分类号： G06F13/4269
摘要： An improved PCI verification method and apparatus provides iterative testing of all desired conditions or protocol combinations in a PCI system. One or more commands may be tested in combination with one or more functional behavior parameters throughout a desired range of variable parameter values. In one aspect, an apparatus and method for testing a PCI device for compliance under the PCI specification in target operation is provided. In another aspect, an apparatus and method for testing a PCI device for compliance under the PCI specification in master operation is provided.
摘要翻译：改进的PCI验证方法和装置提供PCI系统中所有期望条件或协议组合的迭代测试。可以在整个可变参数值的期望范围内结合一个或多个功能行为参数来测试一个或多个命令。一方面，提供了一种用于在目标操作中测试PCI设备以符合PCI规范的PCI设备的装置和方法。另一方面，提供了一种用于在主操作中测试PCI设备以符合PCI规范的PCI设备的装置和方法。

2. 发明申请

US20080276133A1 Software-Controlled Dynamic DDR Calibration 审中-公开
标题翻译：软件控制的动态DDR校准
公开(公告)号：US20080276133A1
公开(公告)日：2008-11-06
申请号：US11743599
申请日：2007-05-02
申请人： Andrew Hadley , Stuart Nuffer , Adam Browen
发明人： Andrew Hadley , Stuart Nuffer , Adam Browen
IPC分类号： G06F11/00 , G01R31/3183 , G06F1/12
CPC分类号： G11C29/02 , G11C7/04 , G11C7/1066 , G11C7/22 , G11C11/401 , G11C29/022 , G11C29/023 , G11C29/028 , G11C2207/2254
摘要： A system, device and method are described that provide dynamic calibration of high-speed systems, such as high-speed DDR memory systems. In accordance with certain embodiments of the invention, a DDR controller includes functionality that both initializes settings associated with a data window and dynamically maintains the data window within a defined threshold of operation. In various embodiments, an initial calibration module is provided on the DDR controller for performing a full calibration wherein a data window is initially generated and a center point of the data window is established within a specified threshold. Interrupts may be generated to evaluate the data window and center point and/or recalibrate the data window and center point in response to the evaluation or an interrupt generated from another source, such as a system error or user generated interrupt. If a timer expiration interrupt occurs, the data window and its center point are re-evaluated.
摘要翻译：描述了提供诸如高速DDR存储器系统的高速系统的动态校准的系统，装置和方法。根据本发明的某些实施例，DDR控制器包括能够初始化与数据窗口相关联的设置并且将数据窗口动态地维持在定义的操作阈值内的功能。在各种实施例中，在DDR控制器上提供初始校准模块，用于执行完全校准，其中最初生成数据窗口，并且在指定阈值内建立数据窗口的中心点。可以产生中断以评估数据窗口和中心点和/或响应于评估或从另一个源产生的中断（例如系统错误或用户生成的中断）来重新校准数据窗口和中心点。如果发生定时器过期中断，则重新评估数据窗口及其中心点。

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