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1. 发明申请

US20090251841A1 INCORPORATING ELECTROSTATIC PROTECTION INTO MINIATURE CONNECTORS 有权
标题翻译：将静电保护纳入微型连接器
公开(公告)号：US20090251841A1
公开(公告)日：2009-10-08
申请号：US12062854
申请日：2008-04-04
申请人： Jeffery A. Whalin , Maxwill Bassler , Ramon Leon , Timothy E. Pachla , Stephen J. Whitney
发明人： Jeffery A. Whalin , Maxwill Bassler , Ramon Leon , Timothy E. Pachla , Stephen J. Whitney
IPC分类号： H02H3/20 , H01R43/20
CPC分类号： H01R43/24 , H01R13/6485 , H01R13/6658 , Y10T29/49208
摘要： Electrostatic discharge protection, also known as ESD protection, is provided in the form of a discrete array with a voltage variable material (VVM) or a VVM device. The array is fabricated with a common electrode for connection to ground, and one or more electrodes configured for connection to an electrical component. The electrical component is a connector attached to an electrical circuit containing devices subject to damage by ESD events. The array is placed into a pocket or space on the connector and is held in place mechanically by spring force or by soldering to leads or electrodes of the connector. The array may be soldered to a ground connection or held in place by pressure, such as from a spring or from an outer housing or shell. In some embodiments, the array is removable from the component without affecting component circuits other than removal of ESD protection.
摘要翻译：静电放电保护（也称为ESD保护）以具有电压可变材料（VVM）或VVM器件的离散阵列的形式提供。该阵列制造有用于连接到地的公共电极以及被配置用于连接到电气部件的一个或多个电极。电气部件是连接到包含受ESD事件损坏的装置的电路的连接器。将阵列放置在连接器上的口袋或空间中，并通过弹簧力机械地保持就位或通过焊接到连接器的引线或电极。阵列可以焊接到接地连接处或通过压力例如从弹簧或从外部壳体或外壳保持在适当的位置。在一些实施例中，除了去除ESD保护之外，阵列可从组件移除而不影响组件电路。

2. 发明授权

US07952848B2 Incorporating electrostatic protection into miniature connectors 有权
标题翻译：将静电保护装入微型连接器
公开(公告)号：US07952848B2
公开(公告)日：2011-05-31
申请号：US12062854
申请日：2008-04-04
申请人： Jeffery A. Whalin , Maxwill Bassler , Ramon Leon , Timothy E. Pachla , Stephen J. Whitney
发明人： Jeffery A. Whalin , Maxwill Bassler , Ramon Leon , Timothy E. Pachla , Stephen J. Whitney
IPC分类号： H02H3/20
CPC分类号： H01R43/24 , H01R13/6485 , H01R13/6658 , Y10T29/49208
摘要： Electrostatic discharge protection, also known as ESD protection, is provided in the form of a discrete array with a voltage variable material (VVM) or a VVM device. The array is fabricated with a common electrode for connection to ground, and one or more electrodes configured for connection to an electrical component. The electrical component is a connector attached to an electrical circuit containing devices subject to damage by ESD events. The array is placed into a pocket or space on the connector and is held in place mechanically by spring force or by soldering to leads or electrodes of the connector. The array may be soldered to a ground connection or held in place by pressure, such as from a spring or from an outer housing or shell. In some embodiments, the array is removable from the component without affecting component circuits other than removal of ESD protection.
摘要翻译：静电放电保护（也称为ESD保护）以具有电压可变材料（VVM）或VVM器件的离散阵列的形式提供。该阵列制造有用于连接到地的公共电极以及被配置用于连接到电气部件的一个或多个电极。电气部件是连接到包含受ESD事件损坏的装置的电路的连接器。将阵列放置在连接器上的口袋或空间中，并通过弹簧力机械地保持就位或通过焊接到连接器的引线或电极。阵列可以焊接到接地连接处或通过压力例如从弹簧或从外部壳体或外壳保持在适当的位置。在一些实施例中，除了去除ESD保护之外，阵列可从组件移除而不影响组件电路。

3. 发明申请

US20090102595A1 FUSE WITH CAVITY FORMING ENCLOSURE 审中-公开
标题翻译：保险丝形成外壳
公开(公告)号：US20090102595A1
公开(公告)日：2009-04-23
申请号：US12345344
申请日：2008-12-29
申请人： Timothy E. Pachla , Gordon T. Dietsch
发明人： Timothy E. Pachla , Gordon T. Dietsch
IPC分类号： H01H85/046
CPC分类号： H01H85/0411 , H01H85/0086 , H01H85/046 , H01H2085/0412 , H01H2085/0414 , H01H2085/0555
摘要： A surface mount fuse includes a substrate, a fuse element applied to the substrate, first and second terminals applied to substrate, first and second conductors connecting the fuse element electrically with the first and second terminals, and an enclosure coupled to the substrate, the enclosure covering the first and second conductors and defining a cavity overlying at least a portion of the fuse element, the cavity allowing for distortion of the fuse element upon its opening.
摘要翻译：表面安装保险丝包括衬底，施加到衬底的熔丝元件，施加到衬底的第一和第二端子，将熔丝元件与第一和第二端子电连接的第一和第二导体以及耦合到衬底的外壳覆盖所述第一和第二导体并且限定覆盖所述熔丝元件的至少一部分的空腔，所述空腔允许所述熔丝元件在其开口时变形。

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