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1. 发明申请

US20150348982A1 Semiconductor Devices 审中-公开
公开(公告)号：US20150348982A1
公开(公告)日：2015-12-03
申请号：US14819841
申请日：2015-08-06
申请人： Jeeyong Kim , Woonkyung LEE , Sunggil KIM , Jin-Kyu KANG , Jung-Hwan LEE , Bonyoung KOO , Kihyun HWANG , Byoungsun JU , Jintae NOH
发明人： Jeeyong Kim , Woonkyung LEE , Sunggil KIM , Jin-Kyu KANG , Jung-Hwan LEE , Bonyoung KOO , Kihyun HWANG , Byoungsun JU , Jintae NOH
IPC分类号： H01L27/115 , H01L29/78 , H01L23/535
CPC分类号： H01L27/11526 , H01L21/28 , H01L21/76841 , H01L23/48 , H01L23/535 , H01L27/11521 , H01L27/11568 , H01L27/11573 , H01L29/4958 , H01L29/78 , H01L29/788 , H01L29/7883 , H01L29/792 , H01L2924/0002 , H01L2924/00
摘要： Provided are a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes a charge storage pattern formed on a substrate; a dielectric pattern formed on the charge storage pattern; a first conductive pattern including silicon doped with a first impurity of a first concentration, the first conductive pattern being disposed on the dielectric pattern; and a second conductive pattern including metal silicide doped with a second impurity of a second concentration, the second conductive pattern being disposed on the first conductive pattern. The first concentration may be higher than the second concentration.

2. 发明申请

US20120074484A1 SEMICONDUCTOR DEVICES AND METHODS OF MANUFACTURING SEMICONDUCTOR DEVICES 审中-公开
标题翻译：半导体器件及制造半导体器件的方法
公开(公告)号：US20120074484A1
公开(公告)日：2012-03-29
申请号：US13223698
申请日：2011-09-01
申请人： Jin-Kyu KANG , Woon-Kyung LEE , Jee-Yong KIM , Jung-Hwan LEE
发明人： Jin-Kyu KANG , Woon-Kyung LEE , Jee-Yong KIM , Jung-Hwan LEE
IPC分类号： H01L21/336 , H01L29/788
CPC分类号： H01L21/764 , H01L21/7682 , H01L27/11524 , H01L27/11526
摘要： A method of manufacturing a semiconductor device including forming a plurality of gate structures spaced apart from each other on a substrate; forming a first insulation layer covering the gate structures, the first insulation layer including a void between the gate structures; removing an upper portion of the first insulation layer to form a first insulation layer pattern on sidewalls of lower portions of the gate structures and on the substrate between the gate structures, the first insulation layer pattern including a first recess thereon; forming a conductive layer on upper portions of the gate structures exposed by the first insulation layer pattern; reacting the conductive layer with the gate structures; and forming a second insulation layer on the upper portions of the gate structures, the second insulation layer including a second recess therebeneath in fluid communication with the first recess.
摘要翻译：一种制造半导体器件的方法，包括在衬底上形成彼此间隔开的多个栅极结构; 形成覆盖所述栅极结构的第一绝缘层，所述第一绝缘层包括所述栅极结构之间的空隙; 去除所述第一绝缘层的上部以在所述栅极结构的下部的侧壁和所述栅极结构之间的所述衬底上形成第一绝缘层图案，所述第一绝缘层图案包括其上的第一凹部; 在由第一绝缘层图案暴露的栅极结构的上部形成导电层; 使导电层与栅极结构反应; 以及在所述栅极结构的上部形成第二绝缘层，所述第二绝缘层包括与所述第一凹部流体连通的第二凹部。

3. 发明申请

US20160111165A1 METHODS OF OPERATING A NONVOLATILE MEMORY DEVICE 有权
标题翻译：操作非易失性存储器件的方法
公开(公告)号：US20160111165A1
公开(公告)日：2016-04-21
申请号：US14859637
申请日：2015-09-21
申请人： Sunil SHIM , Joon-sung LIM , Jin-Kyu KANG , Euido KIM , Jang-Gn YUN
发明人： Sunil SHIM , Joon-sung LIM , Jin-Kyu KANG , Euido KIM , Jang-Gn YUN
IPC分类号： G11C16/16 , G11C16/34
CPC分类号： G11C16/16 , G11C11/5635 , G11C16/3445
摘要： An operating method of a nonvolatile memory device is provided which sequentially performs a plurality of erase loops to erase at least one of a plurality of memory blocks. The operating method comprises performing at least one of the plurality of erase loops; performing a post-program operation on the at least one memory block after the at least one erase loop is executed; and performing remaining erase loops of the plurality of erase loops. The post-program operation is not performed when each of the remaining erase loops is executed.
摘要翻译：提供一种非易失性存储装置的操作方法，其顺序地执行多个擦除循环以擦除多个存储块中的至少一个。所述操作方法包括执行所述多个擦除环中的至少一个; 在执行所述至少一个擦除循环之后对所述至少一个存储器块执行后编程操作; 以及执行所述多个擦除环路的剩余擦除环路。当执行每个剩余擦除循环时，不执行后编程操作。

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