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1. 发明授权

US4038744A Methods of manufacturing carrier supports for integrated chips and mounting of integrated circuit chips to a substrate 失效
标题翻译：制造用于集成芯片的载体支架和将集成电路芯片安装到基板的方法
公开(公告)号：US4038744A
公开(公告)日：1977-08-02
申请号：US680749
申请日：1976-04-27
申请人： Jean Marie Cheype , Patrick Courant , Karel Kurzweil
发明人： Jean Marie Cheype , Patrick Courant , Karel Kurzweil
IPC分类号： G06K19/077 , B42D15/10 , H01L21/60 , H01L23/495 , H01R9/00
CPC分类号： H01L24/86 , H01L23/49572 , H01L2924/01005 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01074 , H01L2924/01075 , H01L2924/01082 , H01L2924/01087 , H01L2924/014 , H01L2924/10253 , H01L2924/14 , Y10T29/49121
摘要： A method of fabricating a carrier support for integrated circuit chips to be mounted subsequently on a substrate. A flexible strip of an inextensible insulating material is provided with equidistant openings in the center of each of which a chip is to be mounted. One of the faces of this strip is covered with a conductive film, the said film is cut away to form in each opening interface conductors which overhang towards the center of the opening. Before the conductive film is cut away, the film is coated with a layer of photosensitive lacquer which is partly removed to enable the film to be laid bare in regions which, in each opening, form part of an open-centered zone which surrounds that portion of the film in which the free inner ends of the interface conductors associated with this opening are to be produced. The bared regions in this opening either consist of the whole of the said open-centered zone or else consist of those portions of the zone which are located at least at the points where the said zone is crossed by the outlines of the future interface conductors associated with this opening. A layer of synthetic resin electrodeposited on the bared regions of the film and thereafter the remaining portions of the photosensitive lacquer are removed, as a result of which there is no danger of the interface conductors resulting from the film being cut away causing short circuits when, after the chips have been mounted on their free inner ends, the conductors are cut at a short distance from the edges of each chip so that they may finally be soldered to the said substrate.
摘要翻译：一种制造随后安装在基板上的集成电路芯片的载体支架的方法。不可伸展的绝缘材料的柔性条带在每个芯片的中心安装有等距的开口。该带的一个表面被导电膜覆盖，所述膜被切除以在每个开口界面上形成，该导体突出到开口的中心。在导电膜被切除之前，该膜被一层光敏漆涂覆，该层被部分地去除，以使膜能够在每个开口中形成围绕该部分的开放中心区域的一部分的区域中放置其中与该开口相关的界面导体的自由内端将被制造。该开口中的裸露区域由整个所述开放中心区域组成，或者由区域的至少位于所述区域与未来接口导体的轮廓相交的点处的那些部分组成与这个开幕。电解沉积在膜的裸露区域上的合成树脂层，然后除去感光漆漆漆的其余部分，结果是，由于薄膜被切断导致的界面导体不会导致短路，在芯片已经安装在其自由内端上之后，导体在与每个芯片的边缘短距离处被切割，使得它们可以最终被焊接到所述基板上。

2. 发明授权

US4371744A Substrate for interconnecting electronic integrated circuit components having a repair arrangement enabling modification of connections to a mounted chip device 失效
标题翻译：用于互连电子集成电路部件的基板，其具有能够修改与安装的芯片装置的连接的修复布置
公开(公告)号：US4371744A
公开(公告)日：1983-02-01
申请号：US296835
申请日：1981-08-27
申请人： Bernard Badet , Karel Kurzweil
发明人： Bernard Badet , Karel Kurzweil
IPC分类号： H05K3/46 , H01L21/60 , H01L23/538 , H05K1/00 , H05K3/22 , H05K1/18
CPC分类号： H01L24/85 , H01L23/5383 , H01L24/48 , H05K1/0292 , H01L2224/32225 , H01L2224/45012 , H01L2224/45014 , H01L2224/48091 , H01L2224/48227 , H01L2224/48472 , H01L2224/73265 , H01L2224/85 , H01L24/45 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01023 , H01L2924/01031 , H01L2924/01033 , H01L2924/01074 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H05K1/0298 , H05K2203/049
摘要： An interconnecting substrate according to the invention comprises an insulating base on which rests a set of alternating, superimposed conductive and insulating layers. Contacts are formed on the uppermost insulating layer which border at least one site or zone intended for an integrated circuit chip device whose output conductors are to be connected to the said contacts. Through-connections enable the contacts to be coupled to one of the inner conductive layers. The through-connections include at least one through-connection on the inside of the site relative to at least a predetermined one of the said contacts. A shunt conductor means connected to the predetermined contact has a part outside the site which is connected to an additional contact which serves as a substitute or replaces the said predetermined contact for the connection to the associated output conductor of the chip device. The repair arrangement according to the invention allows one to substitute for a connection inside a site over which a chip is situated between a contact and a through-connection, a link which has a part outside the site from which it is possible to make a repair or modification of the circuit function without the need to remove the component. The repair arrangement is made up of conductive and insulating layers which are deposited at least locally on the substrate.
摘要翻译：根据本发明的互连衬底包括绝缘基底，其上搁置一组交替的，叠加的导电和绝缘层。接触件形成在最上层的绝缘层上，该绝缘层与要输出导体要连接到所述触点的集成电路芯片器件的至少一个位置或区域相交。通过连接使得触点能够耦合到内部导电层中的一个。通孔连接件包括至少一个至少一个所述接触件中的一个预定的一个连接件，位于所述位置的内部上。连接到预定触点的分流导体装置具有连接到作为替代的附加触点的位置之外的部分，或者替换用于连接到芯片装置的相关联的输出导体的所述预定触点。根据本发明的修理装置允许人们在芯片位于触点和通过连接之间的位置内替代连接，该连接件具有可以进行维修的位置之外的部分或修改电路功能而无需拆卸组件。修复装置由至少局部沉积在基底上的导电层和绝缘层构成。

3. 发明授权

US4812949A Method of and apparatus for mounting an IC chip 失效
标题翻译：安装IC芯片的方法和装置
公开(公告)号：US4812949A
公开(公告)日：1989-03-14
申请号：US29546
申请日：1987-03-24
申请人： Jacques Fontan , Karel Kurzweil , Gerard Dehaine
发明人： Jacques Fontan , Karel Kurzweil , Gerard Dehaine
IPC分类号： H01L21/60 , H01L23/057 , H01L23/498 , H01L23/64 , H05K3/30 , H05K3/34 , H05K7/20
CPC分类号： H01L23/642 , H01L23/057 , H01L23/49822 , H01L2224/16 , H01L2224/73253 , H01L2924/01057 , H01L2924/01079 , H01L2924/09701 , H05K3/301 , H05K3/3421 , Y10T29/4913
摘要： A method for mounting an integrated circuit or chip (10) on a printed circuit board (11), the chip package (36) produced thereby, and a tape carrying chips for using the method are proposed. The chip is mounted by fixing its leads (12) on the zones (13) of the board (11) by securing the chip between a support board (15) and a heat dissipating element (14) that are connected with one another by conductive columns (16) to form the package (36). The invention is applicable in particular to manufacture of very large scale integration (VSLI) chips.
摘要翻译：提出了一种将集成电路或芯片（10）安装在印刷电路板（11）上的方法，由此产生的芯片封装（36）和用于使用该方法的芯片。通过将芯片固定在支撑板（15）和散热元件（14）之间，将芯片固定在板（11）的区域（13）上来安装芯片，导线（12）通过导电柱（16）以形成包装（36）。本发明特别适用于制造非常大规模的集成（VSLI）芯片。

4. 发明授权

US4222516A Standardized information card 失效
标题翻译：标准化信息卡
公开(公告)号：US4222516A
公开(公告)日：1980-09-16
申请号：US4588
申请日：1979-01-18
申请人： Bernard Badet , Francois Guillaume , Karel Kurzweil
发明人： Bernard Badet , Francois Guillaume , Karel Kurzweil
IPC分类号： G06K19/077 , H01L21/60 , H01L23/055 , H01L23/498 , G06K19/06 , B23K1/20 , G06K7/06
CPC分类号： H01L23/49855 , G06K19/07718 , G06K19/07745 , H01L23/055 , H01L24/81 , H01L2224/16 , H01L2224/81801 , H01L2924/01005 , H01L2924/01033 , H01L2924/0105 , H01L2924/01082 , H01L2924/14 , H01L2924/15173 , H01L2924/16152 , H05K2201/10681
摘要： A standardized access card is formed of a single or a pair of bonded sheetsf material including a cavity within which is disposed an integrated circuit assembly for processing electrical signals arranged within the card. The thickness of the assembly is relatively smaller than the thickness of the card and terminal areas of the assembly are accessible through cut-outs in the card which may be open or plugged with conductive material. The card may be formed in a continuous process from a plurality of strips of material which separately provide the card material, the integrated circuit assembly and a cover for the device of the circuit assembly.
摘要翻译：标准化的存取卡由单一或一对粘合的材料片形成，包括空腔，其中设置有用于处理布置在卡内的电信号的集成电路组件。组件的厚度相对小于卡的厚度，并且组件的终端区域可通过卡中的切口进入，该卡可以用导电材料打开或堵塞。该卡片可以从分开提供卡片材料的多个材料条，集成电路组件和用于电路组件的装置的盖子以连续的方法形成。

5. 发明授权

US4982311A Package for very large scale integrated circuit 失效
标题翻译：大尺寸集成电路封装
公开(公告)号：US4982311A
公开(公告)日：1991-01-01
申请号：US250549
申请日：1988-09-29
申请人： Gerard Dehaine , Karel Kurzweil
发明人： Gerard Dehaine , Karel Kurzweil
IPC分类号： H01L23/04 , H01L23/057 , H01L23/498 , H01L23/50 , H01L23/64
CPC分类号： H01L23/50 , H01L23/057 , H01L23/49822 , H01L23/642 , H01L24/49 , H01L2224/32225 , H01L2224/32245 , H01L2224/48091 , H01L2224/48227 , H01L2224/49109 , H01L2224/73265 , H01L24/48 , H01L24/73 , H01L2924/00014 , H01L2924/01005 , H01L2924/01014 , H01L2924/01023 , H01L2924/01027 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01058 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15312 , H01L2924/1532 , H01L2924/16195 , H01L2924/19041 , H01L2924/19106 , H01L2924/30105 , Y10S257/916
摘要： A package (10) for very large scale integrated circuit (VLSI) includes an electrically and thermally conductive tagboard (20) carrying the chip (12); supply terminals (15a) receiving a first supply potential; an interconnect structure (16) made of ceramic which surrounds the chip (12) and carries both the signal terminals (14) of the package (10) and the supply terminals (15b) receiving a second supply potential, the interconnect structure (16) incorporating the signal and supply conductors intended for the chip (12); and a decoupling device (17) including capacitors (19) and two conductor faces (18a, 18b) connected respectively to the supply terminals (15a, 15b). The decoupling by the capicitors (19) is thus done as close as possible to the conductor faces (18a and 18b) and as close as possible to the chip (12) at the level of islets (32a, 32b).
摘要翻译：用于超大规模集成电路（VLSI）的封装（10）包括承载芯片（12）的导电导电标签（20）。供给端子（15a）接收第一电源电位; 由陶瓷构成的互连结构（16），其围绕所述芯片（12）并且承载所述封装（10）的信号端子（14）和接收第二电源电位的所述电源端子（15b），所述互连结构（16）结合用于芯片（12）的信号和电源导体; 以及包括电容器（19）和分别连接到电源端子（15a，15b）的两个导体面（18a，18b）的去耦装置（17）。因此，由钳位电路（19）进行的去耦合尽可能靠近导体面（18a和18b），并尽可能靠近胰岛（32a，32b）的芯片（12）。

6. 发明授权

US4216577A Portable standardized card adapted to provide access to a system for processing electrical signals and a method of manufacturing such a card 失效
标题翻译：适于提供对用于处理电信号的系统的访问的便携式标准卡和制造这种卡的方法
公开(公告)号：US4216577A
公开(公告)日：1980-08-12
申请号：US931686
申请日：1978-08-07
申请人： Bernard Badet , Francois Guillaume , Karel Kurzweil
发明人： Bernard Badet , Francois Guillaume , Karel Kurzweil
IPC分类号： G06K19/077 , H01L21/60 , H01L23/498 , H05K7/02 , H05K3/32
CPC分类号： H05K7/02 , G06K19/07718 , G06K19/07745 , H01L23/49855 , H01L24/81 , H01L2224/81801 , H01L2924/01005 , H01L2924/01033 , H01L2924/0105 , H01L2924/01082 , H01L2924/14 , H01L2924/16152 , H05K2201/10681 , Y10S283/904 , Y10T156/1039 , Y10T156/1077 , Y10T29/49128 , Y10T29/49146
摘要： A standardized access card is formed of a single or a pair of bonded sheets of material including a cavity within which is disposed an integrated circuit assembly for processing electrical signals arranged within the card. The thickness of the assembly is relatively smaller than the thickness of the card and terminal areas of the assembly are accessible through cut-outs in the card which may be open or plugged with conductive material. The card may be formed in a continuous process from a plurality of strips of material which separately provide the card material, the integrated circuit assembly and a cover for the device of the circuit assembly.
摘要翻译：标准化的存取卡由单一或一对粘合的材料片形成，包括空腔，其中设置有用于处理布置在卡内的电信号的集成电路组件。组件的厚度相对小于卡的厚度，并且组件的终端区域可通过卡中的切口进入，该卡可以用导电材料打开或堵塞。该卡片可以从分开提供卡片材料的多个材料条，集成电路组件和用于电路组件的装置的盖子以连续的方法形成。

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