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1. 发明授权

US08232179B2 Method to improve wet etch budget in FEOL integration 有权
标题翻译：在FEOL集成中改善湿法蚀刻预算的方法
公开(公告)号：US08232179B2
公开(公告)日：2012-07-31
申请号：US12571483
申请日：2009-10-01
申请人： Jason E Cummings , Lisa F Edge , Balasubramanian S. Haran , David V Horak , Hemanth Jagannathan , Sanjay Mehta
发明人： Jason E Cummings , Lisa F Edge , Balasubramanian S. Haran , David V Horak , Hemanth Jagannathan , Sanjay Mehta
IPC分类号： H01L21/76
CPC分类号： H01L21/76229
摘要： A method of forming a semiconductor device is provided where in one embodiment an STI fill is recessed below the pad nitride and pad oxide layers, to a level substantially coplanar with the top surface of the substrate. A thin (having a thickness in the range of about 10 Å-100 Å) wet etch resistant layer is formed in contact with and completely covering at least the top surface of the recessed STI fill material. The thin wet etch resistant layer is more resistant to a wet etch process than at least the pad oxide layer. The thin wet etch resistant layer may be a refractory dielectric material, or a dielectric such as HfOx, AlyOx, ZrOx, HfZrOx, and HfSiOx. The inventive wet etch resistant layer improves the wet etch budget of subsequent wet etch processing steps.
摘要翻译：提供一种形成半导体器件的方法，其中在一个实施例中，STI填充物在衬垫氮化物和衬垫氧化物层下方凹入到与衬底的顶表面基本上共面的水平。至少形成凹入的STI填充材料的上表面，形成薄（具有在约10埃-120埃范围内的厚度）耐湿蚀刻层。薄的耐湿蚀刻层比至少衬垫氧化物层更耐湿蚀刻工艺。薄的耐湿蚀刻层可以是耐火电介质材料，或诸如HfO x，Al y O x，ZrO x，HfZrO x和HfSiO x的电介质。本发明的耐湿蚀刻层提高了后续湿蚀刻处理步骤的湿法蚀刻预算。

2. 发明授权

US08679941B2 Method to improve wet etch budget in FEOL integration 失效
标题翻译：在FEOL集成中改善湿法蚀刻预算的方法
公开(公告)号：US08679941B2
公开(公告)日：2014-03-25
申请号：US13422138
申请日：2012-03-16
申请人： Jason E Cummings , Lisa F Edge , Balasubramanian S. Haran , David V Horak , Hemanth Jagannathan , Sanjay Mehta
发明人： Jason E Cummings , Lisa F Edge , Balasubramanian S. Haran , David V Horak , Hemanth Jagannathan , Sanjay Mehta
IPC分类号： H01L21/76
CPC分类号： H01L21/76229
摘要： A method of forming a semiconductor device is provided where in one embodiment an STI fill is recessed below the pad nitride and pad oxide layers, to a level substantially coplanar with the top surface of the substrate. A thin (having a thickness in the range of about 10 Å-100 Å) wet etch resistant layer is formed in contact with and completely covering at least the top surface of the recessed STI fill material. The thin wet etch resistant layer is more resistant to a wet etch process than at least the pad oxide layer. The thin wet etch resistant layer may be a refractory dielectric material, or a dielectric such as HfOx, AlyOx, ZrOx, HfZrOx, and HfSiOx. The inventive wet etch resistant layer improves the wet etch budget of subsequent wet etch processing steps.
摘要翻译：提供一种形成半导体器件的方法，其中在一个实施例中，STI填充物在衬垫氮化物和衬垫氧化物层下方凹入到与衬底的顶表面基本上共面的水平。至少形成凹入的STI填充材料的上表面，形成薄（具有在约10埃-120埃范围内的厚度）耐湿蚀刻层。薄的耐湿蚀刻层比至少衬垫氧化物层更耐湿蚀刻工艺。薄的耐湿蚀刻层可以是耐火电介质材料，或诸如HfO x，Al y O x，ZrO x，HfZrO x和HfSiO x的电介质。本发明的耐湿蚀刻层提高了后续湿蚀刻处理步骤的湿法蚀刻预算。

3. 发明授权

US07790628B2 Method of forming high dielectric constant films using a plurality of oxidation sources 有权
标题翻译：使用多个氧化源形成高介电常数膜的方法
公开(公告)号：US07790628B2
公开(公告)日：2010-09-07
申请号：US11839699
申请日：2007-08-16
申请人： Robert D Clark , Lisa F Edge
发明人： Robert D Clark , Lisa F Edge
IPC分类号： H01L21/31 , H01L21/469
CPC分类号： H01L21/3141 , C23C16/40 , C23C16/45527 , H01L21/31604
摘要： A method is provided for depositing a high dielectric constant (high-k) film for integrated circuits (ICs) by atomic layer deposition (ALD) or chemical vapor deposition (CVD). The method includes exposing a substrate to one or more metal precursors and plurality of oxidation sources to deposit a high-k film with a desired thickness and tailored properties. The plurality of oxidation sources contain a first oxidation source containing H2O, H2O2, or a combination thereof, and a second oxidation source containing oxygen radicals (O), O3, or O2, or a combination of two or more thereof. The high-k film may contain one or more metal elements selected from alkaline earth elements, rare earth elements, and Group IVB elements of the Periodic Table of the Elements.
摘要翻译：提供了通过原子层沉积（ALD）或化学气相沉积（CVD）沉积用于集成电路（IC）的高介电常数（高k）膜的方法。该方法包括将基底暴露于一种或多种金属前体和多个氧化源以沉积具有所需厚度和定制性质的高k膜。多个氧化源含有含有H 2 O 2，H 2 O 2或其组合的第一氧化源，以及含有氧自由基（O），O 3或O 2的二氧化物或其两种或多种的组合。高k膜可以含有选自元素周期表的碱土金属元素，稀土元素和IVB族元素中的一种或多种金属元素。

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