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1. 发明授权

US07454578B2 Data processing system and method for predictively selecting a scope of broadcast of an operation utilizing a location of a memory 有权
标题翻译：数据处理系统和方法，用于使用存储器的位置预测性地选择操作的广播范围
公开(公告)号：US07454578B2
公开(公告)日：2008-11-18
申请号：US11055697
申请日：2005-02-10
申请人： James S. Fields, Jr. , Benjiman L. Goodman , Guy L. Guthrie , William J. Starke , Jeffrey A. Stuecheli , Phillip G. Williams
发明人： James S. Fields, Jr. , Benjiman L. Goodman , Guy L. Guthrie , William J. Starke , Jeffrey A. Stuecheli , Phillip G. Williams
IPC分类号： G06F13/00
CPC分类号： G06F12/0831 , G06F12/0813
摘要： A cache coherent data processing system includes a memory and at least first and second coherency domains that each include a respective one of first and second cache memories. A master in the first coherency domain selects a scope of an initial broadcast of an operation targeting a request address allocated to the memory from among a first scope including only the first coherency domain and a second scope including both the first and second coherency domains. The master selects the scope based, at least in part, upon whether the memory belongs to the first coherency domain and performs an initial broadcast of the operation within the cache coherent data processing system utilizing the selected scope.
摘要翻译：高速缓存一致数据处理系统包括存储器和至少第一和第二一致性域，每个域包括第一和第二高速缓存存储器中的相应一个。第一相干域中的主机从仅包括第一相关域的第一范围和包括第一和第二相干域的第二范围中选择针对分配给存储器的请求地址的操作的初始广播的范围。主设备至少部分地基于所述存储器是否属于第一相关域并且使用所选择的范围来执行在高速缓存相干数据处理系统内的操作的初始广播来选择所述范围。

2. 发明授权

US07734876B2 Protecting ownership transfer with non-uniform protection windows 失效
标题翻译：用不均匀的保护窗保护所有权转让
公开(公告)号：US07734876B2
公开(公告)日：2010-06-08
申请号：US11560603
申请日：2006-11-16
申请人： James S. Fields, Jr. , Benjiman L. Goodman , Guy L. Guthrie , William J. Starke , Jeffrey A. Stuecheli
发明人： James S. Fields, Jr. , Benjiman L. Goodman , Guy L. Guthrie , William J. Starke , Jeffrey A. Stuecheli
IPC分类号： G06F13/00
CPC分类号： G06F12/0833
摘要： In a data processing system, a plurality of agents communicate operations therebetween. Each operation includes a request and a combined response representing a system-wide response to the request. Within data storage in the data processing system, a data structure indicates a duration of a protection window extension for each of the plurality of agents. Each protection window extension is a period following receipt of a combined response during which an associated one of the plurality of agents protects transfer of coherency ownership of a data granule between agents. Each of the plurality of agents is configured with a duration of a protection window extension by reference to the data structure, and at least two of the agents have protection window extensions of differing durations. The plurality of agents thereafter employ the configured protection window extensions.
摘要翻译：在数据处理系统中，多个代理之间进行通信。每个操作包括一个请求和组合的响应，代表对该请求的全系统响应。在数据处理系统中的数据存储中，数据结构指示多个代理中的每一个的保护窗口扩展的持续时间。每个保护窗口扩展是接收到组合响应之后的周期，在该周期期间，所述多个代理中的相关联的一个代理保护代理之间的数据粒子的一致性所有权的传送。通过参考数据结构，多个代理中的每一个配置有保护窗口扩展的持续时间，并且至少两个代理具有不同持续时间的保护窗口扩展。此后，多个代理程序采用配置的保护窗口扩展。

3. 发明授权

US08161245B2 Method and apparatus for performing data prefetch in a multiprocessor system 失效
标题翻译：在多处理器系统中执行数据预取的方法和装置
公开(公告)号：US08161245B2
公开(公告)日：2012-04-17
申请号：US11054173
申请日：2005-02-09
申请人： James S. Fields, Jr. , Benjiman L. Goodman , Guy L. Guthrie , Jeffrey A. Stuecheli
发明人： James S. Fields, Jr. , Benjiman L. Goodman , Guy L. Guthrie , Jeffrey A. Stuecheli
IPC分类号： G06F13/00 , G06F13/28 , G06F15/00
CPC分类号： G06F12/0862 , G06F12/0811 , G06F12/0831 , G06F12/0851
摘要： A method and apparatus for performing data prefetch in a multiprocessor system are disclosed. The multiprocessor system includes multiple processors, each having a cache memory. The cache memory is subdivided into multiple slices. A group of prefetch requests is initially issued by a requesting processor in the multiprocessor system. Each prefetch request is intended for one of the respective slices of the cache memory of the requesting processor. In response to the prefetch requests being missed in the cache memory of the requesting processor, the prefetch requests are merged into one combined prefetch request. The combined prefetch request is then sent to the cache memories of all the non-requesting processors within the multiprocessor system. In response to a combined clean response from the cache memories of all the non-requesting processors, data are then obtained for the combined prefetch request from a system memory.
摘要翻译：公开了一种用于在多处理器系统中执行数据预取的方法和装置。多处理器系统包括多个处理器，每个具有高速缓冲存储器。缓存存储器被细分成多个片段。一组预取请求最初由多处理器系统中的请求处理器发出。每个预取请求用于请求处理器的高速缓冲存储器的相应片段之一。响应于在请求处理器的高速缓冲存储器中错过的预取请求，预取请求被合并成一个组合预取请求。然后将组合的预取请求发送到多处理器系统内的所有不请求处理器的高速缓冲存储器。响应于来自所有非请求处理器的高速缓冲存储器的组合清洁响应，然后从系统存储器获得用于组合预取请求的数据。

4. 发明授权

US07340568B2 Reducing number of rejected snoop requests by extending time to respond to snoop request 失效
标题翻译：通过延长响应窥探请求的时间来减少被拒绝的窥探请求数
公开(公告)号：US07340568B2
公开(公告)日：2008-03-04
申请号：US11056740
申请日：2005-02-11
申请人： Benjiman L. Goodman , Guy L. Guthrie , William J. Starke , Jeffrey A. Stuecheli , Derek E. Williams
发明人： Benjiman L. Goodman , Guy L. Guthrie , William J. Starke , Jeffrey A. Stuecheli , Derek E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/0831
摘要： A cache, system and method for reducing the number of rejected snoop requests. A “stall/reorder unit” in a cache receives a snoop request from an interconnect. Information, such as the address, of the snoop request is stored in a queue of the stall/reorder unit. The stall/reorder unit forwards the snoop request to a selector which also receives a request from a processor. An arbitration mechanism selects either the snoop request or the request from the processor. If the snoop request is denied by the arbitration mechanism, information, e.g., address, about the snoop request may be maintained in the stall/reorder unit. The request may be later resent to the selector. This process may be repeated up to “n” clock cycles. By providing the snoop request additional opportunities (n clock cycles) to be accepted by the arbitration mechanism, fewer snoop requests may ultimately be denied.
摘要翻译：用于减少拒绝的窥探请求数量的缓存，系统和方法。缓存中的“停止/重新排序单元”从互连中接收窥探请求。窥探请求的诸如地址的信息被存储在失速/重新排序单元的队列中。停止/重新排序单元将窥探请求转发到也从处理器接收请求的选择器。仲裁机制选择来自处理器的窥探请求或请求。如果侦听请求被仲裁机制拒绝，关于窥探请求的信息（例如地址）可以被保留在停止/重新排序单元中。请求可能会稍后重新发送到选择器。该过程可以重复直到“n”个时钟周期。通过提供窥探请求仲裁机制接受的额外机会（n个时钟周期），最终可能会拒绝更少的侦听请求。

5. 发明授权

US08103791B2 Synchronized communication in a data processing system 失效
标题翻译：数据处理系统中的同步通信
公开(公告)号：US08103791B2
公开(公告)日：2012-01-24
申请号：US12195130
申请日：2008-08-20
申请人： Benjiman L. Goodman , Guy L. Guthrie , Praveen S. Reddy , William J. Starke , Jeffrey A. Stuecheli
发明人： Benjiman L. Goodman , Guy L. Guthrie , Praveen S. Reddy , William J. Starke , Jeffrey A. Stuecheli
IPC分类号： G06F15/173 , G06F12/00 , G06F13/14 , G06F1/04 , G06F1/12
CPC分类号： G06F15/16
摘要： A data processing system includes a plurality of processing units, including at least a local master and a local hub, which are coupled for communication via a communication link. The local master includes a master capable of initiating an operation, a snooper capable of receiving an operation, and interconnect logic coupled to a communication link coupling the local master to the local hub. The interconnect logic includes request logic that synchronizes internal transmission of a request of the master to the snooper with transmission, via the communication link, of the request to the local hub.
摘要翻译：数据处理系统包括多个处理单元，至少包括本地主站和本地集线器，其经由通信链路进行通信。本地主机包括能够启动操作的主机，能够接收操作的监听器，以及耦合到将本地主机耦合到本地集线器的通信链路的逻辑互连。互连逻辑包括请求逻辑，其将主机的请求的内部传输与通过通信链路传送到本地集线器的请求同步到窥探者的请求逻辑。

6. 发明授权

US07818511B2 Reducing number of rejected snoop requests by extending time to respond to snoop request 失效
标题翻译：通过延长响应窥探请求的时间来减少被拒绝的窥探请求数
公开(公告)号：US07818511B2
公开(公告)日：2010-10-19
申请号：US11847941
申请日：2007-08-30
申请人： Benjiman L. Goodman , Guy L. Guthrie , William J. Starke , Jeffrey A. Stuecheli , Derek E. Williams
发明人： Benjiman L. Goodman , Guy L. Guthrie , William J. Starke , Jeffrey A. Stuecheli , Derek E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/0831
摘要： A cache, system and method for reducing the number of rejected snoop requests. A “stall/reorder unit” in a cache receives a snoop request from an interconnect. Information, such as the address, of the snoop request is stored in a queue of the stall/reorder unit. The stall/reorder unit forwards the snoop request to a selector which also receives a request from a processor. An arbitration mechanism selects either the snoop request or the request from the processor. If the snoop request is denied by the arbitration mechanism, information, e.g., address, about the snoop request may be maintained in the stall/reorder unit. The request may be later resent to the selector. This process may be repeated up to “n” clock cycles. By providing the snoop request additional opportunities (n clock cycles) to be accepted by the arbitration mechanism, fewer snoop requests may ultimately be denied.
摘要翻译：用于减少拒绝的窥探请求数量的缓存，系统和方法。缓存中的“停止/重新排序单元”从互连中接收窥探请求。窥探请求的诸如地址的信息被存储在失速/重新排序单元的队列中。停止/重新排序单元将窥探请求转发到也从处理器接收请求的选择器。仲裁机制选择来自处理器的窥探请求或请求。如果侦听请求被仲裁机制拒绝，关于窥探请求的信息（例如地址）可以被保留在停止/重新排序单元中。请求可能会稍后重新发送到选择器。该过程可以重复直到“n”个时钟周期。通过提供窥探请求仲裁机制接受的额外机会（n个时钟周期），最终可能会拒绝更少的侦听请求。

7. 发明授权

US07484046B2 Reducing number of rejected snoop requests by extending time to respond to snoop request 失效
标题翻译：通过延长响应窥探请求的时间来减少被拒绝的窥探请求数
公开(公告)号：US07484046B2
公开(公告)日：2009-01-27
申请号：US11950717
申请日：2007-12-05
申请人： Benjiman L. Goodman , Guy L. Guthrie , William J. Starke , Jeffrey A. Stuecheli , Derek E. Williams
发明人： Benjiman L. Goodman , Guy L. Guthrie , William J. Starke , Jeffrey A. Stuecheli , Derek E. Williams
IPC分类号： G06F12/00
CPC分类号： G06F12/0831
摘要： A cache, system and method for reducing the number of rejected snoop requests. A “stall/reorder unit” in a cache receives a snoop request from an interconnect. Information, such as the address, of the snoop request is stored in a queue of the stall/reorder unit. The stall/reorder unit forwards the snoop request to a selector which also receives a request from a processor. An arbitration mechanism selects either the snoop request or the request from the processor. If the snoop request is denied by the arbitration mechanism, information, e.g., address, about the snoop request may be maintained in the stall/reorder unit. The request may be later resent to the selector. This process may be repeated up to “n” clock cycles. By providing the snoop request additional opportunities (n clock cycles) to be accepted by the arbitration mechanism, fewer snoop requests may ultimately be denied.
摘要翻译：用于减少拒绝的窥探请求数量的缓存，系统和方法。缓存中的“停止/重新排序单元”从互连中接收窥探请求。窥探请求的诸如地址的信息被存储在失速/重新排序单元的队列中。停止/重新排序单元将窥探请求转发到也从处理器接收请求的选择器。仲裁机制选择来自处理器的窥探请求或请求。如果侦听请求被仲裁机制拒绝，关于窥探请求的信息（例如地址）可以被保留在停止/重新排序单元中。请求可能会稍后重新发送到选择器。该过程可以重复直到“n”个时钟周期。通过提供窥探请求仲裁机制接受的额外机会（n个时钟周期），最终可能会拒绝更少的侦听请求。

8. 发明申请

US20090006766A1 DATA PROCESSING SYSTEM AND METHOD FOR PREDICTIVELY SELECTING A SCOPE OF BROADCAST OF AN OPERATION UTILIZING A HISTORY-BASED PREDICTION 审中-公开
标题翻译：数据处理系统和方法，用于预测性地选择使用基于历史的预测操作的广播范围
公开(公告)号：US20090006766A1
公开(公告)日：2009-01-01
申请号：US11957996
申请日：2007-12-17
申请人： BENJIMAN L. GOODMAN , Guy L. Guthrie , William J. Starke , Jeffrey A. Stuecheli , Derek E. Williams
发明人： BENJIMAN L. GOODMAN , Guy L. Guthrie , William J. Starke , Jeffrey A. Stuecheli , Derek E. Williams
IPC分类号： G06F12/08
CPC分类号： G06F12/0833 , G06F2212/507
摘要： According to a method of data processing, a predictor is maintained that indicates a historical scope of broadcast for one or more previous operations transmitted on an interconnect of a data processing system. A scope of broadcast of a subsequent operation is predictively selected by reference to the predictor.
摘要翻译：根据数据处理的方法，保持预测器，其指示在数据处理系统的互连上发送的一个或多个先前操作的广播的历史范围。通过参考预测器预测性地选择后续操作的广播范围。

9. 发明申请

US20080307137A1 DATA PROCESSING SYSTEM, METHOD AND INTERCONNECT FABRIC FOR SYNCHRONIZED COMMUNICATION IN A DATA PROCESSING SYSTEM 失效
标题翻译：数据处理系统，数据处理系统中的同步通信的方法和互连结构
公开(公告)号：US20080307137A1
公开(公告)日：2008-12-11
申请号：US12195130
申请日：2008-08-20
申请人： Benjiman L. Goodman , Guy L. Guthrie , Praveen S. Reddy , William J. Starke , Jeffrey A. Stuecheli
发明人： Benjiman L. Goodman , Guy L. Guthrie , Praveen S. Reddy , William J. Starke , Jeffrey A. Stuecheli
IPC分类号： G06F13/40
CPC分类号： G06F15/16
摘要： A data processing system includes a plurality of processing units, including at least a local master and a local hub, which are coupled for communication via a communication link. The local master includes a master capable of initiating an operation, a snooper capable of receiving an operation, and interconnect logic coupled to a communication link coupling the local master to the local hub. The interconnect logic includes request logic that synchronizes internal transmission of a request of the master to the snooper with transmission, via the communication link, of the request to the local hub.
摘要翻译：数据处理系统包括多个处理单元，至少包括本地主站和本地集线器，其经由通信链路进行通信。本地主机包括能够启动操作的主机，能够接收操作的监听器，以及耦合到将本地主机耦合到本地集线器的通信链路的逻辑互连。互连逻辑包括请求逻辑，其将主机的请求的内部传输与通过通信链路传送到本地集线器的请求同步到窥探者的请求逻辑。

10. 发明授权

US07451231B2 Data processing system, method and interconnect fabric for synchronized communication in a data processing system 失效
标题翻译：数据处理系统，方法和互连结构，用于数据处理系统中的同步通信
公开(公告)号：US07451231B2
公开(公告)日：2008-11-11
申请号：US11055299
申请日：2005-02-10
申请人： Benjiman L. Goodman , Guy L. Guthrie , Praveen S. Reddy , William J. Starke , Jeffrey A. Stuecheli
发明人： Benjiman L. Goodman , Guy L. Guthrie , Praveen S. Reddy , William J. Starke , Jeffrey A. Stuecheli
IPC分类号： G06F15/173 , G06F12/00
CPC分类号： G06F15/16
摘要： A data processing system includes a plurality of processing units, including at least a local master and a local hub, which are coupled for communication via a communication link. The local master includes a master capable of initiating an operation, a snooper capable of receiving an operation, and interconnect logic coupled to a communication link coupling the local master to the local hub. The interconnect logic includes request logic that synchronizes internal transmission of a request of the master to the snooper with transmission, via the communication link, of the request to the local hub.
摘要翻译：数据处理系统包括多个处理单元，至少包括本地主站和本地集线器，其经由通信链路进行通信。本地主机包括能够启动操作的主机，能够接收操作的监听器，以及耦合到将本地主机耦合到本地集线器的通信链路的逻辑互连。互连逻辑包括请求逻辑，其将主机的请求的内部传输与通过通信链路传送到本地集线器的请求同步到窥探者的请求逻辑。

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