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1. 发明授权

US5446906A Method and apparatus for suspending and resuming a keyboard controller 失效
标题翻译：用于暂停和恢复键盘控制器的方法和装置
公开(公告)号：US5446906A
公开(公告)日：1995-08-29
申请号：US85647
申请日：1993-06-30
申请人： James P. Kardach , Jayesh M. Joshi , Patrick M. Bland , Grant L. Clarke, Jr.
发明人： James P. Kardach , Jayesh M. Joshi , Patrick M. Bland , Grant L. Clarke, Jr.
IPC分类号： G06F21/00 , G06F1/32
CPC分类号： G06F21/83
摘要： A method and mechanism for suspending and resuming a keyboard controller. The present invention includes a method and mechanism for saving the state of an input device, such as a keyboard and/or mouse, such that the power to those devices may be removed. The keyboard controller of the present invention is capable of performing a password security function. The present invention allows the keyboard controller to be suspended and resumed without jeopardizing the password security function.
摘要翻译：一种用于暂停和恢复键盘控制器的方法和机构。本发明包括一种用于保存诸如键盘和/或鼠标的输入设备的状态的方法和机构，使得可以去除对这些设备的电力。本发明的键盘控制器能够执行口令安全功能。本发明允许键盘控制器被暂停和恢复，而不会危及密码安全功能。

2. 发明授权

US5862389A Method and apparatus for selectively invoking a particular interrupt service routine for a particular interrupt request 失效
标题翻译：用于选择性地调用特定中断请求的特定中断服务程序的方法和装置
公开(公告)号：US5862389A
公开(公告)日：1999-01-19
申请号：US778516
申请日：1997-01-03
申请人： James P. Kardach , Sung Soo Cho , Jayesh M. Joshi
发明人： James P. Kardach , Sung Soo Cho , Jayesh M. Joshi
IPC分类号： G06F9/48 , G06F13/24
CPC分类号： G06F9/4812 , G06F13/24
摘要： A circuit for selectively invoking a particular interrupt service routine to handle a particular interrupt request. The present invention includes a programmable register with one or more bits per interrupt request input. The present invention also includes interrupt selection logic which outputs a particular interrupt in response to an interrupt request input and data stored in the programmable register. The interrupt then invokes the associated interrupt service routine to handle the interrupt request. The present invention is used to choose the interrupt service routine to handle a particular interrupt request from any source within the computer system in any computer system operating mode.
摘要翻译：用于选择性地调用特定中断服务程序来处理特定中断请求的电路。本发明包括一个可编程寄存器，每个中断请求输入具有一个或多个位。本发明还包括响应于中断请求输入和存储在可编程寄存器中的数据输出特定中断的中断选择逻辑。然后中断调用相关的中断服务程序来处理中断请求。本发明用于在任何计算机系统操作模式中选择中断服务程序来处理来自计算机系统内的任何源的特定中断请求。

3. 发明授权

US5671421A Serial interrupt bus protocol 失效
标题翻译：串行中断总线协议
公开(公告)号：US5671421A
公开(公告)日：1997-09-23
申请号：US351637
申请日：1994-12-07
申请人： James Kardach , Sung Soo Cho , Nicholas B. Peterson , Thomas R. Lane , Jayesh M. Joshi , Neil Songer
发明人： James Kardach , Sung Soo Cho , Nicholas B. Peterson , Thomas R. Lane , Jayesh M. Joshi , Neil Songer
IPC分类号： G06F13/24 , G06F9/46 , G06F13/14
CPC分类号： G06F13/24
摘要： A serial interrupt bus protocol is implemented in which any number of peripherals in a computer system may signal any predetermined interrupt signals to the system's interrupt controller without requiring a dedicated pin for each possible interrupt. Each peripheral implemented on the serial interrupt bus incorporates state machine logic for cycling through possible interrupt states. The peripherals are daisy chained beginning and ending with a serial interrupt controller which follows the same state machine logic as the system peripherals. When the serial interrupt controller receives an active interrupt signal, it determines which interrupt signal to provide to the system's interrupt controller based on the interrupt state of the interrupt controller state machine logic. Peripherals on a secondary serial interrupt bus may be daisy chained with peripherals on a primary system interrupt bus through a system interrupt bridge which also includes state machine logic for following the same state diagram as the system peripherals.
摘要翻译：实现串行中断总线协议，其中计算机系统中的任何数量的外围设备可以向系统的中断控制器发出任何预定的中断信号，而不需要针对每个可能的中断的专用引脚。在串行中断总线上实现的每个外设都包含状态机逻辑，用于循环通过可能的中断状态。外设以串联中断控制器为起始和结束，该控制器遵循与系统外设相同的状态机器逻辑。当串行中断控制器接收到一个有效的中断信号时，根据中断控制器状态机逻辑的中断状态确定提供给系统中断控制器的中断信号。辅助串行中断总线上的外设可以通过系统中断桥与主系统中断总线上的外设串联链接，系统中断总线还包括状态机逻辑，用于跟随与系统外设相同的状态图。

4. 发明授权

US6055372A Serial interrupt bus protocol 失效
标题翻译：串行中断总线协议
公开(公告)号：US6055372A
公开(公告)日：2000-04-25
申请号：US845634
申请日：1997-05-01
申请人： James Kardach , Sung Soo Cho , Nicholas B. Peterson , Thomas R Lane , Jayesh M. Joshi , Neil Songer
发明人： James Kardach , Sung Soo Cho , Nicholas B. Peterson , Thomas R Lane , Jayesh M. Joshi , Neil Songer
IPC分类号： G06F13/24 , G06F9/46
CPC分类号： G06F13/24
摘要： A serial interrupt bus protocol is implemented in which any number of peripherals in a computer system may signal any predetermined interrupt signals to the system's interrupt controller without requiring a dedicated pin for each possible interrupt. Each peripheral implemented on the serial interrupt bus incorporates state machine logic for cycling through possible interrupt states. The peripherals are daisy chained beginning and ending with a serial interrupt controller which follows the same state machine logic as the system peripherals. When the serial interrupt controller receives an active interrupt signal, it determines which interrupt signal to provide to the system's interrupt controller based on the interrupt state of the interrupt controller state machine logic. Peripherals on a secondary serial interrupt bus may be daisy chained with peripherals on a primary system interrupt bus through a system interrupt bridge which also includes state machine logic for following the same state diagram as the system peripherals.
摘要翻译：实现串行中断总线协议，其中计算机系统中的任何数量的外围设备可以向系统的中断控制器发出任何预定的中断信号，而不需要针对每个可能的中断的专用引脚。在串行中断总线上实现的每个外设都包含状态机逻辑，用于循环通过可能的中断状态。外设以串联中断控制器为起始和结束，该控制器遵循与系统外设相同的状态机器逻辑。当串行中断控制器接收到一个有效的中断信号时，根据中断控制器状态机逻辑的中断状态确定提供给系统中断控制器的中断信号。辅助串行中断总线上的外设可以通过系统中断桥与主系统中断总线上的外设串联链接，系统中断总线还包括状态机逻辑，用于跟随与系统外设相同的状态图。

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