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1. 发明授权

US08855499B2 Power recapture in an optical communications system 有权
标题翻译：光通信系统中的电源重新捕获
公开(公告)号：US08855499B2
公开(公告)日：2014-10-07
申请号：US13522520
申请日：2011-01-21
申请人： Vladimir Sokolov , James N. Kruchowski , Mark A. Nelson , Nathan E. Harff
发明人： Vladimir Sokolov , James N. Kruchowski , Mark A. Nelson , Nathan E. Harff
IPC分类号： H04B10/80 , H04J14/02
CPC分类号： H04J14/02 , H04B10/807
摘要： In an n-node optical communications system, energy harvesting photodetectors at each node receive extraneous electromagnetic wavelengths that are not used for communication or other purposes by the associated node. The energy harvesting photodetectors convert the unused electromagnetic energy into reusable electrical energy. The harvested electrical energy may be used as auxiliary power at the node or elsewhere in the communication system, or stored in a battery, capacitor, or other energy storage device. The system may be used in an “all-to-all” broadcast and select communication scheme or in some other broadcast and select interconnect system that has extraneous wavelengths at node receivers.
摘要翻译：在n节点光通信系统中，每个节点处的能量采集光电检测器接收不被关联节点用于通信或其他目的的外部电磁波长。能量收集光电探测器将未使用的电磁能转化为可重复使用的电能。收集的电能可以用作在通信系统中的节点处或其他地方的辅助电力，或者存储在电池，电容器或其他储能装置中。该系统可以用于“全对所有”广播和选择通信方案，或者在某些其他广播和选择在节点接收机处具有无关波长的互连系统。

2. 发明申请

US20110274394A1 OPTICAL EDGE CONNECTOR 有权
标题翻译：光学边缘连接器
公开(公告)号：US20110274394A1
公开(公告)日：2011-11-10
申请号：US13143997
申请日：2010-01-15
申请人： James N. Kruchowski , Vladimir Sokolov , Mark A. Nelson
发明人： James N. Kruchowski , Vladimir Sokolov , Mark A. Nelson
IPC分类号： G02B6/38
CPC分类号： G02B6/3829 , G02B6/2804 , G02B6/3885
摘要： A connector assembly for optically coupling a first optical device mounted on a first substrate to a second optical device mounted on a second substrate, where the first and second substrates are orthogonally oriented to each other, is presented. The connector assembly includes two connectors. The first connector has an optical waveguide array. The optical waveguide array further includes multiple parallel optical waveguides that are continuously redirected by a mirror oriented at a 45 degree angle to the optical waveguides. Likewise, the second connector also has an optical waveguide array further include multiple parallel optical waveguides continuously redirected by a mirror oriented at a 45 degree angle to the optical waveguides. The first connector is oriented orthogonally to the second connector and the first and second connectors are optically welded together in a back-to-back configuration.
摘要翻译：一种用于将安装在第一基板上的第一光学装置光学耦合到安装在第二基板上的第二和第二基板彼此正交定向的第二基板的连接器组件。连接器组件包括两个连接器。第一连接器具有光波导阵列。光波导阵列还包括多个平行的光波导，其通过与光波导成45度角定向的反射镜连续重定向。类似地，第二连接器还具有光波导阵列，还包括通过以45度角定向的反射镜连续重定向到光波导的多个平行光波导。第一连接器定向为与第二连接器正交，并且第一和第二连接器以背对背配置光学焊接在一起。

3. 发明授权

US08540434B2 Optical edge connector 有权
标题翻译：光边连接器
公开(公告)号：US08540434B2
公开(公告)日：2013-09-24
申请号：US13143997
申请日：2010-01-15
申请人： James N. Kruchowski , Vladimir Sokolov , Mark A. Nelson
发明人： James N. Kruchowski , Vladimir Sokolov , Mark A. Nelson
IPC分类号： G02B6/38 , G02B6/26 , G02B6/10
CPC分类号： G02B6/3829 , G02B6/2804 , G02B6/3885
摘要： A connector assembly for optically coupling a first optical device mounted on a first substrate to a second optical device mounted on a second substrate, where the first and second substrates are orthogonally oriented to each other, is presented. The connector assembly includes two connectors. The first connector has an optical waveguide array. The optical waveguide array further includes multiple parallel optical waveguides that are continuously redirected by a mirror oriented at a 45 degree angle to the optical waveguides. Likewise, the second connector also has an optical waveguide array further include multiple parallel optical waveguides continuously redirected by a mirror oriented at a 45 degree angle to the optical waveguides. The first connector is oriented orthogonally to the second connector and the first and second connectors are optically welded together in a back-to-back configuration.
摘要翻译：一种用于将安装在第一基板上的第一光学装置光学耦合到安装在第二基板上的第二和第二基板彼此正交定向的第二基板的连接器组件。连接器组件包括两个连接器。第一连接器具有光波导阵列。光波导阵列还包括多个平行的光波导，其通过与光波导成45度角定向的反射镜连续重定向。类似地，第二连接器还具有光波导阵列，还包括通过以45度角定向的反射镜连续重定向到光波导的多个平行光波导。第一连接器定向为与第二连接器正交，并且第一和第二连接器以背对背配置光学焊接在一起。

4. 发明申请

US20130202292A1 POWER RECAPTURE IN AN OPTICAL COMMUNICATIONS SYSTEM 有权
标题翻译：光通信系统中的电源接收
公开(公告)号：US20130202292A1
公开(公告)日：2013-08-08
申请号：US13522520
申请日：2011-01-21
申请人： Vladimir Sokolov , James N. Kruchowski , Mark A. Nelson , Nathan E. Harff
发明人： Vladimir Sokolov , James N. Kruchowski , Mark A. Nelson , Nathan E. Harff
IPC分类号： H04J14/02
CPC分类号： H04J14/02 , H04B10/807
摘要： In an n-node optical communications system, energy harvesting photodetectors at each node receive extraneous electromagnetic wavelengths that are not used for communication or other purposes by the associated node. The energy harvesting photodetectors convert the unused electromagnetic energy into reusable electrical energy. The harvested electrical energy may be used as auxiliary power at the node or elsewhere in the communication system, or stored in a battery, capacitor, or other energy storage device. The system may be used in an “all-to-all” broadcast and select communication scheme or in some other broadcast and select interconnect system that has extraneous wavelengths at node receivers.
摘要翻译：在n节点光通信系统中，每个节点处的能量采集光电检测器接收不被关联节点用于通信或其他目的的外部电磁波长。能量收集光电探测器将未使用的电磁能转化为可重复使用的电能。收集的电能可以用作在通信系统中的节点处或其他地方的辅助电力，或者存储在电池，电容器或其他储能装置中。该系统可以用于“全对所有”广播和选择通信方案，或者在某些其他广播和选择在节点接收机处具有无关波长的互连系统。

5. 发明授权

US5127986A High power, high density interconnect method and apparatus for integrated circuits 失效
标题翻译：高功率，高密度互连方法和集成电路设备
公开(公告)号：US5127986A
公开(公告)日：1992-07-07
申请号：US444747
申请日：1989-12-01
申请人： Melvin C. August , Lloyd T. Shepherd , James N. Kruchowski
发明人： Melvin C. August , Lloyd T. Shepherd , James N. Kruchowski
IPC分类号： H01L21/48 , H01L23/498 , H01L23/50 , H01L23/538 , H05K1/02 , H05K1/16 , H05K3/38 , H05K3/42 , H05K3/46
CPC分类号： H05K1/0265 , H01L21/4857 , H01L23/49866 , H01L23/50 , H01L23/5383 , H05K3/421 , H05K3/422 , H01L2924/0002 , H01L2924/3011 , H05K1/162 , H05K1/167 , H05K2201/0317 , H05K2201/0376 , H05K2201/09309 , H05K2203/0315 , H05K2203/0361 , H05K2203/072 , H05K2203/0733 , H05K3/388 , H05K3/4661 , H05K3/467 , Y10S428/901 , Y10T428/24917
摘要： The present invention provides an improved method for manufacturing circuit boards with high power, high density interconnects. Printed circuit board technology, integrated circuit technology, and heavy-build electroless plating are combined to produce multilayer circuit boards comprised of substrates with different interconnect densities. In the higher density substrates, thick metallized layers are built-up by combining additive and subtractive technique. These thicker foils minimize DC voltage drop so that conductors can run for longer distances. The conductors are substantially more square than their thin film equivalents, thus providing better performance for high frequency signals. Power distribution capabilities are enhanced by the present invention, so that circuit boards fully populated with dense, high-speed, high-power integrated circuits can easily be supplied with their necessary power requirements.
摘要翻译：本发明提供一种用于制造具有高功率，高密度互连的电路板的改进方法。将印刷电路板技术，集成电路技术和重构无电镀技术相结合，生产出具有不同互连密度的基板组成的多层电路板。在较高密度的衬底中，通过组合添加剂和减色技术来构建厚的金属化层。这些较厚的箔片最小化直流电压降，以便导体可以运行更长的距离。导体比它们的薄膜当量大得多的平方，从而为高频信号提供更好的性能。通过本发明增强了配电能力，使得充分填充密集的高速大功率集成电路的电路板可以容易地提供其所需的功率要求。

6. 发明授权

US5122620A Chip carrier with terminating resistive elements 失效
标题翻译：具有端接电阻元件的芯片载体
公开(公告)号：US5122620A
公开(公告)日：1992-06-16
申请号：US722364
申请日：1991-06-25
申请人： Eugene F. Neumann , Melvin C. August , James N. Kruchowski , Stephen Nelson , Richard R. Steitz
发明人： Eugene F. Neumann , Melvin C. August , James N. Kruchowski , Stephen Nelson , Richard R. Steitz
IPC分类号： H01L23/498 , H01L23/538 , H01L23/64
CPC分类号： H01L23/647 , H01L23/49838 , H01L23/5382 , H01L24/50 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15787 , H01L2924/16152 , H01L2924/3011
摘要： A generic chip carrier is described which includes, as integral parts, a voltage bus and a plurality of terminating resistors connected between the voltage bus and signal traces on the carrier. The voltage bus wraps around the chip carrier, thus providing a large area of metal. Through the selective use of the terminating resistors, the generic carrier can be customized for a particular type of integrated circuit, i.e., source or destination termination of signals. A signal trace may be customized by "operating" the terminating resistor with a current spike applied by a standard electrical probe. Spare bonding pads and terminating resistors are placed at intervals about the periphery of the carrier as insurance against defective or mistakenly removed terminating resistors.
摘要翻译：描述了通用芯片载体，其包括连接在载波上的电压总线和信号迹线之间的电压总线和多个终端电阻的组成部分。电压总线缠绕在芯片载体上，从而提供大面积的金属。通过选择性地使用终端电阻器，可以为特定类型的集成电路定制通用载波，即信号的源或目的地终止。可以通过由标准电探针施加的电流尖峰“终止”终端电阻来定制信号迹线。备用接合焊盘和终端电阻器以围绕载体周边的间隔放置，作为对有缺陷或错误去除的终端电阻器的保险。

7. 发明授权

US5162743A Method and apparatus for optimizing the electrical length of a signal flow path 失效
标题翻译：用于优化信号流路径长度的方法和装置
公开(公告)号：US5162743A
公开(公告)日：1992-11-10
申请号：US611899
申请日：1990-11-09
申请人： James N. Kruchowski , Melvin C. August , John B. Eder
发明人： James N. Kruchowski , Melvin C. August , John B. Eder
IPC分类号： G01R31/11
CPC分类号： G01R31/11
摘要： Apparatus and method for determining the electrical length of a signal flow path, such as a twisted-pair conductor, to create conductors of the same electrical length are disclosed. The term electrical length refers to a certain physical distance for a length of conductor for which an electrical signal travels, or propagates along the conductor, in a specified amount of time. The apparatus preferably includes a Time Domain Reflectometer 25 (including pulse generator means 30 and electrical response display means 20) which is cooperatively connected to a first end of a conductor pair 51 under test. The conductor pair 51 is inserted through a ground plane 60 or other impedance changing device. Means to mark or cut 62 the conductor 51 are located within the ground plane 60 or as close as possible to the point at which the impedance is changed. Processing means 40 are utilized to adjust the conductor 51 length relative to the ground plane 60. In operation, the pulse generator means 30 sends a pulse along the conductor 51. The ground plane 60 reflects a portion of the pulse back to the electrical response display means 20 with the signal propagation delay per unit mechanical length being calculated thereby.
摘要翻译：公开了用于确定诸如双绞线导体的信号流路的电长度以形成具有相同电长度的导体的装置和方法。术语“电气长度”指的是电子信号在指定时间内行进或沿着导体传播的导体长度的一定物理距离。该装置优选地包括时域反射计25（包括脉冲发生器装置30和电响应显示装置20），其被协调地连接到被测导体对51的第一端。导体对51插入通过接地平面60或其他阻抗改变装置。用于标记或切割62导体51的手段位于接地平面60内，或者尽可能靠近阻抗变化的点。处理装置40用于相对于接地平面60调节导体51的长度。在操作中，脉冲发生器装置30沿着导体51发送脉冲。接地平面60将一部分脉冲反射回电响应显示由此计算每单位机械长度的信号传播延迟的装置20。

8. 发明授权

US5185502A High power, high density interconnect apparatus for integrated circuits 失效
标题翻译：用于集成电路的大功率，高密度互连装置
公开(公告)号：US5185502A
公开(公告)日：1993-02-09
申请号：US598103
申请日：1990-10-16
申请人： Lloyd T. Shepherd , Melvin C. August , James N. Kruchowski
发明人： Lloyd T. Shepherd , Melvin C. August , James N. Kruchowski
IPC分类号： H01L21/48 , H01L23/498 , H01L23/50 , H01L23/538 , H05K1/02 , H05K1/16 , H05K3/38 , H05K3/42 , H05K3/46
CPC分类号： H05K1/0265 , H01L21/4857 , H01L23/49866 , H01L23/50 , H01L23/5383 , H05K3/421 , H05K3/422 , H01L2924/0002 , H01L2924/3011 , H05K1/162 , H05K1/167 , H05K2201/0317 , H05K2201/0376 , H05K2201/09309 , H05K2203/0315 , H05K2203/0361 , H05K2203/072 , H05K2203/0733 , H05K3/388 , H05K3/4661 , H05K3/467
摘要： The present invention provides an improved method for manufacturing circuit boards with high power, high density interconnects. Printed circuit board technology, integrated circuit technology, and heavy-build electroless plating are combined to produce multilayer circuit boards comprised of substrates with different interconnect densities. In the higher density substrates, thick metallized layers are built-up by combining additive and subtractive techniques. These thicker foils minimize DC voltage drop so that conductors can run for longer distances. The conductors are substantially more square than their thin film equivalents, thus providing better performance for high frequency signals. Power distribution capabilities are enhanced by the present invention, so that circuit boards fully populated with dense, high-speed, high-power integrated circuits can easily be supplied with their necessary power requirements.
摘要翻译：本发明提供了一种用于制造具有高功率，高密度互连的电路板的改进方法。将印刷电路板技术，集成电路技术和重构无电镀技术相结合，生产出具有不同互连密度的基板组成的多层电路板。在较高密度的衬底中，通过组合加和减法技术来构建厚的金属化层。这些较厚的箔片最小化直流电压降，以便导体可以运行更长的距离。导体比它们的薄膜当量大得多的平方，从而为高频信号提供更好的性能。通过本发明增强了配电能力，使得充分填充密集的高速大功率集成电路的电路板可以容易地提供其所需的功率要求。

9. 发明授权

US4949453A Method of making a chip carrier with terminating resistive elements 失效
标题翻译：制造具有端接电阻元件的芯片载体的方法
公开(公告)号：US4949453A
公开(公告)日：1990-08-21
申请号：US366604
申请日：1989-06-15
申请人： Eugene F. Neumann , Melvin C. August , James N. Kruchowski , Stephen Nelson , Richard R. Steitz
发明人： Eugene F. Neumann , Melvin C. August , James N. Kruchowski , Stephen Nelson , Richard R. Steitz
IPC分类号： H01L23/498 , H01L23/538 , H01L23/64
CPC分类号： H01L23/5382 , H01L23/49838 , H01L23/647 , H01L24/50 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15787 , H01L2924/16152 , H01L2924/3011 , Y10T29/49099 , Y10T29/49155 , Y10T29/49156
摘要： A generic chip carrier is described which includes, as integral parts, a voltage bus and a plurality of terminating resistors connected between the voltage bus and signal traces on the carrier. The voltage bus wraps around the chip carrier, thus providing a large area of metal. Through the selective use of the terminating resistors, the generic carrier can be customized for a particular type of integrated circuit, i.e., source or destination termination of signals. A signal trace may be customized by "opening" the terminating resistor with a current spike applied by a standard electrical probe. Spare bonding pads and terminating resistors are placed at intervals about the periphery of the carrier as insurance against defective or mistakenly removed terminating resistors.
摘要翻译：描述了通用芯片载体，其包括连接在载波上的电压总线和信号迹线之间的电压总线和多个终端电阻的组成部分。电压总线缠绕在芯片载体上，从而提供大面积的金属。通过选择性地使用终端电阻器，可以为特定类型的集成电路定制通用载波，即信号的源或目的地终止。可以通过用标准电探针施加的电流尖峰“终止”端接电阻来定制信号迹线。备用接合焊盘和终端电阻器以围绕载体周边的间隔放置，作为对有缺陷或错误去除的终端电阻器的保险。

10. 发明授权

US5258576A Integrated circuit chip carrier lid 失效
标题翻译：集成电路芯片载体盖
公开(公告)号：US5258576A
公开(公告)日：1993-11-02
申请号：US816967
申请日：1992-01-03
申请人： Eugene F. Neumann , Melvin C. August , James N. Kruchowski , Stephen Nelson , Richard R. Steitz
发明人： Eugene F. Neumann , Melvin C. August , James N. Kruchowski , Stephen Nelson , Richard R. Steitz
IPC分类号： H01L23/498 , H01L23/538 , H01L23/64 , H01L23/02
CPC分类号： H01L23/647 , H01L23/49838 , H01L23/5382 , H01L24/50 , H01L2224/32225 , H01L2924/12042 , H01L2924/14 , H01L2924/15153 , H01L2924/1517 , H01L2924/15787 , H01L2924/16152 , H01L2924/3011
摘要： A generic chip carrier is described which includes, as integral parts, a voltage bus and a plurality of terminating resistors connected between the voltage bus and signal traces on the carrier. The voltage bus wraps around the chip carrier, thus providing a large area of metal. Through the selective use of the terminating resistors, the generic carrier can be customized for a particular type of integrated circuit, i.e., source or destination termination of signals. A signal trace may be customized by "opening" the terminating resistor with a current spike applied by a standard electrical probe. Spare bonding pads and terminating resistors are placed at intervals about the periphery of the carrier as insurance against defective or mistakenly removed terminating resistors.
摘要翻译：描述了通用芯片载体，其包括连接在载波上的电压总线和信号迹线之间的电压总线和多个终端电阻的组成部分。电压总线缠绕在芯片载体上，从而提供大面积的金属。通过选择性地使用终端电阻器，可以为特定类型的集成电路定制通用载波，即信号的源或目的地终止。可以通过用标准电探针施加的电流尖峰“终止”端接电阻来定制信号迹线。备用接合焊盘和终端电阻器以围绕载体周边的间隔放置，作为对有缺陷或错误去除的终端电阻器的保险。

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