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    • 1. 发明授权
    • Xerographic developer unit having multiple magnetic brush rolls rotating with the photoreceptor
    • 具有与感光体一起旋转的多个磁刷辊的静电印刷显影单元
    • US07406279B2
    • 2008-07-29
    • US11262576
    • 2005-10-31
    • James M. ChappellPatrick J. HoweMichael D. Thompson
    • James M. ChappellPatrick J. HoweMichael D. Thompson
    • G03G15/09
    • G03G15/0935
    • A development subsystem is used to develop toner particles transported by semiconductive carrier particles. The development subsystem includes a developer housing for retaining a quantity of developer having semiconductive carrier particles and toner particles, a first magnetic roll having a stationary core with at least one magnet and a sleeve that rotates about the stationary core of the first magnetic roll, a second magnetic roll having a stationary core with at least one magnet and a sleeve that rotates about the stationary core of the second magnetic roll, a motor coupled to the first and the second magnetic rolls to drive the rotating sleeves of the first and the second magnetic rolls at different velocities relative to a velocity for a photoreceptor that rotates in proximity to the first and second magnetic rolls, the first and second magnetic rolls being driven in a direction that is with the direction of rotation of the photoreceptor so that the first and the second magnetic rolls carry semiconductive carrier particles and toner particles through a development zone formed by the first and the second magnetic rolls that is proximate to the photoreceptor.
    • 开发子系统用于开发通过半导体载体颗粒传输的调色剂颗粒。 开发子系统包括用于保持一定数量的具有半导体载体颗粒和调色剂颗粒的显影剂的显影剂外壳,具有至少一个磁体的固定磁芯的第一磁性辊和围绕第一磁性辊的固定磁芯旋转的套筒, 第二磁辊具有带有至少一个磁体的固定磁芯和围绕第二磁性辊的固定磁芯旋转的套筒,耦合到第一和第二磁性辊的电动机,以驱动第一和第二磁性的旋转套筒 以相对于第一和第二磁辊附近旋转的感光体的速度的不同速度滚动,第一和第二磁辊沿与感光体的旋转方向一致的方向驱动,使得第一和第二磁辊 第二磁辊通过由冷杉形成的开发区承载半导体载体颗粒和调色剂颗粒 st和靠近感光体的第二磁辊。
    • 7. 发明授权
    • Toner transport using superimposed traveling electric potential waves
    • 使用叠加行进电位波的调色剂传输
    • US6137979A
    • 2000-10-24
    • US458372
    • 1999-12-10
    • Yuri GartsteinPalghat S. RameshMichael D. Thompson
    • Yuri GartsteinPalghat S. RameshMichael D. Thompson
    • G03G15/08
    • G03G15/08G03G2215/0651
    • An apparatus for developing a latent image recorded on an imaging surface, including: a housing defining a chamber for storing a supply of developer material comprising toner; a donor member, spaced from the imaging surface, for transporting toner on the surface thereof to a region opposed from the imaging surface, the donor member includes an electrode array on the outer surface thereof, the array including a plurality of spaced apart electrodes extending substantial across width of the surface of the donor member; and a multi-phase voltage source operatively coupled to the electrode array, for generating a first electrodynamic wave pattern for moving toner particles along the surface of the electrode array to and from a development zone and generating a second electrodynamic wave to provide a fast oscillating-like toner motion along and perpendicular to the surface of the electrode array.
    • 一种用于显影记录在成像表面上的潜像的装置,包括:壳体,其限定用于存储包含调色剂的显影剂材料供应的室; 与成像表面间隔开的用于将调色剂在其表面上传送到与成像表面相对的区域的施主构件,所述施主构件在其外表面上包括电极阵列,所述阵列包括多个间隔开的电极, 横跨供体构件表面的宽度; 以及可操作地耦合到所述电极阵列的多相电压源,用于产生用于将调色剂颗粒沿着所述电极阵列的表面移动到显影区和从显影区移动并产生第二电动波以提供快速振荡 - 像调色剂运动沿垂直于电极阵列的表面。
    • 8. 发明授权
    • Integrated circuit device accepting inputs and providing outputs at the
levels of different logic families
    • 集成电路设备接受输入并在不同逻辑系列的级别提供输出
    • US4527079A
    • 1985-07-02
    • US547819
    • 1983-11-01
    • Michael D. Thompson
    • Michael D. Thompson
    • H01L27/02H03K19/018H03K19/092H03K19/01
    • H03K19/01812H01L27/0207
    • An integrated circuit device containing internal logic and/or memory circuitry is provided with means to receive multiple inputs at the voltage levels of different logic families and with means to provide multiple outputs at the voltage levels of different logic families. On-chip input translators receive the inputs at the level of a given logic family and translate to the level required by the internal logic and/or memory circuitry. After performance of logic and/or memory functions, on-chip output translators translate the output of the internal logic and/or memory circuitry and provide external outputs at the voltage levels of different logic families. The internal logic and/or memory circuitry may be of a single logic family or may be composed of several logic families. On-chip translators may also be added between internal logic and/or memory circuitry of different families.
    • 包含内部逻辑和/或存储器电路的集成电路器件被提供有用于在不同逻辑系列的电压电平处接收多个输入的装置,并且具有在不同逻辑系列的电压电平处提供多个输出的装置。 片内输入转换器在给定逻辑系列的电平上接收输入,并转换为内部逻辑和/或存储器电路所需的电平。 在执行逻辑和/或存储器功能之后,片内输出转换器可以转换内部逻辑和/或存储器电路的输出,并在不同逻辑系列的电压电平下提供外部输出。 内部逻辑和/或存储器电路可以是单个逻辑系列,或者可以由多个逻辑系列组成。 也可以在不同系列的内部逻辑和/或存储器电路之间添加片上翻译器。