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1. 发明申请

US20050177831A1 Computer architecture providing transactional, lock-free execution of lock-based programs 有权
标题翻译：提供基于锁的程序的事务，无锁执行的计算机体系结构
公开(公告)号：US20050177831A1
公开(公告)日：2005-08-11
申请号：US10775448
申请日：2004-02-10
申请人： James Goodman , Ravi Rajwar
发明人： James Goodman , Ravi Rajwar
IPC分类号： G06F9/30 , G06F9/38 , G06F9/46
CPC分类号： G06F9/3842 , G06F9/3004 , G06F9/30087 , G06F9/3834 , G06F9/3851 , G06F9/3857 , G06F9/3859 , G06F9/528
摘要： Hardware resolution of data conflicts in critical sections of programs executed in shared memory computer architectures are resolved using a hardware-based ordering system and without acquisition of the lock variable.
摘要翻译：在共享存储器计算机体系结构中执行的程序的关键部分中数据冲突的硬件解决方案使用基于硬件的订购系统进行解决，而无需获取锁定变量。

2. 发明申请

US20070186215A1 Concurrent Execution of Critical Sections by Eliding Ownership of Locks 有权
标题翻译：通过确定锁定所有权并行执行关键部分
公开(公告)号：US20070186215A1
公开(公告)日：2007-08-09
申请号：US11539731
申请日：2006-10-09
申请人： Ravi Rajwar , James Goodman
发明人： Ravi Rajwar , James Goodman
IPC分类号： G06F9/46
CPC分类号： G06F9/528 , G06F9/3004 , G06F9/30072 , G06F9/30087 , G06F9/3009 , G06F9/3834 , G06F9/3842 , G06F9/3851 , G06F9/52 , G06F12/0808 , G06F12/0844 , G06F12/0891 , G06F12/12 , G06F12/128 , G06F12/1458 , G06F12/1475 , G06F2212/1041 , G06F2212/1052 , G06F2212/283 , G06F2212/62 , G06F2212/69
摘要： One embodiment of the present invention provides a system that facilitates avoiding locks by speculatively executing critical sections of code. During operation, the system allows a process to speculatively execute a critical section of code within a program without first acquiring a lock associated with the critical section. If the process subsequently completes the critical section without encountering an interfering data access from another process, the system commits changes made during the speculative execution, and resumes normal non-speculative execution of the program past the critical section. Otherwise, if an interfering data access from another process is encountered during execution of the critical section, the system discards changes made during the speculative execution, and attempts to re-execute the critical section.
摘要翻译：本发明的一个实施例提供一种通过推测性地执行代码的关键部分来有助于避免锁定的系统。在操作期间，系统允许进程在程序中推测性地执行代码的关键部分而不首先获得与关键部分相关联的锁定。如果该过程随后完成关键部分而没有遇到来自另一进程的干扰数据访问，则系统进行在推测执行期间所做的更改，并且通过关键部分恢复程序的正常非推测性执行。否则，如果在执行关键部分期间遇到来自其他进程的干扰数据访问，则系统将丢弃在推测执行期间所做的更改，并尝试重新执行临界部分。

3. 发明申请

US20070072757A1 Case erector apparatus 有权
标题翻译：案例矫正器
公开(公告)号：US20070072757A1
公开(公告)日：2007-03-29
申请号：US11526851
申请日：2006-09-25
申请人： James Goodman
发明人： James Goodman
IPC分类号： B31B1/80
CPC分类号： B31B50/802 , B31B2100/00 , B31B2100/0024 , B31B2120/30
摘要： A case erector is provided which is easily adaptable to different sizes and shaped of R.S.C. cases and the like. The case erector includes a case erector system including a pair of vacuum heads, the range and motion of each being actuated by linear servos. A first vacuum head travels in a longitudinal direction relative to the flow of cases through the case erector. A second vacuum head travels in a direction transverse to the flow of cases through the case erector. The action of the pair of vacuum heads and the motion thereof erects or expands the cases.
摘要翻译：提供了一种易于适应不同尺寸和形状的R.S.C的壳体矫正器。案例等。壳体矫正器包括一个包括一对真空头的壳体矫正器系统，每个真空头的范围和运动由线性伺服器致动。第一真空头相对于通过壳体竖立件的壳体的流动方向在纵向方向上行进。第二个真空头沿横向于通过壳体竖立件的壳体流动的方向行进。一对真空头的作用及其运动直立或扩大了情况。

4. 发明申请

US20060253657A1 Hierarchical directories for cache coherency in a multiprocessor system 失效
标题翻译：多处理器系统中高速缓存一致性的分层目录
公开(公告)号：US20060253657A1
公开(公告)日：2006-11-09
申请号：US11482673
申请日：2006-07-06
申请人： Herbert Hum , James Goodman
发明人： Herbert Hum , James Goodman
IPC分类号： G06F13/28 , G06F12/00
CPC分类号： G06F12/0817 , G06F12/0813
摘要： Use of an import cache and/or an export directory with an agent within to respond to requests for data. The import cache stores data that has been imported through the agent. The export directory stores information related to data that has been exported through the agent. Because the import cache and the export directory only store data that has passed through the agent, not all data transferred within a system are tracked by a single import cache or export directory.
摘要翻译：使用导入缓存和/或导出目录与其中的代理来响应数据请求。导入缓存存储通过代理程序导入的数据。导出目录存储与通过代理导出的数据相关的信息。因为导入缓存和导出目录只存储已经通过代理的数据，所以并不是系统中传输的所有数据都被单个导入缓存或导出目录跟踪。

5. 发明授权

US06664803B2 Method and apparatus for selecting an encryption integrated circuit operating mode 有权
标题翻译：用于选择加密集成电路操作模式的方法和装置
公开(公告)号：US06664803B2
公开(公告)日：2003-12-16
申请号：US10176704
申请日：2002-06-20
申请人： James Goodman
发明人： James Goodman
IPC分类号： H03K1900
CPC分类号： G06F21/74 , G01R31/31704 , G01R31/31719 , G01R31/318558 , G01R31/318588
摘要： A method and circuit for preventing external access to secure data of an integrated circuit while supporting DFT is disclosed. In accordance with the method the integrated circuit is automatically placed into the test mode at integrated circuit power-up from a power-down state. At power up, secure data is other than present within a secure data-path of the integrated circuit. Access is provided to the secure data path via a second data path coupled with the first secure data-path. Via the access path, data other than secure data is provided to the integrated circuit, the data for performing test functions of the integrated circuit operating in the test mode. Once data other than secure data is provided to first secure data path, the test mode is terminated and access via other than the secure ports is disabled. The test mode is only re-entered by powering down the integrated circuit and re-initialising it.
摘要翻译：公开了一种用于在支持DFT的同时防止外部访问集成电路的安全数据的方法和电路。根据该方法，集成电路在从掉电状态的集成电路上电时自动进入测试模式。在上电时，安全数据不同于存在于集成电路的安全数据路径内。经由与第一安全数据路径耦合的第二数据路径向安全数据路径提供访问。通过访问路径，除了安全数据之外的数据被提供给集成电路，用于执行在测试模式下操作的集成电路的测试功能的数据。一旦将安全数据以外的数据提供给第一安全数据路径，则终止测试模式，并且禁用除安全端口之外的访问。测试模式只能通过关闭集成电路并重新初始化来重新输入。

6. 发明申请

US20080205634A1 METHOD, MODULE AND SYSTEM FOR PROVIDING CIPHER DATA 有权
标题翻译：方法，提供碳水化合物数据的模块和系统
公开(公告)号：US20080205634A1
公开(公告)日：2008-08-28
申请号：US11678819
申请日：2007-02-26
申请人： James Goodman
发明人： James Goodman
IPC分类号： H04L9/28
CPC分类号： H04L9/065 , H04L9/12 , H04L63/0457 , H04L63/068 , H04L2209/12 , H04L2209/605
摘要： A method of providing cipher data during a period of time when output of a primary source of cipher data is unavailable is disclosed. The method comprises switching from a primary source of cipher data to an alternate source of cipher data at a beginning of the period of time; using the cipher data from the alternate source during the period of time; and switching back to the primary source at an end of the period of time.
摘要翻译：公开了在主密码数据源的输出不可用的一段时间内提供密码数据的方法。该方法包括：在一段时间的开始时，将密码数据的主源切换成密码数据的备用源; 在一段时间内使用备用来源的密码数据; 并在一段时间结束时切换回主源。

7. 发明申请

US20050237941A1 Non-speculative distributed conflict resolution for a cache coherency protocol 有权
公开(公告)号：US20050237941A1
公开(公告)日：2005-10-27
申请号：US11165688
申请日：2005-06-24
申请人： Robert Beers , Herbert Hum , James Goodman
发明人： Robert Beers , Herbert Hum , James Goodman
IPC分类号： G06F12/08 , H04L1/00
CPC分类号： G06F12/0831 , G06F12/0813
摘要： A conflict resolution technique provides consistency such that all conflicts can be detected by at least one of the conflicting requestors if each node monitors all requests after that node has made its own request. If a line is in the Exclusive, Modified or Forward state, conflicts are resolved at the node holding the unique copy. The winner of the conflict resolution, and possibly the losers, report the conflict to the home node, which pairs conflict reports and issues forwarding instructions to assure that all requesting nodes eventually receive the requested data. If a requested cache line is either uncached or present only in the Shared state, the home node provides a copy of the cache node and resolves conflicts. In one embodiment, a blackout period after all responses until an acknowledgement message has been received allows all conflicting nodes to be aware of conflicts in which they are involved.

8. 发明授权

US08971525B2 Method, module and system for providing cipher data 有权
标题翻译：用于提供密码数据的方法，模块和系统
公开(公告)号：US08971525B2
公开(公告)日：2015-03-03
申请号：US11678819
申请日：2007-02-26
申请人： James Goodman
发明人： James Goodman
IPC分类号： H04L9/00 , G06F12/14 , H04L9/06 , H04L9/18 , H04L29/06 , H04L9/12
CPC分类号： H04L9/065 , H04L9/12 , H04L63/0457 , H04L63/068 , H04L2209/12 , H04L2209/605
摘要： A method of providing cipher data during a period of time when output of a primary source of cipher data is unavailable is disclosed. The method comprises switching from a primary source of cipher data to an alternate source of cipher data at a beginning of the period of time; using the cipher data from the alternate source during the period of time; and switching back to the primary source at an end of the period of time.
摘要翻译：公开了在主密码数据源的输出不可用的一段时间内提供密码数据的方法。该方法包括：在一段时间的开始时，将密码数据的主源切换成密码数据的备用源; 在一段时间内使用备用来源的密码数据; 并在一段时间结束时切换回主源。

9. 发明申请

US20070214751A1 Flaps closer apparatus 有权
公开(公告)号：US20070214751A1
公开(公告)日：2007-09-20
申请号：US11803302
申请日：2007-05-14
申请人： James Goodman
发明人： James Goodman
IPC分类号： B65B7/20
CPC分类号： B65B7/20
摘要： A flaps closing apparatus for closing full flap boxes is provided. The apparatus includes a flaps closing assembly with a first brake mechanism and closing bars with a second brake mechanism. The first brake mechanism controls the vertical motion of the flaps closing assembly with respect to the flaps closing apparatus. The second brake mechanism holds the closing bars in an angled configuration and at a first predetermined vertical position permits the bars to pivot to a horizontal configuration. A flap sealing assembly includes a pair of compression plates positioned outside the flaps closing assembly. A compression plate actuating mechanism draws the compression plates inwardly to urge side flaps of the full flap box into contact with sides of the full flap box at a second predetermined vertical position. A vertical movement mechanism lowers and raises the apparatus.

10. 发明申请

US20060236038A1 Hierarchical virtual model of a cache hierarchy in a multiprocessor system 有权
公开(公告)号：US20060236038A1
公开(公告)日：2006-10-19
申请号：US11447384
申请日：2006-06-05
申请人： Herbert Hum , James Goodman
发明人： Herbert Hum , James Goodman
IPC分类号： G06F12/00
CPC分类号： G06F12/0813 , G06F12/0815 , G06F2212/2542
摘要： The cache coherency protocol described herein can be used to maintain a virtual model of a system, where the virtual model does not change as the system configuration changes. In general, the virtual model is based on the assumption that each node in the system can directly communicate with some number of other nodes in the system. In one embodiment, for each cache line, the address of the cache line is used to designate a node as the “home” node and all other nodes as “peer” nodes. The protocol specifies one set of messages for communication with the line's home node and another set of messages for communication with the line's peer nodes.

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