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1. 发明授权

US4484295A Control circuit and method for varying the output of a waveform generator to gradually or rapidly vary a control signal from an initial value to a desired value 失效
标题翻译：用于改变波形发生器的输出以逐渐或快速地将控制信号从初始值改变到期望值的控制电路和方法
公开(公告)号：US4484295A
公开(公告)日：1984-11-20
申请号：US267330
申请日：1981-05-26
申请人： James F. Bedard , Charles W. Eichelberger , Salvator F. Nati, Jr.
发明人： James F. Bedard , Charles W. Eichelberger , Salvator F. Nati, Jr.
IPC分类号： G05B19/02 , H04L27/02 , H04Q9/10 , H05B37/02 , H05B41/392 , G05F1/12 , G05B24/02 , G05F1/48
CPC分类号： H05B41/3921 , H05B37/029
摘要： Methods for operating a control circuit, having a programmable signal characteristic, in a manner so as to gradually vary a D.C. analog output level from an initial value to a final value, as well as for abrupt changes therein, when an isolation-and-rectification network is used to recover a D.C. voltage of programmably controlled amplitude. The methods also provide for a pulsed output condition in a circuit for providing a periodic signal of programmably controlled amplitude. In such a circuit, the output signal amplitude may be controlled by external data signals to values less than, equal to and greater than, the substantially constant amplitude of an oscillator waveform. Both programmable (computer-controlled) and hard-wired circuitry are disclosed for controlling the output signal by the methods of this invention.
摘要翻译：一种具有可编程信号特性的控制电路的操作方法，其特征在于，当隔离和整流时，将DC模拟输出电平从初始值逐渐变化到最终值，以及其中突然变化网络用于恢复可编程控制幅度的直流电压。所述方法还提供用于提供可编程控制振幅的周期信号的电路中的脉冲输出状态。在这种电路中，输出信号幅度可以由外部数据信号控制到小于等于并且大于振荡器波形的基本上恒定幅度的值。公开了可编程（计算机控制）和硬连线电路，用于通过本发明的方法控制输出信号。

2. 发明授权

US4388566A Passive control network for remote control of load output level 失效
标题翻译：无源控制网络用于远程控制负载输出电平
公开(公告)号：US4388566A
公开(公告)日：1983-06-14
申请号：US235191
申请日：1981-02-17
申请人： James F. Bedard , Charles W. Eichelberger , De-Yu Chen
发明人： James F. Bedard , Charles W. Eichelberger , De-Yu Chen
IPC分类号： H05B41/392 , G05F1/00
CPC分类号： H05B41/3921 , Y10S315/04
摘要： A passive control network for connection between a pair of load output level setting terminals, as on a ballast for a dimmable fluorescent lamp in a lighting system, to provide a required variable impedance, where the magnitude of the impedance establishes the load output level. The passive control network includes an isolation transformer for coupling a periodic waveform at the load input terminals to the variable impedance component, the magnitude of which impedance is reflected through the transformer to provide the load level-setting impedance.
摘要翻译：用于连接一对负载输出电平设置端子的无源控制网络，如在照明系统中用于可调光荧光灯的镇流器，以提供所需的可变阻抗，其中阻抗的大小建立负载输出电平。无源控制网络包括隔离变压器，用于将负载输入端子处的周期性波形耦合到可变阻抗分量，其阻抗的大小通过变压器反射以提供负载电平设置阻抗。

3. 发明授权

US4345200A Load output level control circuit 失效
标题翻译：负载输出电平控制电路
公开(公告)号：US4345200A
公开(公告)日：1982-08-17
申请号：US242782
申请日：1981-03-11
申请人： James F. Bedard , Charles W. Eichelberger , Salvatore F. Nati, Jr.
发明人： James F. Bedard , Charles W. Eichelberger , Salvatore F. Nati, Jr.
IPC分类号： H02M5/297 , G05B24/02
CPC分类号： H02M5/297
摘要： A circuit, for controlling the output level of a load circuit connected thereto, has a single input for receiving a control signal to provide both a selectable level on/off output signal at a first output connected to an on/off terminal of the load circuit, and a pair of essentially equal control currents drawn in shunt from a pair of output terminals connected to load output-level-setting input terminals. The shunt control currents are provided by a current-mirror circuit having a pair of substantially identical current sinks, each responsive to an input signal applied thereto in parallel from the single control circuit input.
摘要翻译：用于控制与其连接的负载电路的输出电平的电路具有用于接收控制信号的单个输入，以在连接到负载电路的开/关端的第一输出端提供可选择的电平开/关输出信号以及从连接到负载输出电平设置输入端子的一对输出端子分流引出的一对基本上相等的控制电流。分流控制电流由具有一对基本上相同的电流吸收器的电流镜电路提供，每个电流检测器响应于从单个控制电路输入并行施加到其上的输入信号。

4. 发明授权

US4425628A Control module for engergy management system 失效
标题翻译：电力管理系统控制模块
公开(公告)号：US4425628A
公开(公告)日：1984-01-10
申请号：US267328
申请日：1981-05-26
申请人： James F. Bedard , Scott E. Cutler , Charles W. Eichelberger , Edward B. Miller , Salvatore F. Nati, Jr.
发明人： James F. Bedard , Scott E. Cutler , Charles W. Eichelberger , Edward B. Miller , Salvatore F. Nati, Jr.
IPC分类号： H05B37/02 , G05B15/02 , G05F20060101 , G06F17/00 , G06F19/00 , H02B1/04 , H04Q9/00 , G06F15/20
CPC分类号： H05B37/0254
摘要： A control module for controlling at least one variable-power-consuming load responsive to data input from local and/or remote locations, utilizes a controller microcomputer having an output setting the gain of a variable gain amplifier. The variable gain amplifier operates on a substantially-constant output of an oscillator to provide, on a cycle-by-cycle or long-term basis, a periodic waveform of controlled amplitude to the at least one load. The amplitude of the waveform sets the energy consumption/output of the load. Another data bus facilitates connection of local control means to a control module interface providing local control information to the controller microcomputer, while a third data bus is dedicated to communication with a remote central controller, if used. The control module includes circuitry for allowing a unique local address to be set for a particular control module, to which unique address the control module responds when a plurality of such control modules are connected in parallel to a central controller. A fourth data bus connects local sensors, such a photocells, thermistors and the like, through analog-to-digital conversion circuitry to the controller microcomputer, to facilitate control of the local loads responsive to local ambient conditions. The maximum level of the load(s) connected to a control module may be programmably established such that this maximum level can not be exceeded by local and/or remote commands, until the maximum level is altered.
摘要翻译：响应于从本地和/或远程位置输入的数据来控制至少一个可变功耗负载的控制模块利用具有设定可变增益放大器的增益的输出的控制器微计算机。可变增益放大器在振荡器的基本上恒定的输出上工作，以逐周期或长期的基础向至少一个负载提供受控幅度的周期波形。波形的幅度设定负载的能量消耗/输出。另一数据总线便于将本地控制装置连接到向控制器微计算机提供本地控制信息的控制模块接口，而第三数据总线专用于与远程中央控制器的通信（如果使用的话）。控制模块包括用于允许为特定控制模块设置唯一本地地址的电路，当多个这样的控制模块并行连接到中央控制器时，控制模块响应的唯一地址。第四数据总线通过模数转换电路将本地传感器（例如光电管，热敏电阻等）连接到控制器微计算机，以便响应于局部环境条件来控制局部负载。连接到控制模块的负载的最大电平可以可编程地建立，使得在最大电平改变之前，本地和/或远程命令不能超过该最大电平。

5. 发明授权

US4414501A Programmable signal amplitude control circuits 失效
标题翻译：可编程信号幅度控制电路
公开(公告)号：US4414501A
公开(公告)日：1983-11-08
申请号：US267274
申请日：1981-05-26
申请人： James F. Bedard , Charles W. Eichelberger , Salvatore F. Nati, Jr.
发明人： James F. Bedard , Charles W. Eichelberger , Salvatore F. Nati, Jr.
IPC分类号： G08C19/02 , H03G3/00 , G01R27/14 , G05F1/58
CPC分类号： H03G3/001 , G08C19/025
摘要： A circuit, for providing a periodic signal of programmably controllable amplitude, includes an oscillator having a substantially constant amplitude signal of desired frequency and waveform at an output thereof connected to the input of a first programmable voltage divider having its output connected to one input of an operational amplifier. The remaining operational amplifier input is connected to the output thereof via a second programmable voltage divider used as a programmably controllable feedback network. The operational amplifier output signal amplitude may be controlled by external data signals to values less than, equal to, and greater than, the substantially constant oscillator waveform amplitude. Both computer and hard-wired circuitry for controlling the output signal are disclosed. An isolation-and-rectification network may be used to recover a D.C. voltage of programmably controlled amplitude.
摘要翻译：用于提供可编程可控幅度的周期性信号的电路包括具有所需频率的基本上恒定的振幅信号的振荡器，其输出端连接到第一可编程分压器的输出，该第一可编程分压器的输出连接到运算放大器。剩余的运算放大器输入经由用作可编程可控反馈网络的第二可编程分压器连接到其输出端。运算放大器输出信号幅度可以由外部数据信号控制到小于等于并且大于基本恒定的振荡器波形振幅的值。公开了用于控制输出信号的计算机和硬连线电路。隔离和整流网络可用于恢复可编程控制振幅的直流电压。

6. 发明授权

US4376969A Control signal and isolation circuits 失效
标题翻译：控制信号和隔离电路
公开(公告)号：US4376969A
公开(公告)日：1983-03-15
申请号：US242783
申请日：1981-03-11
申请人： James F. Bedard , Scott E. Cutler , Charles W. Eichelberger , Salvatore F. Nati, Jr.
发明人： James F. Bedard , Scott E. Cutler , Charles W. Eichelberger , Salvatore F. Nati, Jr.
IPC分类号： H02M3/335 , H02P13/16
CPC分类号： H02M3/33523 , Y10S315/07 , Y10S323/902 , Y10S323/909
摘要： Circuits for providing a variable-amplitude D.C. analog control signal to a load, responsive to the time duration of a periodic, variable-pulse-width input signal, while providing isolation between the input signal circuit and the load circuit. Embodiments utilizing either a fly-back transformer or an optoelectronics isolator, are disclosed.
摘要翻译：电路，用于响应于周期性可变脉冲宽度输入信号的持续时间，向负载提供可变幅度D.C.模拟控制信号，同时在输入信号电路和负载电路之间提供隔离。公开了利用回扫变压器或光电隔离器的实施例。

7. 发明授权

US4435679A Programmable signal amplitude control circuits 失效
标题翻译：可编程信号幅度控制电路
公开(公告)号：US4435679A
公开(公告)日：1984-03-06
申请号：US479048
申请日：1983-05-12
申请人： James F. Bedard , Charles W. Eichelberger , Salvatore F. Nati, Jr.
发明人： James F. Bedard , Charles W. Eichelberger , Salvatore F. Nati, Jr.
IPC分类号： G08C19/02 , H03G3/00 , G05B24/02
CPC分类号： G08C19/025 , H03G3/001
摘要： A circuit, for providing a periodic signal of programmably controllable amplitude, includes an oscillator having a substantially constant amplitude signal of desired frequency and waveform at an output thereof connected to the input of a first programmable voltage divider having its output connected to one input of an operational amplifier. The remaining operational amplifier input is connected to the output thereof via a second programmable voltage divider used as a programmably controllable feedback network. The operational amplifier output signal amplitude may be controlled by external data signals to values less than, equal to, and greater than, the substantially constant oscillator waveform amplitude. Both computer and hard-wired circuitry for controlling the output signal are disclosed. An isolation-and-rectification network may be used to recover a D.C. voltage of programmably controlled amplitude.
摘要翻译：用于提供可编程可控幅度的周期性信号的电路包括具有所需频率的基本上恒定的振幅信号的振荡器，其输出端连接到第一可编程分压器的输出，该第一可编程分压器的输出连接到运算放大器。剩余的运算放大器输入经由用作可编程可控反馈网络的第二可编程分压器连接到其输出端。运算放大器输出信号幅度可以由外部数据信号控制到小于等于并且大于基本恒定的振荡器波形振幅的值。公开了用于控制输出信号的计算机和硬连线电路。隔离和整流网络可用于恢复可编程控制振幅的直流电压。

8. 发明授权

US08564119B2 Integrated thermal structures and fabrication methods thereof facilitating implementing a cell phone or other electronic system 有权
标题翻译：集成的热结构及其制造方法有助于实现手机或其他电子系统
公开(公告)号：US08564119B2
公开(公告)日：2013-10-22
申请号：US12611405
申请日：2009-11-03
申请人： Charles W. Eichelberger , James E. Kohl
发明人： Charles W. Eichelberger , James E. Kohl
IPC分类号： H01L23/36
CPC分类号： H05K3/30 , H01L21/568 , H01L21/6835 , H01L23/29 , H01L23/3128 , H01L23/5389 , H01L23/552 , H01L24/19 , H01L24/82 , H01L24/96 , H01L25/0652 , H01L2221/68345 , H01L2223/6677 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16 , H01L2224/16227 , H01L2224/16235 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/2518 , H01L2224/96 , H01L2225/1035 , H01L2225/1058 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01082 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3025 , H01L2924/3511 , H05K1/0206 , H05K1/0218 , H05K1/185 , H05K3/4644 , H05K2201/09563 , H05K2201/096 , H05K2201/10371 , H05K2201/10674 , H05K2203/0733 , Y10T29/49121 , Y10T29/49124 , Y10T29/4913 , Y10T29/49144 , Y10T29/49147 , Y10T29/49155 , H01L2924/00
摘要： Circuit structures and methods of fabrication are provided for facilitating implementing a complete electronic system in a compact package. The circuit structure includes, in one embodiment, a chips-first multichip base layer with conductive structures extending therethrough. An interconnect layer is disposed over the front surface of the multichip layer and includes interconnect metallization electrically connected to contact pads of the chips and to conductive structures extending through the structural material. A redistribution layer, disposed over the back surface of the multichip layer, includes a redistribution metallization also electrically connected to conductive structures extending through the structural material. Input/output contacts are arrayed over the redistribution layer, including over the lower surfaces of at least some integrated circuit chips within the multichip layer, and are electrically connected through the redistribution metallization, conductive structures, and interconnect metallization to contact pads of the integrated circuit chips of the multichip layer.
摘要翻译：提供了电路结构和制造方法，以便于以紧凑的封装实现完整的电子系统。在一个实施例中，电路结构包括具有延伸穿过其中的导电结构的芯片 - 第一多芯片基底层。互连层设置在多芯层的前表面上，并且包括电连接到芯片的接触焊盘和延伸穿过结构材料的导电结构的互连金属化。设置在多芯层的后表面上的再分配层包括还电连接到延伸穿过结构材料的导电结构的再分布金属化。输入/输出触点排列在再分配层上，包括在多芯层内的至少一些集成电路芯片的下表面上，并且通过再分布金属化，导电结构和互连金属化电连接到集成电路的接触焊盘多芯片层的芯片。

9. 发明授权

US08324020B2 Integrated conductive structures and fabrication methods thereof facilitating implementing a cell phone or other electronic system 有权
标题翻译：集成导电结构及其制造方法有助于实现手机或其他电子系统
公开(公告)号：US08324020B2
公开(公告)日：2012-12-04
申请号：US12611412
申请日：2009-11-03
申请人： Charles W. Eichelberger , James E. Kohl
发明人： Charles W. Eichelberger , James E. Kohl
IPC分类号： H01L21/00
CPC分类号： H05K3/30 , H01L21/568 , H01L21/6835 , H01L23/29 , H01L23/3128 , H01L23/5389 , H01L23/552 , H01L24/19 , H01L24/82 , H01L24/96 , H01L25/0652 , H01L2221/68345 , H01L2223/6677 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16 , H01L2224/16227 , H01L2224/16235 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/2518 , H01L2224/96 , H01L2225/1035 , H01L2225/1058 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01082 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3025 , H01L2924/3511 , H05K1/0206 , H05K1/0218 , H05K1/185 , H05K3/4644 , H05K2201/09563 , H05K2201/096 , H05K2201/10371 , H05K2201/10674 , H05K2203/0733 , Y10T29/49121 , Y10T29/49124 , Y10T29/4913 , Y10T29/49144 , Y10T29/49147 , Y10T29/49155 , H01L2924/00
摘要： Circuit structures and methods of fabrication are provided for facilitating implementing a complete electronic system in a compact package. The circuit structure includes, in one embodiment, a chips-first multichip base layer with conductive structures extending therethrough. An interconnect layer is disposed over the front surface of the multichip layer and includes interconnect metallization electrically connected to contact pads of the chips and to conductive structures extending through the structural material. A redistribution layer, disposed over the back surface of the multichip layer, includes a redistribution metallization also electrically connected to conductive structures extending through the structural material. Input/output contacts are arrayed over the redistribution layer, including over the lower surfaces of at least some integrated circuit chips within the multichip layer, and are electrically connected through the redistribution metallization, conductive structures, and interconnect metallization to contact pads of the integrated circuit chips of the multichip layer.
摘要翻译：提供了电路结构和制造方法，以便于以紧凑的封装实现完整的电子系统。在一个实施例中，电路结构包括具有延伸穿过其中的导电结构的芯片 - 第一多芯片基底层。互连层设置在多芯层的前表面上，并且包括电连接到芯片的接触焊盘和延伸穿过结构材料的导电结构的互连金属化。设置在多芯层的后表面上的再分配层包括还电连接到延伸穿过结构材料的导电结构的再分布金属化。输入/输出触点排列在再分配层上，包括在多芯层内的至少一些集成电路芯片的下表面上，并且通过再分布金属化，导电结构和互连金属化电连接到集成电路的接触焊盘多芯片层的芯片。

10. 发明授权

US07830000B2 Integrated thermal structures and fabrication methods thereof facilitating implementing a cell phone or other electronic system 有权
标题翻译：集成的热结构及其制造方法有助于实现手机或其他电子系统
公开(公告)号：US07830000B2
公开(公告)日：2010-11-09
申请号：US12144717
申请日：2008-06-24
申请人： Charles W. Eichelberger , James E. Kohl
发明人： Charles W. Eichelberger , James E. Kohl
IPC分类号： H01L23/34
CPC分类号： H05K3/30 , H01L21/568 , H01L21/6835 , H01L23/29 , H01L23/3128 , H01L23/5389 , H01L23/552 , H01L24/19 , H01L24/82 , H01L24/96 , H01L25/0652 , H01L2221/68345 , H01L2223/6677 , H01L2224/0401 , H01L2224/04105 , H01L2224/12105 , H01L2224/16 , H01L2224/16227 , H01L2224/16235 , H01L2224/20 , H01L2224/211 , H01L2224/24137 , H01L2224/2518 , H01L2224/96 , H01L2225/1035 , H01L2225/1058 , H01L2924/01006 , H01L2924/01011 , H01L2924/01013 , H01L2924/01015 , H01L2924/01018 , H01L2924/01027 , H01L2924/01029 , H01L2924/01032 , H01L2924/01033 , H01L2924/01049 , H01L2924/01074 , H01L2924/01077 , H01L2924/01078 , H01L2924/01082 , H01L2924/10253 , H01L2924/12042 , H01L2924/14 , H01L2924/15311 , H01L2924/15331 , H01L2924/181 , H01L2924/19041 , H01L2924/19042 , H01L2924/19043 , H01L2924/30105 , H01L2924/30107 , H01L2924/3025 , H01L2924/3511 , H05K1/0206 , H05K1/0218 , H05K1/185 , H05K3/4644 , H05K2201/09563 , H05K2201/096 , H05K2201/10371 , H05K2201/10674 , H05K2203/0733 , Y10T29/49121 , Y10T29/49124 , Y10T29/4913 , Y10T29/49144 , Y10T29/49147 , Y10T29/49155 , H01L2924/00
摘要： Circuit structures and methods of fabrication are provided for facilitating implementing a complete electronic system in a compact package. The circuit structure includes, in one embodiment, a chips-first multichip base layer with conductive structures extending therethrough. An interconnect layer is disposed over the front surface of the multichip layer and includes interconnect metallization electrically connected to contact pads of the chips and to conductive structures extending through the structural material. A redistribution layer, disposed over the back surface of the multichip layer, includes a redistribution metallization also electrically connected to conductive structures extending through the structural material. Input/output contacts are arrayed over the redistribution layer, including over the lower surfaces of at least some integrated circuit chips within the multichip layer, and are electrically connected through the redistribution metallization, conductive structures, and interconnect metallization to contact pads of the integrated circuit chips of the multichip layer.
摘要翻译：提供了电路结构和制造方法，以便于以紧凑的封装实现完整的电子系统。在一个实施例中，电路结构包括具有延伸穿过其中的导电结构的芯片 - 第一多芯片基底层。互连层设置在多芯层的前表面上，并且包括电连接到芯片的接触焊盘和延伸穿过结构材料的导电结构的互连金属化。设置在多芯层的后表面上的再分配层包括还电连接到延伸穿过结构材料的导电结构的再分布金属化。输入/输出触点排列在再分配层上，包括在多芯层内的至少一些集成电路芯片的下表面上，并且通过再分布金属化，导电结构和互连金属化电连接到集成电路的接触焊盘多芯片层的芯片。

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