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    • 2. 发明授权
    • Drain extended MOS transistor with increased breakdown voltage
    • 漏极扩散MOS晶体管具有增加的击穿电压
    • US07768068B1
    • 2010-08-03
    • US11758451
    • 2007-06-05
    • Kevin JangBill PhanHelmut Puchner
    • Kevin JangBill PhanHelmut Puchner
    • H01L29/735
    • H01L29/0847H01L29/0653H01L29/0692H01L29/66659H01L29/7835
    • A semiconductor topography and a method for forming a drain extended metal oxide semiconductor (DEMOS) transistor is provided. The semiconductor topography includes at least a portion of an extended drain contact region formed within a well region and a plurality of dielectrically spaced extension regions interposed between the well region and a channel region underlying a gate structure of the topography. The channel region of a first conductivity type and the well region of a second conductivity type opposite of the first conductivity type. In addition, the plurality of dielectrically spaced extension regions and the extended drain contact region are of the second conductivity type. Each of the plurality of dielectrically spaced extension regions has a lower net concentration of electrically active impurities than the well region. Moreover, the extended drain contact region has a greater net concentration of electrically active impurities than the well region.
    • 提供半导体形貌和形成漏极延伸金属氧化物半导体(DEMOS)晶体管的方法。 半导体形貌包括形成在阱区内的扩展漏极接触区域的至少一部分和介于阱区域和位于形貌的栅极结构之下的沟道区域之间的多个介电间隔的延伸区域。 第一导电类型的沟道区和与第一导电类型相反的第二导电类型的阱区。 此外,多个介电间隔的延伸区域和延伸的漏极接触区域是第二导电类型。 多个介电间隔延伸区域中的每一个具有比阱区域更低的电活性杂质的净浓度。 此外,延伸的漏极接触区域具有比阱区域更大的电活性杂质的净浓度。