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1. 发明授权

US07668015B2 Nonvolatile memory devices capable of reducing data programming time and methods of driving the same 失效
标题翻译：能够减少数据编程时间的非易失性存储器件及其驱动方法
公开(公告)号：US07668015B2
公开(公告)日：2010-02-23
申请号：US12005366
申请日：2007-12-27
申请人： Jae-phil Kong , Heung-soo Lim , Jae-yong Jeong , Chi-weon Yoon
发明人： Jae-phil Kong , Heung-soo Lim , Jae-yong Jeong , Chi-weon Yoon
IPC分类号： G11C16/04
CPC分类号： G11C11/5628
摘要： In a method of driving a nonvolatile memory device a first data state is determined from among the plurality of data states. The number of simultaneously programmed bits is set according to the determined first data state and a scanning operation is performed on data input from an external device to search data bits to be programmed. The searched data bits are programmed in response to the number of simultaneously programmed bits. The number of simultaneously programmed bits corresponding to the first data state is different from a number of simultaneously programmed bits corresponding to at least a second of the plurality of data states.
摘要翻译：在驱动非易失性存储器件的方法中，从多个数据状态中确定第一数据状态。根据确定的第一数据状态来设置同时编程的位的数量，并且对从外部设备输入的数据执行扫描操作以搜索要编程的数据位。搜索到的数据位被编程为响应于同时编程的位的数量。对应于第一数据状态的同时被编程的位的数量与对应于多个数据状态中的至少一个数据状态的同时被编程的位的数量不同。

2. 发明申请

US20100125699A1 Flash memory device and reading method thereof 失效
标题翻译：闪存装置及其读取方法
公开(公告)号：US20100125699A1
公开(公告)日：2010-05-20
申请号：US12591198
申请日：2009-11-12
申请人： Jae-phil Kong , Chi-weon Yoon
发明人： Jae-phil Kong , Chi-weon Yoon
IPC分类号： G06F12/00 , G06F12/02 , G11C11/34
CPC分类号： G11C16/26 , G11C11/5642 , G11C2211/5641
摘要： Provided are a flash memory device and a reading method of the flash memory device. A multi-level cell flash memory device includes: a memory cell array comprising main memory cells storing main data, and indicator cells storing indicate data indicating one of a first mode and a second mode in which the main data of the main memory cell, to which the indicate cells correspond, is written; and an output unit outputting in response to a control signal corresponding to the indicate data, one of main data read from the memory cell array and forced data forcing some bit values of the main data to bit values of mode specific data, as reading data.
摘要翻译：提供了闪速存储装置和闪存装置的读取方法。多级单元闪存器件包括：存储单元阵列，包括存储主数据的主存储单元，存储指示单元的指示单元表示指示主存储单元的主数据的第一模式和第二模式之一的数据，指示单元对应的; 以及输出单元，响应于与指示数据相对应的控制信号，从存储器单元阵列读取的主数据中的一个和强制数据将主数据的某些位值强制为模式特定数据的位值作为读取数据。

3. 发明授权

US08359424B2 Flash memory device and reading method thereof 失效
标题翻译：闪存装置及其读取方法
公开(公告)号：US08359424B2
公开(公告)日：2013-01-22
申请号：US12591198
申请日：2009-11-12
申请人： Jae-phil Kong , Chi-weon Yoon
发明人： Jae-phil Kong , Chi-weon Yoon
IPC分类号： G06F12/00
CPC分类号： G11C16/26 , G11C11/5642 , G11C2211/5641
摘要： Provided are a flash memory device and a reading method of the flash memory device. A multi-level cell flash memory device includes: a memory cell array comprising main memory cells storing main data, and indicator cells storing indicate data indicating one of a first mode and a second mode in which the main data of the main memory cell, to which the indicate cells correspond, is written; and an output unit outputting in response to a control signal corresponding to the indicate data, one of main data read from the memory cell array and forced data forcing some bit values of the main data to bit values of mode specific data, as reading data.
摘要翻译：提供了闪速存储装置和闪存装置的读取方法。多级单元闪存器件包括：存储单元阵列，包括存储主数据的主存储单元，存储指示单元的指示单元表示指示主存储单元的主数据的第一模式和第二模式之一的数据，指示单元对应的; 以及输出单元，响应于与指示数据相对应的控制信号，从存储器单元阵列读取的主数据中的一个和强制数据将主数据的某些位值强制为模式特定数据的位值作为读取数据。

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