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1. 发明申请

US20090189843A1 APPARATUS AND METHOD FOR DISPLAYING DRIVE STATE OF BACKLIGHT IN LIQUID CRYSTAL DISPLAY DEVICE 有权
标题翻译：用于在液晶显示装置中显示背光驱动状态的装置和方法
公开(公告)号：US20090189843A1
公开(公告)日：2009-07-30
申请号：US12277820
申请日：2008-11-25
申请人： Jae-Won Han , Jun-Hyeok Yang
发明人： Jae-Won Han , Jun-Hyeok Yang
IPC分类号： G09G3/36
CPC分类号： G09G3/3406 , G09G2330/08 , G09G2330/12
摘要： Disclosed is checking a drive state of a backlight lamp of a liquid crystal display device and notifying to an external entity whether it is normally driven in which level or is difficult to be normally driven. The apparatus for displaying a drive state of a backlight in a liquid crystal display device includes an inverter for converting an inputted DC voltage into an AC voltage of a certain level, and outputting the same to a backlight lamp; a drive voltage detecting unit for detecting a drive voltage supplied to the backlight lamp from the inverter and outputting a detected signal according to the detected drive voltage; a drive current detecting unit for detecting a tube current of the backlight lamp and outputting a detected signal according to the detected tube current; a drive voltage control/drive state signal output unit for checking a drive state of the backlight lamp based on the two detected signals, and controlling the drive voltage outputted from the inverter based on the checked result as well as outputting a drive state signal for indicating the drive state; and a lamp drive state indicating unit for indicating in which drive state the backlight lamp is driven according to the drive state signal.
摘要翻译：公开了检查液晶显示装置的背光灯的驱动状态，向外部实体通知其是正常驱动还是难以正常驱动。用于在液晶显示装置中显示背光的驱动状态的装置包括用于将输入的DC电压转换成一定电平的AC电压并将其输出到背光灯的逆变器; 驱动电压检测单元，用于从逆变器检测提供给背光灯的驱动电压，并根据检测到的驱动电压输出检测信号; 驱动电流检测单元，用于检测所述背光灯的管电流，并根据所检测的管电流输出检测信号; 驱动电压控制/驱动状态信号输出单元，用于基于两个检测信号来检查背光灯的驱动状态，并且基于检查结果控制从逆变器输出的驱动电压，以及输出用于指示的驱动状态信号驱动状态; 以及灯驱动状态指示单元，用于根据驱动状态信号指示背光灯被驱动的驱动状态。

2. 发明授权

US08552966B2 Apparatus and method for displaying drive state of backlight in liquid crystal display device 有权
标题翻译：在液晶显示装置中显示背光的驱动状态的装置和方法
公开(公告)号：US08552966B2
公开(公告)日：2013-10-08
申请号：US12277820
申请日：2008-11-25
申请人： Jae-Won Han , Jun-Hyeok Yang
发明人： Jae-Won Han , Jun-Hyeok Yang
IPC分类号： G09G3/38
CPC分类号： G09G3/3406 , G09G2330/08 , G09G2330/12
摘要： Disclosed is checking a drive state of a backlight lamp of a liquid crystal display device and notifying to an external entity whether it is normally driven in which level or is difficult to be normally driven. The apparatus for displaying a drive state of a backlight in a liquid crystal display device includes an inverter for converting an inputted DC voltage into an AC voltage of a certain level, and outputting the same to a backlight lamp; a drive voltage detecting unit for detecting a drive voltage supplied to the backlight lamp from the inverter and outputting a detected signal according to the detected drive voltage; a drive current detecting unit for detecting a tube current of the backlight lamp and outputting a detected signal according to the detected tube current; a drive voltage control/drive state signal output unit for checking a drive state of the backlight lamp based on the two detected signals, and controlling the drive voltage outputted from the inverter based on the checked result as well as outputting a drive state signal for indicating the drive state; and a lamp drive state indicating unit for indicating in which drive state the backlight lamp is driven according to the drive state signal.
摘要翻译：公开了检查液晶显示装置的背光灯的驱动状态，向外部实体通知其是正常驱动还是难以正常驱动。用于在液晶显示装置中显示背光的驱动状态的装置包括用于将输入的DC电压转换成一定电平的AC电压并将其输出到背光灯的逆变器; 驱动电压检测单元，用于从逆变器检测提供给背光灯的驱动电压，并根据检测到的驱动电压输出检测信号; 驱动电流检测单元，用于检测所述背光灯的管电流，并根据所检测的管电流输出检测信号; 驱动电压控制/驱动状态信号输出单元，用于基于两个检测信号来检查背光灯的驱动状态，并且基于检查结果控制从逆变器输出的驱动电压，以及输出用于指示的驱动状态信号驱动状态; 以及灯驱动状态指示单元，用于根据驱动状态信号指示背光灯被驱动的驱动状态。

3. 发明授权

US07618830B2 Rapid thermal processing apparatus and methods 失效
标题翻译：快速热处理设备及方法
公开(公告)号：US07618830B2
公开(公告)日：2009-11-17
申请号：US10869665
申请日：2004-06-16
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： H01L21/00
CPC分类号： H01L21/67253 , C30B31/10 , C30B33/00
摘要： Rapid thermal processing apparatus methods are disclosed. In a disclosed apparatus, rapid thermal processing is carried out when the residual oxygen detected by a residual oxygen detector does not exceed a predetermined tolerance level. Accordingly, it is possible to prevent the contact resistance of the wafers from increasing due to the presence of excessive oxygen.
摘要翻译：公开了快速热处理装置的方法。在公开的装置中，当由残留氧气检测器检测到的残余氧没有超过预定的容限水平时，进行快速热处理。因此，可以防止晶片的接触电阻由于存在过量的氧而增加。

4. 发明申请

US20080060185A1 Method of manufacturing inductor 有权
标题翻译：制造电感的方法
公开(公告)号：US20080060185A1
公开(公告)日：2008-03-13
申请号：US11896663
申请日：2007-09-05
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： H01F7/06 , H01K3/10
CPC分类号： H01F41/042 , Y10T29/4902 , Y10T29/49069 , Y10T29/49156 , Y10T29/49165
摘要： A method for manufacturing an inductor using a system-in-package (SIP) includes forming a first penetration electrode in a silicon substrate; depositing an insulating film on a first surface of the silicon substrate, and patterning the insulating film to form an inductor hole and a second penetration hole aligned with the first penetration hole; forming an inductor in the inductor hole and a second penetration electrode in the second penetration hole; and depositing a protective film on the insulating film and performing a back grind process such that the first penetration electrode is exposed from a second surface of the silicon substrate, the second surface being opposed to the first surface.
摘要翻译：一种使用封装系统（SIP）制造电感器的方法包括在硅衬底中形成第一穿透电极; 在所述硅衬底的第一表面上沉积绝缘膜，以及图案化所述绝缘膜以形成与所述第一穿透孔对准的电感器孔和第二穿透孔; 在电感器孔中形成电感器，在第二穿透孔中形成第二穿透电极; 以及在所述绝缘膜上沉积保护膜并执行后研磨处理，使得所述第一穿透电极从所述硅衬底的第二表面露出，所述第二表面与所述第一表面相对。

5. 发明申请

US20070111515A1 METAL LINE STACKING STRUCTURE IN SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOF 失效
标题翻译：半导体器件中的金属线堆叠结构及其形成方法
公开(公告)号：US20070111515A1
公开(公告)日：2007-05-17
申请号：US11557306
申请日：2006-11-07
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： H01L21/4763
CPC分类号： H01L21/76838 , H01L21/76858 , H01L21/76864 , H01L21/76886 , H01L21/76892
摘要： The method for forming a metal line stacking structure according to a preferred embodiment of the present invention comprises: sequentially forming a first barrier metal and a first metal layer on a lower dielectric layer that is disposed over a semiconductor substrate, and performing a plasma treatment; forming a second barrier metal on the plasma-treated first metal layer; selectively etching the second barrier metal, the first metal layer, and the first barrier metal to form a metal line layer including the second barrier metal, the first metal layer, and the first barrier metal, which respectively have a predetermined width; and sintering the metal line layer to raise a reaction between the first metal layer and the second barrier metal, thereby generating a metal compound layer.
摘要翻译：根据本发明的优选实施方案的形成金属线叠层结构的方法包括：在设置在半导体衬底上的下电介质层上依次形成第一阻挡金属和第一金属层，并进行等离子体处理; 在等离子体处理的第一金属层上形成第二阻挡金属; 选择性地蚀刻第二阻挡金属，第一金属层和第一阻挡金属，以形成分别具有预定宽度的包括第二阻挡金属，第一金属层和第一阻挡金属的金属线层; 并且烧结所述金属线层以引起所述第一金属层和所述第二阻挡金属之间的反应，由此产生金属化合物层。

6. 发明授权

US6132081A Method for calibrating optical sensor used to measure the temperature of a substrate during rapid thermal process 有权
标题翻译：校准用于在快速热处理过程中测量衬底温度的光学传感器的方法
公开(公告)号：US6132081A
公开(公告)日：2000-10-17
申请号：US220987
申请日：1998-12-23
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： H01L21/28 , G01J5/00 , G01J5/52 , H01L21/66 , H01L21/00 , G01J5/08 , G01K15/00
CPC分类号： G01J5/522 , G01J5/0003 , H01L22/12
摘要： The present invention provides a method of forming titanium silicide by subjecting a silicon substrate having titanium formed thereon to a thermal process, such as rapid thermal process. The silicon substrate and the titanium are being heated to at least a selected annealing temperature, which is the minimum temperature on and after which the titanium silicide displays generally constant sheet resistivity and resistance non-uniformity. The selected annealing temperature is determined by heating the silicon substrate and the titanium from an initial temperature to a final temperature to create titanium silicide and measuring the sheet resistance and/or resistance non-uniformity at selected temperature intervals between the initial temperature and the final temperature. The temperature on and after which the sheet resistance and resistance non-uniformity is generally constant is the selected annealing temperature. The temperature of the silicon substrate and titanium can be measured by an optical sensor such as an optical pyrometer. The selected annealing temperature can be used to calibrate the optical sensor for more accurate measurement of the temperature during the thermal process.
摘要翻译：本发明提供一种通过使其上形成有钛的硅衬底经受诸如快速热处理的热处理来形成硅化钛的方法。将硅衬底和钛加热到至少一个选定的退火温度，该退火温度是钛硅化物显示的最小温度，其通常具有常规的薄层电阻率和电阻不均匀性。通过将硅衬底和钛从初始温度加热到最终温度来确定所选择的退火温度，以产生钛硅化物，并测量初始温度和最终温度之间选定温度间隔的薄层电阻和/或电阻不均匀性。薄层电阻和电阻不均匀性一般恒定的温度是选定的退火温度。硅基板和钛的温度可以通过诸如光学高温计的光学传感器来测量。所选择的退火温度可用于校准光学传感器，以便在热处理期间更准确地测量温度。

7. 发明申请

US20090102053A1 METAL LINE STACKING STRUCTURE IN SEMICONDUCTOR DEVICE AND FORMATION METHOD THEREOF 审中-公开
标题翻译：半导体器件中的金属线堆叠结构及其形成方法
公开(公告)号：US20090102053A1
公开(公告)日：2009-04-23
申请号：US12341541
申请日：2008-12-22
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： H01L23/48
CPC分类号： H01L21/76888 , H01L21/76838
摘要： The method for forming a metal line stacking structure according to a preferred embodiment of the present invention comprises: sequentially forming a first barrier metal and a first metal layer on a lower dielectric layer that is disposed over a semiconductor substrate, and performing a plasma treatment; forming a second barrier metal on the plasma-treated first metal layer; selectively etching the second barrier metal, the first metal layer, and the first barrier metal to form a metal line layer including the second barrier metal, the first metal layer, and the first barrier metal, which respectively have a predetermined width; and sintering the metal line layer to raise a reaction between the first metal layer and the second barrier metal, thereby generating a metal compound layer.
摘要翻译：根据本发明的优选实施方案的形成金属线叠层结构的方法包括：在设置在半导体衬底上的下电介质层上依次形成第一阻挡金属和第一金属层，并进行等离子体处理; 在等离子体处理的第一金属层上形成第二阻挡金属; 选择性地蚀刻第二阻挡金属，第一金属层和第一阻挡金属，以形成分别具有预定宽度的包括第二阻挡金属，第一金属层和第一阻挡金属的金属线层; 并且烧结所述金属线层以引起所述第一金属层和所述第二阻挡金属之间的反应，由此产生金属化合物层。

8. 发明申请

US20080048326A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：US20080048326A1
公开(公告)日：2008-02-28
申请号：US11846263
申请日：2007-08-28
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： H01L23/48 , H01L21/44
CPC分类号： H01L23/53223 , H01L21/76838 , H01L21/7685 , H01L21/76856 , H01L23/5283 , H01L2924/0002 , H01L2924/00
摘要： According to embodiments, a semiconductor device may include a PMD layer provided with a contact, and a wiring layer formed on the PMD layer and connected to the contact by stacking and forming a plurality of metal layers thereon. In embodiments, the plurality of metal layers may include a first metal layer and a second metal layer.
摘要翻译：根据实施例，半导体器件可以包括设置有触点的PMD层和形成在PMD层上并通过在其上层叠并形成多个金属层而与触点相连接的布线层。在实施例中，多个金属层可以包括第一金属层和第二金属层。

9. 发明授权

US07256133B2 Method of manufacturing a semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：US07256133B2
公开(公告)日：2007-08-14
申请号：US11321118
申请日：2005-12-28
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： H01L21/302
CPC分类号： H01L21/76814 , H01L21/02063
摘要： For a semiconductor device having copper wiring, an exemplary method according to an embodiment of the present invention may include forming a first insulation layer on a silicon substrate having a transistor thereon; forming a contact hole by etching the first insulation layer; forming a metal plug so as to fill the contact hole; forming a second insulation layer on the metal plug; forming a trench exposing an upper surface of the metal plug by partially removing the second insulation layer; sputter-etching an interior wall and bottom surface of the trench with a plasma; and forming a copper line layer so as to fill the sputter-etched trench. According to this method, electrical contact between a metal plug and a copper line layer may be maintained or improved prevented by reducing or removing by-products on the metal plug using the sputter-etching process.
摘要翻译：对于具有铜布线的半导体器件，根据本发明的实施例的示例性方法可以包括在其上具有晶体管的硅衬底上形成第一绝缘层; 通过蚀刻第一绝缘层形成接触孔; 形成金属塞以填充接触孔; 在所述金属插塞上形成第二绝缘层; 通过部分去除所述第二绝缘层而形成暴露所述金属插塞的上表面的沟槽; 用等离子体溅射蚀刻沟槽的内壁和底表面; 并形成铜线层以填充溅射蚀刻沟槽。根据该方法，可以通过使用溅射蚀刻工艺减少或除去金属插塞上的副产物来防止或改善金属插塞与铜线层之间的电接触。

10. 发明申请

US20060141909A1 Chemical mechanical polishing apparatus 审中-公开
标题翻译：化学机械抛光装置
公开(公告)号：US20060141909A1
公开(公告)日：2006-06-29
申请号：US11282759
申请日：2005-11-17
申请人： Jae-Won Han
发明人： Jae-Won Han
IPC分类号： B24B7/30 , B24B29/00
CPC分类号： B24B21/04 , B24B37/32
摘要： A “black belt” phenomenon that may be caused by an eddy of a slurry may be prevented when a wafer is polished by a chemical mechanical polishing (CMP) apparatus that includes a polishing pad to be supplied with the slurry, a polishing head including a top ring adapted to hold a wafer, and a buffer ring forming a buffer space between an edge region of the wafer and an eddy region of the slurry that may be formed in front of the polishing head.
摘要翻译：当通过包括要供应浆料的抛光垫的化学机械抛光（CMP）装置抛光晶片时，可以防止可能由浆料涡流引起的“黑带”现象，抛光头包括顶环，其适于保持晶片;以及缓冲环，其在所述晶片的边缘区域和可形成在所述抛光头前面的所述浆料的涡流区域之间形成缓冲空间。

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