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1. 发明授权

US07893462B2 Transistor of semiconductor device and method of fabricating the same 失效
标题翻译：半导体器件的晶体管及其制造方法
公开(公告)号：US07893462B2
公开(公告)日：2011-02-22
申请号：US11280608
申请日：2005-11-15
申请人： Jae Kyoung Mun , Hung Gu Ji , Ho Kyun Ahn , Hae Cheon Kim
发明人： Jae Kyoung Mun , Hung Gu Ji , Ho Kyun Ahn , Hae Cheon Kim
IPC分类号： H01L29/66
CPC分类号： H01L29/7785 , H01L29/42316
摘要： Provided are a transistor of a semiconductor device and a method of fabricating the same. The transistor of a semiconductor device includes an epitaxial substrate having a buffer layer, a first silicon (Si) planar doped layer, a first conductive layer, a second Si planar doped layer having a different dopant concentration from the first Si planar doped layer, and a second conductive layer, which are sequentially formed on a semi-insulating substrate; a source electrode and a drain electrode formed on both sides of the second conductive layer to penetrate the first Si planar doped layer to a predetermined depth to form an ohmic contact; and a gate electrode formed on the second conductive layer between the source electrode and the drain electrode to form a contact with the second conductive layer, wherein the gate electrode, the source electrode and the drain electrode are electrically insulated by an insulating layer, and a predetermined part of an upper part of the gate electrode is formed to overlap at least one of the source electrode and the drain electrode. Therefore, a maximum voltage that can be applied to the switching device is increased due to increases of a gate turn-on voltage and a breakdown voltage, and decrease of a parallel conduction component. As a result of this improved power handling capability, high-power and low-distortion characteristics and high isolation can be expected from the switching device.
摘要翻译：提供半导体器件的晶体管及其制造方法。半导体器件的晶体管包括具有缓冲层，第一硅（Si）平面掺杂层，第一导电层，具有与第一Si平面掺杂层不同的掺杂剂浓度的第二Si平面掺杂层的外延衬底，以及第二导电层，其依次形成在半绝缘基板上; 源电极和漏电极，形成在第二导电层的两侧，以将第一Si平面掺杂层穿透到预定深度以形成欧姆接触; 以及形成在所述源电极和所述漏电极之间的所述第二导电层上的栅电极，以与所述第二导电层形成接触，其中所述栅电极，所述源电极和所述漏极由绝缘层电绝缘，栅电极的上部的预定部分形成为与源电极和漏电极中的至少一个重叠。因此，由于栅极导通电压和击穿电压的增加以及并联导通分量的降低，可以施加到开关器件的最大电压增加。由于这种改进的功率处理能力，可以期望从开关器件获得高功率和低失真特性以及高隔离度。

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