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    • 1. 发明授权
    • Memory cell voltage regulator with temperature correlated voltage generator circuit
    • 具有温度相关电压发生器电路的存储单元稳压器
    • US06184670B2
    • 2001-02-06
    • US09186498
    • 1998-11-04
    • Jacopo MulattiMatteo ZammattioAndrea GhilardelliMarcello Carrera
    • Jacopo MulattiMatteo ZammattioAndrea GhilardelliMarcello Carrera
    • G05F316
    • G05F3/245Y10S323/907
    • A temperature-related voltage generating circuit has an input terminal receiving a control voltage independent of temperature, and an output terminal delivering a temperature-related control voltage. The input and output terminals are connected together through at least an amplifier stage adapted to set an output reference voltage from a comparison of input voltages. The voltage generating circuit also includes a generator element generating a varying voltage with temperature and connected between a ground voltage reference and a non-inverting input terminal of the amplifier stage. The amplifier stage has an output terminal adapted to deliver a multiple of the varying voltage with temperature to an inverting input terminal of a comparator stage. The comparator stage has its output connected to the temperature-related voltage generating circuit and a non-inverting input terminal receiving the control voltage independent of temperature to evaluate the difference between the control voltage independent of temperature and said voltage being a multiple of the varying voltage with temperature and to output a temperature-related control voltage having at room temperature a mean value which is independent of its thermal differential and increases with temperature. The voltage generating circuit can be incorporated into a regulator for a drain voltage of a single-supply memory cell.
    • 温度相关电压发生电路具有接收与温度无关的控制电压的输入端子和输出与温度有关的控制电压的输出端子。 输入和输出端子通过至少一个放大器级连接在一起,适用于根据输入电压的比较设置输出参考电压。 电压产生电路还包括发生器元件,其产生具有温度的变化的电压并且连接在放大器级的接地电压基准和非反相输入端子之间。 放大器级具有输出端子,其适于将变化的温度的电压的倍数传送到比较器级的反相输入端子。 比较器级的输出端连接到温度相关的电压产生电路,而非反相输入端子接收与温度无关的控制电压,以评估与温度无关的控制电压之间的差值,而所述电压是变化电压的倍数 并且输出具有在室温下的温度相关控制电压,其平均值与其热差异无关并随温度升高。 电压发生电路可以并入用于单电源存储单元的漏极电压的调节器中。
    • 2. 发明授权
    • Bidirectional charge pump generating either a positive or negative voltage
    • 双向电荷泵产生正或负电压
    • US06184741B2
    • 2001-02-06
    • US08900165
    • 1997-07-28
    • Andrea GhilardelliGiovanni CampardoJacopo Mulatti
    • Andrea GhilardelliGiovanni CampardoJacopo Mulatti
    • G05F110
    • G11C5/145
    • A charge pump comprises at least one charge pump stage including a first diode having an anode and a cathode, and a capacitor having a first plate connected to the cathode of the diode and a second plate connected to a clock signal that periodically varies between a reference voltage and a supply voltage, the anode of said diode forming a first terminal of the charge pump. The charge pump further comprises a second diode having an anode connected to the cathode of the first diode and a cathode forming a second terminal of the charge pump, first switching means for selectively coupling the first terminal of the charge pump to the voltage supply and second switching means for selectively coupling the second terminal of the charge pump to the reference voltage. The first switching means and the second switching means are respectively closed and open in a first operating condition whereby the second terminal of the charge pump acquires a voltage of the same polarity but higher in absolute value than said supply voltage. The first switching means and the second switching means are respectively open and closed in a second operating condition whereby the first terminal of the charge pump acquires a voltage of opposite polarity with respect to said voltage supply.
    • 电荷泵包括至少一个电荷泵级,其包括具有阳极和阴极的第一二极管,以及具有连接到二极管的阴极的第一板的电容器和连接到时钟信号的第二板,所述时钟信号周期性地在参考 电压和电源电压,所述二极管的阳极形成电荷泵的第一端子。 电荷泵还包括具有连接到第一二极管的阴极的阳极和形成电荷泵的第二端子的阴极的第二二极管,用于选择性地将电荷泵的第一端子耦合到电压源的第一开关装置和第二二极管 用于选择性地将电荷泵的第二端子耦合到参考电压的开关装置。 第一开关装置和第二开关装置分别在第一操作条件下闭合和断开,由此电荷泵的第二端子获得与所述电源电压相同的极性但绝对值高的电压。 第一开关装置和第二开关装置分别在第二操作条件下打开和关闭,由此电荷泵的第一端子获得相对于所述电压源的极性相反的电压。
    • 3. 发明授权
    • Positive charge pump
    • 正电荷泵
    • US6075402A
    • 2000-06-13
    • US946727
    • 1997-10-08
    • Andrea GhilardelliJacopo MulattiStefano Ghezzi
    • Andrea GhilardelliJacopo MulattiStefano Ghezzi
    • H02M3/07G05F1/10
    • H02M3/073
    • A charge pump comprises a plurality of stages connected in series, an input terminal of the charge pump being connected to a voltage supply and an output terminal of the charge pump providing an output voltage higher than the voltage supply. Each stage comprises unidirectional current flow MOS transistor means connected between a stage input terminal and a stage output terminal allowing current to flow only from said stage input terminal to said stage output terminal, and a first capacitor with one plate connected to said stage output terminal and another plate driven by a respective first digital signal periodically switching between ground and said voltage supply. The unidirectional current flow MOS transistor means of the stages have independent bulk electrodes, and a bias voltage generator circuit is provided for biasing the bulk electrodes of said unidirectional current flow MOS transistor means at respective bulk potentials which become progressively higher going from the stages proximate to said input terminal to the stages proximate to said output terminal of the charge pump.
    • 电荷泵包括串联连接的多个级,电荷泵的输入端连接到电压源,电荷泵的输出端提供高于电压源的输出电压。 每个级包括连接在级输入端和级输出端之间的单向电流MOS晶体管装置,允许电流仅从所述级输入端流向所述级输出端;以及第一电容器,其一板连接到所述级输出端,以及 由相应的第一数字信号驱动的另一个板,周期性地在接地和所述电压源之间切换。 级的单向电流MOS晶体管装置具有独立的体电极,并且提供偏置电压发生器电路,用于以相应的体积电位偏压所述单向电流流量MOS晶体管装置的体电极,其逐渐地从接近于 所述输入端子接近电荷泵的所述输出端子的级。
    • 4. 发明授权
    • Voltage regulator for single feed voltage memory circuits, and flash type memory in particular
    • 单馈电压存储电路的电压调节器,特别是闪存型存储器
    • US06285614B1
    • 2001-09-04
    • US09602669
    • 2000-06-26
    • Jacopo MulattiMarcello CarreraStefano ZanardiMaurizio Branchetti
    • Jacopo MulattiMarcello CarreraStefano ZanardiMaurizio Branchetti
    • G11C702
    • G11C5/147G11C16/30
    • A voltage regulator for memory circuits has a differential stage having a non-inverting input terminal receiving a control voltage independent of the temperature; an inverting input terminal connected to a ground voltage reference; a feed terminal connected to a booster circuit adapted for producing a boosted voltage; and an output terminal connected to an output terminal of the voltage regulator, for producing an output voltage reference starting from the comparison of input voltages. The voltage regulator further comprises a connecting transistor inserted between the feed terminal and the output terminal of the differential stage, the connecting transistor being source follower having a control terminal connected to the output terminal of the differential stage, as well as a source terminal connected to the output terminal of the voltage regulator, in such a way as to self-limit the transition of the voltage on the output terminal.
    • 用于存储器电路的电压调节器具有差分级,其具有接收与温度无关的控制电压的非反相输入端; 连接到接地电压基准的反相输入端子; 连接到适于产生升压电压的升压电路的馈电端子; 以及连接到所述电压调节器的输出端子的输出端子,用于从输入电压的比较开始产生输出电压基准。 电压调节器还包括插入差分级的馈电端子和输出端子之间的连接晶体管,连接晶体管是源极跟随器,其具有连接到差分级的输出端子的控制端子,以及连接到 电压调节器的输出端子,以自限制输出端子上的电压的转换。
    • 5. 发明授权
    • Voltage regulator for single feed voltage memory circuits, and flash
type memory in particular
    • 单馈电压存储电路的电压调节器,特别是闪存型存储器
    • US6101118A
    • 2000-08-08
    • US196204
    • 1998-11-20
    • Jacopo MulattiMarcello CarreraStefano ZanardiMaurizio Branchetti
    • Jacopo MulattiMarcello CarreraStefano ZanardiMaurizio Branchetti
    • G11C5/14G11C16/30G11C11/24
    • G11C5/147G11C16/30
    • A voltage regulator for memory circuits has a differential stage having a non-inverting input terminal receiving a control voltage independent of the temperature; an inverting input terminal connected to a ground voltage reference; a feed terminal connected to a booster circuit adapted for producing a boosted voltage; and an output terminal connected to an output terminal of the voltage regulator, for producing an output voltage reference starting from the comparison of input voltages. The voltage regulator further comprises a connecting transistor inserted between the feed terminal and the output terminal of the differential stage, the connecting transistor being source follower having a control terminal connected to the output terminal of the differential stage, as well as a source terminal connected to the output terminal of the voltage regulator, in such a way as to self-limit the transition of the voltage on the output terminal.
    • 用于存储器电路的电压调节器具有差分级,其具有接收与温度无关的控制电压的非反相输入端; 连接到接地电压基准的反相输入端子; 连接到适于产生升压电压的升压电路的馈电端子; 以及连接到所述电压调节器的输出端子的输出端子,用于从输入电压的比较开始产生输出电压基准。 电压调节器还包括插入差分级的馈电端子和输出端子之间的连接晶体管,连接晶体管是源极跟随器,其具有连接到差分级的输出端子的控制端子,以及连接到 电压调节器的输出端子,以自限制输出端子上的电压的转换。
    • 6. 发明授权
    • BiCMOS negative charge pump
    • BiCMOS负电荷泵
    • US06016073A
    • 2000-01-18
    • US965068
    • 1997-11-05
    • Andrea GhilardelliJacopo MulattiMaurizio Branchetti
    • Andrea GhilardelliJacopo MulattiMaurizio Branchetti
    • H01L21/8247H01L21/8234H01L27/088H01L29/788H01L29/792H02M3/07G06F1/10
    • H02M3/073
    • A charge pump includes a plurality of stages connected in series between a reference potential and an output terminal of the charge pump. The plurality of stages includes a first group of stages, proximate to the reference potential, and a second group of stages proximate to the output terminal of the charge pump. Each stage of the first group includes a pass-transistor with first and second terminals respectively connected to an input and an output of the stage, and a first capacitor with a first plate connected to the output of the stage and a second plate driven by a digital signal switching between the reference voltage and a positive voltage. Each stage of the second group includes a junction diode having a first electrode connected to an input of the stage and a second electrode connected to an output of the stage, and a second capacitor having a first plate connected to the output of the stage and a second plate driven by a digital signal switching between the reference voltage and the voltage supply.
    • 电荷泵包括串联连接在电荷泵的参考电位和输出端之间的多个级。 多个级包括靠近参考电位的第一组级,以及靠近电荷泵输出端的第二组级。 第一组的每个级包括通过晶体管,其中第一和第二端子分别连接到级的输入端和输出端,第一电容器具有连接到级的输出端的第一板和由第一板驱动的第二板 数字信号在参考电压和正电压之间切换。 第二组的每一级包括结二极管,其具有连接到该级的输入的第一电极和连接到该级的输出的第二电极,以及一第二电容器,该第二电容器具有连接到该级的输出的第一电极和 第二板由参考电压和电压源之间的数字信号切换驱动。
    • 8. 发明授权
    • NMOS negative charge pump
    • NMOS负电荷泵
    • US6130572A
    • 2000-10-10
    • US12331
    • 1998-01-23
    • Andrea GhilardelliJacopo MulattiMaurizio Branchetti
    • Andrea GhilardelliJacopo MulattiMaurizio Branchetti
    • H02M3/07G05F3/02
    • H02M3/073
    • A negative charge pump circuit comprises a plurality of charge pump stages connected in series to each other. Each stage has a stage input terminal and a stage output terminal. A first stage has the stage input terminal connected to a reference voltage, a final stage has the stage output terminal operatively connected to an output terminal of the charge pump at which a negative voltage is developed; intermediate stages have the respective stage input terminal connected to the stage output terminal of a preceding stage and the respective stage output terminal connected to the stage input terminal of a following stage. Each stage comprises a first N-channel MOSFET with a first electrode connected to the stage input terminal and a second electrode connected to the stage output terminal, a second N-channel MOSFET with a first electrode connected to the stage output terminal and a second electrode connected to a gate electrode of the first N-channel MOSFET, a boost capacitor with one terminal connected to the gate electrode of the first N-channel MOSFET and a second terminal driven by a respective first digital signal switching between the reference voltage and a positive voltage supply, and a second capacitor with one terminal connected to the charge pump stage output terminal and a second terminal connected to a respective second digital signal switching between the reference voltage and the voltage supply. A gate electrode of the second N-channel MOSFET is connected, in the first stage, to a third digital signal switching between the reference voltage and the voltage supply, while in the remaining stage the gate electrode of the second N-channel MOSFET is connected to the stage input terminal.
    • 负电荷泵电路包括彼此串联连接的多个电荷泵级。 每个阶段都有一个舞台输入终端和舞台输出终端。 第一级具有连接到参考电压的级输入端,最后级具有可操作地连接到电荷泵的输出端处的级输出端,在该输出端产生负电压; 中间级将各级输入端子连接到前一级的级输出端子,并且各级输出端子连接到后级的级输入端子。 每个级包括第一N沟道MOSFET,其第一电极连接到级输入端,第二电极连接到级输出端,第二N沟道MOSFET,第一电极连接到级输出端,第二电极 连接到第一N沟道MOSFET的栅电极,一个升压电容器,一个端子连接到第一N沟道MOSFET的栅电极,第二端由相应的第一数字信号驱动,在参考电压和正极之间切换 以及第二电容器,其中一个端子连接到电荷泵级输出端子,第二电容器连接到在参考电压和电压源之间切换的相应的第二数字信号。 第二N沟道MOSFET的栅电极在第一级连接到在参考电压和电压源之间切换的第三数字信号,而在剩余阶段,第二N沟道MOSFET的栅电极连接 到舞台输入端。
    • 9. 发明授权
    • Page buffer for nonvolatile memory device
    • 非易失性存储器件的页缓冲器
    • US07729177B2
    • 2010-06-01
    • US11759649
    • 2007-06-07
    • Dae Sik SongJaeseok ParkJacopo Mulatti
    • Dae Sik SongJaeseok ParkJacopo Mulatti
    • G11C16/06G11C16/10G11C16/26G11C7/10G11C7/06
    • G11C11/5642G11C11/5628G11C16/24G11C16/26G11C16/3431G11C16/3454G11C16/3459G11C2211/5621G11C2211/5642G11C2211/5643
    • A nonvolatile memory device implements a program routine followed by a program-verify routine when recording or modifying stored data. The nonvolatile memory device may include an array of memory cells for storing data, a sense node, and a gating circuit for selectively connecting a bitline of the array of memory cells to the sense node. The nonvolatile memory device may also include a page buffer coupled to the sense node. The page buffer may include a main latch for storing data to be written in the nonvolatile memory device, a cache latch for storing data supplied on an input line of the nonvolatile memory device to be transferred in the main latch through a source liner and a temporary static latch connected to the main latch through the source line and to the cache latch through an auxiliary switch and for transferring data between the main latch and the cache latch. The cache latch may be isolated from the source line during execution of the program routine and of the program-verify routine.
    • 非易失性存储器件在记录或修改存储的数据时实现程序例程,随后是程序验证程序。 非易失性存储器件可以包括用于存储数据的存储器单元阵列,感测节点和用于选择性地将存储器单元阵列的位线连接到感测节点的选通电路。 非易失性存储器件还可以包括耦合到感测节点的页缓冲器。 页面缓冲器可以包括用于存储要写入非易失性存储器件的数据的主锁存器,用于存储提供在非易失性存储器件的输入线上的数据的高速缓冲存储器,用于通过源衬垫传输到主锁存器中, 静态锁存器通过源极线连接到主锁存器,并通过辅助开关连接到高速缓存锁存器,并用于在主锁存器和高速缓存锁存器之间传送数据。 在执行程序例程和程序验证程序期间,高速缓存锁存器可以与源线隔离。
    • 10. 发明授权
    • Integrated device with operativity testing
    • 具有可操作性测试的集成设备
    • US06898745B2
    • 2005-05-24
    • US09798347
    • 2001-03-02
    • Stefano ZanardiMaurizio BranchettiJacopo MulattiMassimiliano Picca
    • Stefano ZanardiMaurizio BranchettiJacopo MulattiMassimiliano Picca
    • G01R31/317G11C29/46G01R31/28
    • G11C29/46G01R31/31701
    • An integrated device having a pad receiving, in a standard operative condition, an input signal having a first value and, in a test operative condition, a test voltage having a second value higher than the first value; an input stage connected to the pad and including an electronic component having a first terminal connected to the pad; a third-level detecting stage connected to the pad and supplying a logic third-level signal having a first level in presence of the input signal and a second level in presence of the test voltage; and a selector connected to a second terminal of the electronic component and structured to connect the second terminal to a reference potential in the presence of the first logic level of the third-level signal and to a biasing voltage higher than the reference potential and lower than the second value in the presence of the second logic level of the third-level signal.
    • 一种集成装置,具有在标准操作条件下接收具有第一值的输入信号的焊盘,并且在测试操作条件下接收具有高于第一值的第二值的测试电压; 输入级,其连接到所述焊盘并且包括具有连接到所述焊盘的第一端子的电子部件; 连接到所述焊盘的第三电平检测级,并且在所述测试电压存在的情况下提供具有所述输入信号的第一电平的逻辑第三电平信号和第二电平; 以及选择器,其连接到所述电子部件的第二端子,并且被构造为在所述第三电平信号的所述第一逻辑电平存在的情况下将所述第二端子连接到参考电位,并且高于所述参考电位并且低于所述参考电位的偏置电压 存在第三级信号的第二逻辑电平的第二值。