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    • 3. 发明授权
    • Low voltage differential signal receiver and methods of calibrating a termination resistance of a low voltage differential signal receiver
    • 低电压差分信号接收器和校准低电压差分信号接收器的终端电阻的方法
    • US07315185B2
    • 2008-01-01
    • US11434960
    • 2006-05-16
    • Jae-Suk YuJae-Youl LeeJong-Seon KimKyung-Suc Nah
    • Jae-Suk YuJae-Youl LeeJong-Seon KimKyung-Suc Nah
    • H03K17/16
    • H04L25/0298H04L25/0278
    • A low voltage differential signal (LVDS) receiver includes a first receiving unit configured to receive a reference voltage and to responsively generate a first differential signal, and a second receiving unit configured to receive a voltage developed across a variable termination resistor unit having a resistance that is adjustable based on a resistance control code in response to a reference current, and to responsively generate a second differential signal. The LVDS receiver further includes a comparing unit configured to compare the first differential signal with the second differential signal and to responsively generate a counter control signal. The LVDS receiver further includes an up/down counter configured to adjust the resistance control code in response to the counter control signal. The up/down counter is further configured to provide the resistance control code to the variable termination resistor unit. Corresponding methods are also disclosed.
    • 低电压差分信号(LVDS)接收机包括:第一接收单元,被配置为接收参考电压并响应地产生第一差分信号;以及第二接收单元,被配置为接收跨越可变终端电阻器单元产生的电压, 基于响应于参考电流的电阻控制代码可调节,并且响应地产生第二差分信号。 LVDS接收机还包括比较单元,其被配置为将第一差分信号与第二差分信号进行比较,并且响应地产生计数器控制信号。 LVDS接收器还包括一个上/下计数器,配置成响应于计数器控制信号调整电阻控制代码。 上/下计数器还被配置为向可变终端电阻器单元提供电阻控制代码。 还公开了相应的方法。
    • 4. 发明申请
    • Low voltage differential signal receiver and methods of calibrating a termination resistance of a low voltage differential signal receiver
    • 低电压差分信号接收器和校准低电压差分信号接收器的终端电阻的方法
    • US20070018686A1
    • 2007-01-25
    • US11434960
    • 2006-05-16
    • Jae-Suk YuJae-Youl LeeJong-Seon KimKyung-Suc Nah
    • Jae-Suk YuJae-Youl LeeJong-Seon KimKyung-Suc Nah
    • H03K19/094
    • H04L25/0298H04L25/0278
    • A low voltage differential signal (LVDS) receiver includes a first receiving unit configured to receive a reference voltage and to responsively generate a first differential signal, and a second receiving unit configured to receive a voltage developed across a variable termination resistor unit having a resistance that is adjustable based on a resistance control code in response to a reference current, and to responsively generate a second differential signal. The LVDS receiver further includes a comparing unit configured to compare the first differential signal with the second differential signal and to responsively generate a counter control signal. The LVDS receiver further includes an up/down counter configured to adjust the resistance control code in response to the counter control signal. The up/down counter is further configured to provide the resistance control code to the variable termination resistor unit. Corresponding methods are also disclosed.
    • 低电压差分信号(LVDS)接收机包括:第一接收单元,被配置为接收参考电压并且响应地产生第一差分信号;以及第二接收单元,被配置为接收跨越可变终端电阻器单元产生的电压, 基于响应于参考电流的电阻控制代码可调节,并且响应地产生第二差分信号。 LVDS接收机还包括比较单元,其被配置为将第一差分信号与第二差分信号进行比较,并且响应地产生计数器控制信号。 LVDS接收器还包括一个上/下计数器,配置成响应于计数器控制信号调整电阻控制代码。 上/下计数器还被配置为向可变终端电阻器单元提供电阻控制代码。 还公开了相应的方法。
    • 9. 发明申请
    • LIGHT EMITTING DIODE DRIVING CIRCUIT, AND DISPLAY DEVICE HAVING THE SAME
    • 发光二极管驱动电路,以及具有该发光二极管驱动电路的显示装置
    • US20120127214A1
    • 2012-05-24
    • US13241737
    • 2011-09-23
    • Hee-Seok HANJong-Seon Kim
    • Hee-Seok HANJong-Seon Kim
    • G09G3/14H05B37/02G09G5/10
    • G09G3/342G09G2320/064G09G2330/028H05B33/0827
    • A light-emitting-diode (LED) driving circuit and a display device include a current driving circuit, a level detector, a comparing circuit, a digital control circuit, and a power supply circuit. The level detector detects a minimum detection voltage signal having a minimum voltage level among voltage signals of first terminals of respective LED strings. The comparing circuit generates a first comparison output signal and a second comparison output signal based on a headroom-control reference voltage and the minimum detection voltage signal. The digital control circuit adjusts a duty ratio of a gate control signal in a digital mode based on the first comparison output signal, the second comparison output signal and a control clock signal. Therefore, the LED driving circuit has a small area in a semiconductor integrated circuit.
    • 发光二极管(LED)驱动电路和显示装置包括电流驱动电路,电平检测器,比较电路,数字控制电路和电源电路。 电平检测器检测在各个LED串的第一端子的电压信号中具有最小电压电平的最小检测电压信号。 比较电路基于余量控制参考电压和最小检测电压信号产生第一比较输出信号和第二比较输出信号。 数字控制电路基于第一比较输出信号,第二比较输出信号和控制时钟信号来调整数字模式中的门控制信号的占空比。 因此,LED驱动电路在半导体集成电路中具有小的面积。
    • 10. 发明授权
    • Flat panel display including transceiver circuit for digital interface
    • 平板显示器包括用于数字接口的收发电路
    • US08026891B2
    • 2011-09-27
    • US11450771
    • 2006-06-09
    • Jong-Seon KimJun-Hyung SoukMyung-Ryul ChoiSeung-Woo Lee
    • Jong-Seon KimJun-Hyung SoukMyung-Ryul ChoiSeung-Woo Lee
    • G09G3/36
    • G09G5/006
    • The present invention relates to a digital data transceiver circuit applicable to a flat panel display such as an LCD to be placed between graphic signal generation module and liquid crystal display module or between timing control IC and data driver IC, etc. A digital data transceiver circuit of the present invention has a first current source and a second current source, and the second current source is controlled to supply a current or not depending on the status of the lower bit of input data. A transmitter is connected to a node, on which the first and second current sources combine, and the transmission paths of currents from the two current sources are determined depending on the status of the upper bit of input data. A signal of the transmitter is transmitted through a transmission line, and a termination resistor is connected to the transmission line. A receiver detects output data according to a voltage applied to the termination resistor. The digital data transceiver circuit of the present invention can transmit 2-bit or 3-bit data during one clock period, and it is resistible to the noise better than the voltage transmission method and effective to long distance transmission.
    • 数字数据收发电路技术领域本发明涉及适用于诸如LCD之类的平板显示器的数字数据收发器电路,放置在图形信号发生模块和液晶显示模块之间,或定时控制IC与数据驱动器IC之间。数字数据收发电路 本发明具有第一电流源和第二电流源,并且第二电流源被控制以根据输入数据的较低位的状态来提供电流。 发射机连接到第一和第二电流源组合的节点,并且根据输入数据的较高位的状态确定来自两个电流源的电流的传输路径。 发射机的信号通过传输线传输,终端电阻连接到传输线。 接收机根据施加到终端电阻器的电压来检测输出数据。 本发明的数字数据收发电路可以在一个时钟周期内发送2位或3位数据,并且比电压传输方式更能抵抗噪声,有效地进行长距离传输。