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1. 发明授权

US06717503B2 Coil and coil system for integration into a micro-electronic circuit and microelectronic circuit 有权
标题翻译：线圈和线圈系统集成到微电子电路和微电子电路中
公开(公告)号：US06717503B2
公开(公告)日：2004-04-06
申请号：US10200422
申请日：2002-07-22
申请人： Jörg Berthold , Dieter Sewald , Marc Tiebout
发明人： Jörg Berthold , Dieter Sewald , Marc Tiebout
IPC分类号： H01F500
CPC分类号： H01L23/522 , H01F17/0033 , H01F27/362 , H01L23/5227 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： The coil and coil system is provided for integration in a microelecronic circuit. The coil is placed inside an oxide layer of a chip, and the oxide layer is placed on the substrate surface of a substrate. The coil comprises one or more windings, whereby the winding(s) is/are formed by at least segments of two conductor tracks, which are each provided in spatially spaced-apart metalization levels, and by via-contacts which connect these conductor track(s) and/or conductor track segments. In order to be able to produce high-quality coils, a coil is produced with the largest possible coil cross-section, whereby a standard metalization, especially a standard metalization using copper, can, however, be used for producing the oil. To this end, the via contacts are formed from a stack of two ore more via elements arranged one above the other. Parts of the metalization levels can be located between the via elements.
摘要翻译：线圈和线圈系统被提供用于集成在微电子电路中。将线圈放置在芯片的氧化物层的内部，氧化物层被放置在基板的基板表面上。线圈包括一个或多个绕组，由此绕组由两个导体轨道的至少一部分形成，每个导体轨道分别设置在空间上间隔开的金属化水平，以及通过连接这些导体轨迹的通孔接触 s）和/或导体轨道段。为了能够生产高质量的线圈，制造线圈截面最大的线圈，由此可以使用标准金属化，特别是使用铜的标准金属化来生产油。为此，通孔触点由一个彼此排列的两个以上的通孔元件的叠层形成。金属化水平的一部分可以位于通孔元件之间。

2. 发明授权

US09654108B2 Apparatus and method having reduced flicker noise 有权
公开(公告)号：US09654108B2
公开(公告)日：2017-05-16
申请号：US11972639
申请日：2008-01-11
申请人： Domagoj Siprak , Marc Tiebout
发明人： Domagoj Siprak , Marc Tiebout
IPC分类号： H03L5/00 , H03K3/01 , H03K19/003 , H03D7/14 , H03B5/12
CPC分类号： H03K19/00361 , H03B5/1212 , H03B5/1228 , H03B5/124 , H03B2200/0088 , H03D7/1441 , H03D7/1458 , H03D2200/0043 , H03D2200/0084
摘要： One embodiment described is an apparatus that includes an active device structured in a semiconductor body. The semiconductor body may include a gate terminal to receive a switched bias signal, and a bulk terminal to receive a forward body-bias signal. A first circuit portion may be coupled to the gate terminal to provide the switched bias signal, and a second circuit portion may be coupled to the bulk terminal to provide the forward body-bias signal.

3. 发明申请

US20100066438A1 Biasing a Transistor Out of a Supply Voltage Range 有权
标题翻译：将晶体管偏置在电源电压范围之外
公开(公告)号：US20100066438A1
公开(公告)日：2010-03-18
申请号：US12388329
申请日：2009-02-18
申请人： Domagoj Siprak , Marc Tiebout , Peter Baumgartner
发明人： Domagoj Siprak , Marc Tiebout , Peter Baumgartner
IPC分类号： G05F3/02 , G11C5/14
CPC分类号： H03K19/00315 , H01L21/761 , H01L29/7833 , H03K2217/0018
摘要： The present disclosure relates to constructing and operating a transistor or other active device with significantly reduced flicker noise.
摘要翻译：本公开涉及构造和操作具有显着降低的闪烁噪声的晶体管或其它有源器件。

4. 发明申请

US20100039192A1 Active Inductance for Very High Frequencies Based on CMOS Inverters 有权
标题翻译：基于CMOS逆变器的高频有源电感
公开(公告)号：US20100039192A1
公开(公告)日：2010-02-18
申请号：US12192793
申请日：2008-08-15
申请人： Oliver Schmitz , Sven Karsten Hampel , Fabian Beichert , Marc Tiebout
发明人： Oliver Schmitz , Sven Karsten Hampel , Fabian Beichert , Marc Tiebout
IPC分类号： H03H11/42
CPC分类号： H03H11/42 , H03H11/28
摘要： The present disclosure relates to techniques for simulating electrical inductance.
摘要翻译：本公开涉及用于模拟电感的技术。

5. 发明申请

US20090088113A1 Fast Hopping Frequency Synthesizer 有权
标题翻译：快速跳频合成器
公开(公告)号：US20090088113A1
公开(公告)日：2009-04-02
申请号：US11863037
申请日：2007-09-27
申请人： Stefano Marsili , Marc Tiebout , Andrea Bevilacqua , Sterano Dal Toso
发明人： Stefano Marsili , Marc Tiebout , Andrea Bevilacqua , Sterano Dal Toso
IPC分类号： H04B1/06 , H03B27/00 , H03B5/08
CPC分类号： H04B1/7136 , H03L7/06 , H04B2001/71362
摘要： Apparatus and systems for synthesizing frequencies for use in a fast hopping wireless communications system. A frequency synthesizer comprises a plurality of oscillators with each oscillator having a first input coupled to a reference clock frequency signal, and a signal selector having a control signal input and a plurality of reference clock inputs with each reference clock input coupled to an output from an oscillator. Each oscillator produces a reference frequency that is a harmonic of a reference clock frequency of the reference clock frequency signal, and the signal selector couples a reference clock input to an output based on a control signal provided by the control signal input.
摘要翻译：用于合成频率以用于快速跳频无线通信系统的装置和系统。频率合成器包括多个振荡器，每个振荡器具有耦合到参考时钟频率信号的第一输入端，以及信号选择器，具有控制信号输入和多个参考时钟输入，每个参考时钟输入耦合到来自振荡器每个振荡器产生参考频率，其是参考时钟频率信号的参考时钟频率的谐波，并且信号选择器基于由控制信号输入提供的控制信号将参考时钟输入耦合到输出。

6. 发明申请

US20090067351A1 Power Detector Radio Frequency Multiplexer 审中-公开
公开(公告)号：US20090067351A1
公开(公告)日：2009-03-12
申请号：US11851398
申请日：2007-09-07
申请人： Andreas Wiesbauer , Sven Derksen , Stefano Marsili , Koen Mertens , Marc Tiebout
发明人： Andreas Wiesbauer , Sven Derksen , Stefano Marsili , Koen Mertens , Marc Tiebout
IPC分类号： H04B7/00
CPC分类号： H04W52/52 , H04B17/13
摘要： Implementations related to systems and devices that make use of a power detector multiplexer are presented herein.

7. 发明授权

US07019384B2 Integrated, tunable capacitance device 失效
标题翻译：集成可调电容器件
公开(公告)号：US07019384B2
公开(公告)日：2006-03-28
申请号：US10678385
申请日：2003-10-03
申请人： Judith Maget , Marc Tiebout
发明人： Judith Maget , Marc Tiebout
IPC分类号： H01L29/93
CPC分类号： H01L29/94 , H01L27/0808
摘要： An integrated, tunable capacitance device includes a semiconductor region, which is, preferably, N-doped, formed in a semiconductor body, having an insulating thick oxide region, which areally adjoins the main side of the semiconductor body, and having a thin oxide region, which, likewise, adjoins the main side and is disposed above the semiconductor region and also has a smaller layer thickness than the thick oxide region. A gate electrode is provided on the thin oxide region and terminal regions are provided in the semiconductor region. The capacitance described has a larger tuning range compared with transistor varactors. The integrated, tunable capacitance can be used, for example, in LC oscillators of integrated VCOs.
摘要翻译：集成的可调谐电容器件包括：半导体区域，优选地，N掺杂形成在半导体本体中，具有绝缘的厚氧化物区域，该半导体区域与半导体本体的主侧邻接并具有薄的氧化物区域，其同样邻接主侧并且设置在半导体区域的上方，并且还具有比厚氧化物区域更小的层厚度。在薄氧化物区域上设置栅电极，在半导体区域设置端子区域。与晶体管可变电抗器相比，所描述的电容具有较大的调谐范围。集成的可调谐电容可用于例如集成VCO的LC振荡器。

8. 发明授权

US06646499B2 Voltage-controlled capacitor 有权
标题翻译：压控电容
公开(公告)号：US06646499B2
公开(公告)日：2003-11-11
申请号：US10288388
申请日：2002-11-05
申请人： Marc Tiebout
发明人： Marc Tiebout
IPC分类号： H03K1700
CPC分类号： H03H11/483
摘要： A voltage-controlled capacitor is configured in such a way that it contains two varactors connected in parallel. The varactors are connected in such a way that a capacitance is controlled by differential signals. This layout results in a voltage-controlled capacitor that has an optimally low sensitivity to interference.
摘要翻译：压控电容器被配置成使得它包含两个并联连接的变容二极管。变容二极管的连接方式是电容由差分信号控制。这种布局导致了对干扰敏感性最佳的压控电容器。

9. 发明授权

US07940830B2 Fast hopping frequency synthesizer 有权
标题翻译：快跳频率合成器
公开(公告)号：US07940830B2
公开(公告)日：2011-05-10
申请号：US11863037
申请日：2007-09-27
申请人： Stefano Marsili , Marc Tiebout , Andrea Bevilacqua , Stefano Dal Toso
发明人： Stefano Marsili , Marc Tiebout , Andrea Bevilacqua , Stefano Dal Toso
IPC分类号： H04B1/00
CPC分类号： H04B1/7136 , H03L7/06 , H04B2001/71362
摘要： Apparatus and systems for synthesizing frequencies for use in a fast hopping wireless communications system. A frequency synthesizer comprises a plurality of oscillators with each oscillator having a first input coupled to a reference clock frequency signal, and a signal selector having a control signal input and a plurality of reference clock inputs with each reference clock input coupled to an output from an oscillator. Each oscillator produces a reference frequency that is a harmonic of a reference clock frequency of the reference clock frequency signal, and the signal selector couples a reference clock input to an output based on a control signal provided by the control signal input.
摘要翻译：用于合成频率以用于快速跳跃无线通信系统的装置和系统。频率合成器包括多个振荡器，每个振荡器具有耦合到参考时钟频率信号的第一输入端，以及信号选择器，具有控制信号输入和多个参考时钟输入，每个参考时钟输入耦合到来自振荡器每个振荡器产生参考频率，其是参考时钟频率信号的参考时钟频率的谐波，并且信号选择器基于由控制信号输入提供的控制信号将参考时钟输入耦合到输出。

10. 发明申请

US20090166681A1 MOS Transistor and Semiconductor Device 有权
标题翻译： MOS晶体管和半导体器件
公开(公告)号：US20090166681A1
公开(公告)日：2009-07-02
申请号：US11968552
申请日：2008-01-02
申请人： Marc Tiebout , Daniel Kehrer , Domagoj Siprak , Pierre Mayr , Johannes Kunze , Christopher Weyers
发明人： Marc Tiebout , Daniel Kehrer , Domagoj Siprak , Pierre Mayr , Johannes Kunze , Christopher Weyers
IPC分类号： H01L29/78
CPC分类号： H01L23/5283 , H01L23/4824 , H01L23/528 , H01L29/41725 , H01L2924/0002 , H01L2924/30105 , H01L2924/00
摘要： According to one embodiment of the present invention, a MOS transistor includes a semiconductor layer including a source region, a drain region, and a channel region disposed between the source region and the drain region. A gate structure is arranged above the channel regions. A source wiring structure is arranged above the source region and is connected to the source region. A drain wiring structure is arranged above the drain region and is connected to the drain region. The width of the source wiring structure is larger than the width of the drain wiring structure, and the height of the source wiring structure is smaller than the height of the drain wiring structure, or vice versa.
摘要翻译：根据本发明的一个实施例，MOS晶体管包括半导体层，其包括源极区，漏极区和设置在源极区和漏极区之间的沟道区。栅极结构布置在沟道区域的上方。源极布线结构布置在源极区域的上方并与源极区域连接。漏极布线结构布置在漏极区上方并连接到漏极区。源极布线结构的宽度大于漏极布线结构的宽度，源极布线结构的高度小于漏极布线结构的高度，反之亦然。

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