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    • 1. 发明授权
    • Data control unit capable of correcting boot errors, and corresponding self-correction method
    • 能够修正启动错误的数据控制单元及相应的自校正方法
    • US07444543B2
    • 2008-10-28
    • US11149948
    • 2005-06-09
    • Irene BabudriMarco RovedaRino Micheloni
    • Irene BabudriMarco RovedaRino Micheloni
    • G06F11/00
    • G06F11/1417G06F11/076
    • A boot method for a data control unit downloads boot information from a nonvolatile memory into a temporary buffer of a boot-activation unit. A processing unit is activated by the boot-activation unit; a boot code is executed by the processing unit; and an operating code is downloaded from the nonvolatile memory into a volatile memory through the boot-activation unit. To correct possible errors in the block of the nonvolatile memory containing information and boot codes, the boot-activation unit verifies whether the boot information downloaded into its volatile memory has a critical-error condition and activates a spare memory portion of the nonvolatile memory in presence of the critical-error condition.
    • 用于数据控制单元的引导方法将引导信息从非易失性存储器下载到引导启动单元的临时缓冲器中。 处理单元由启动激活单元激活; 由处理单元执行引导代码; 并且通过引导启动单元将操作代码从非易失性存储器下载到易失性存储器中。 为了纠正包含信息和引导代码的非易失性存储器的块中的可能错误,引导激活单元验证下载到其易失性存储器中的引导信息是否具有关键错误状况,并在存在时激活非易失性存储器的备用存储器部分 的关键错误条件。
    • 3. 发明授权
    • Semiconductor memory with access protection scheme
    • 半导体存储器具有访问保护方案
    • US07249231B2
    • 2007-07-24
    • US10781974
    • 2004-02-18
    • Irene BabudriStefano GhezziGiuseppe GianniniRuggero DeLuca
    • Irene BabudriStefano GhezziGiuseppe GianniniRuggero DeLuca
    • G06F12/00
    • G06F12/1425
    • A memory, particularly but not limitatively a flash memory, comprises at least one data storage area comprising a plurality of data storage locations, and an access circuitry for accessing the data storage locations for either retrieving or altering a data content thereof, depending for example on a memory user request. The memory includes at least one first user-configurable flag element and a second user-configurable flag element. Both the at least one first and the second flag elements are used by a user to set a protected state of the respective data storage area against alteration of the content of the data storage locations thereof. The protected state defined by setting the first flag element is user-removable, i.e., it can be removed by request from the user, so as to enable again the alteration of the content of the data storage area. On the contrary, the protected state defined by setting the second flag element is permanent and, once set, it cannot be removed: the data storage area becomes unalterable.
    • 存储器,特别地但不限于闪速存储器,包括至少一个包括多个数据存储位置的数据存储区域,以及用于访问数据存储位置以用于检索或更改其数据内容的访问电路,这取决于例如 内存用户请求。 存储器包括至少一个第一用户可配置标志元件和第二用户可配置标志元件。 所述至少一个第一和第二标志元素都由用户用于设置相应数据存储区域的受保护状态以防其数据存储位置的内容的改变。 通过设置第一标志元素定义的受保护状态是用户可移除的,即,可以通过来自用户的请求去除它,以便再次启用数据存储区域的内容的改变。 相反,通过设置第二标志元素定义的受保护状态是永久性的,一旦设置,就不能被去除:数据存储区域变得不可更改。
    • 4. 发明授权
    • Testing method for a reading operation in a non volatile memory
    • 非易失性存储器中读取操作的测试方法
    • US06693829B2
    • 2004-02-17
    • US10068565
    • 2002-02-05
    • Irene BabudriMauro Giacomini
    • Irene BabudriMauro Giacomini
    • G11C1628
    • G11C29/24G11C16/28
    • A memory device implements a reading operation. The memory device includes first, second, and third memory cells; a read circuit coupled to the memory cells and operable to read first, second, and third values, respectively, from the first, second, and third memory cells; and a comparison circuit coupled to the read circuit and operable to compare the first and second values with fourth and fifth predetermined values and to generate a data-valid signal that indicates that the third value is valid if the first and second values equal the fourth and fifth values, respectively. The memory device may further include a selection circuit coupled to the read circuit and to the comparison circuit and operable to couple the third value to a data bus in response to the data-valid signal.
    • 存储器件实现读取操作。 存储器件包括第一,第二和第三存储器单元; 耦合到所述存储器单元并且可操作以分别从所述第一,第二和第三存储器单元读取第一,第二和第三值的读取电路; 以及比较电路,其耦合到所述读取电路并且可操作以将所述第一值和第二值与第四和第五预定值进行比较,并且如果所述第一值和第二值等于第四和第五值,则产生指示所述第三值有效的数据有效信号, 第五个值。 存储器件还可以包括耦合到读取电路和比较电路的选择电路,并且可操作以响应于数据有效信号将第三值耦合到数据总线。