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    • 4. 发明专利
    • Error combination logic configured for multi-channel data detection system, and method for generating error signal
    • 用于多通道数据检测系统的错误组合逻辑和用于产生错误信号的方法
    • JP2009095028A
    • 2009-04-30
    • JP2008262296
    • 2008-10-08
    • Internatl Business Mach Corp インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation
    • HUTCHINS ROBERT ALLENJELITTO JENSOELCER SEDAT
    • H03L7/091
    • PROBLEM TO BE SOLVED: To provide phase-error combination logic for a multi-channel data detection system with a phase locked loop for each channel.
      SOLUTION: The phase-error combination logic comprises receiving phase error information with respect to each channel; combination logic configured to combine the received phase error information and generate a combined phase error; and a phase-error output configured to apply the combined phase error to at least one channel phase locked loop. Additionally, error signal combination logic comprises receiving error information of a signal relevant to a phase locked loop with respect to each channel; combination logic configured to combine the received error signal information and generate a combined error signal, weighting the received error signal information from each channel, for example with reliability information. An error compensation output is configured to apply the combined, weighted error signal to at least one channel phase locked loop.
      COPYRIGHT: (C)2009,JPO&INPIT
    • 要解决的问题:为具有每个通道的锁相环的多通道数据检测系统提供相位误差组合逻辑。 解决方案:相位误差组合逻辑包括接收关于每个通道的相位误差信息; 组合逻辑,被配置为组合所接收的相位误差信息并产生组合的相位误差; 以及被配置为将组合的相位误差应用于至少一个通道锁相环的相位误差输出。 另外,误差信号组合逻辑包括相对于每个信道接收与锁相环相关的信号的误差信息; 组合逻辑,其被配置为组合所接收的误差信号信息并产生组合误差信号,例如用可靠性信息对来自每个信道的接收到的误差信号信息进行加权。 误差补偿输出被配置为将组合的加权误差信号应用于至少一个通道锁相环。 版权所有(C)2009,JPO&INPIT