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1. 发明授权

US07571203B2 Processing device for a pseudo inverse matrix and V-BLAST system 失效
标题翻译：用于伪逆矩阵和V-BLAST系统的处理装置
公开(公告)号：US07571203B2
公开(公告)日：2009-08-04
申请号：US10972235
申请日：2004-10-21
申请人： In-San Jeon , Hyuk Kim , Jae-Seok Kim , Kyung-Soo Kim , Hee-Bum Jung , Jong-Dae Kim
发明人： In-San Jeon , Hyuk Kim , Jae-Seok Kim , Kyung-Soo Kim , Hee-Bum Jung , Jong-Dae Kim
IPC分类号： G06F7/32
CPC分类号： H04L1/0656 , G06F17/16 , H04L25/0242
摘要： Disclosed is a V-BLAST system for a MIMO communication system.In the V-BLAST system for a MIMO communication system, a pseudo inverse matrix calculator receives a channel transfer function matrix including channel information and produces a cofactor matrix and a determinant for a pseudo inverse matrix. A norm & minimum calculator calculates a minimum index for the cofactor matrix outputted from the pseudo inverse matrix calculator, a weight vector selector selects a row vector having the minimum index and calculates a transposed matrix for the row vector; an adder adds the transposed matrix to a received input symbol, and a subtractor subtracts the determinant to the output. A demapper performs a determined function operation to the output and produces estimated information.
摘要翻译：公开了一种用于MIMO通信系统的V-BLAST系统。在用于MIMO通信系统的V-BLAST系统中，伪逆矩阵计算器接收包括信道信息的信道传递函数矩阵，并产生用于伪逆矩阵的辅因子矩阵和行列式。规范和最小计算器计算从伪逆矩阵计算器输出的辅因子矩阵的最小索引，权重向量选择器选择具有最小索引的行向量并计算行向量的转置矩阵; 加法器将转置的矩阵添加到接收到的输入符号，并且减法器将输出的行列式减去。解映射器对输出执行确定的功能操作并产生估计信息。

2. 发明申请

US20050149596A1 Processing device for a pseudo inverse matrix and V-BLAST system 失效
标题翻译：用于伪逆矩阵和V-BLAST系统的处理装置
公开(公告)号：US20050149596A1
公开(公告)日：2005-07-07
申请号：US10972235
申请日：2004-10-21
申请人： In-San Jeon , Hyuk Kim , Jae-Seok Kim , Kyung-Soo Kim , Hee-Bum Jung , Jong-Dae Kim
发明人： In-San Jeon , Hyuk Kim , Jae-Seok Kim , Kyung-Soo Kim , Hee-Bum Jung , Jong-Dae Kim
IPC分类号： H04B7/02 , G06F17/10 , G06F17/16 , H04L1/06 , H04L25/02
CPC分类号： H04L1/0656 , G06F17/16 , H04L25/0242
摘要： Disclosed is a V-BLAST system for a MIMO communication system. In the V-BLAST system for a MIMO communication system, a pseudo inverse matrix calculator receives a channel transfer function matrix including channel information and produces a cofactor matrix and a determinant for a pseudo inverse matrix. A norm & minimum calculator calculates a minimum index for the cofactor matrix outputted from the pseudo inverse matrix calculator, a weight vector selector selects a row vector having the minimum index and calculates a transposed matrix for the row vector; an adder adds the transposed matrix to a received input symbol, and a subtractor subtracts the determinant to the output. A demapper performs a determined function operation to the output and produces estimated information.
摘要翻译：公开了一种用于MIMO通信系统的V-BLAST系统。在用于MIMO通信系统的V-BLAST系统中，伪逆矩阵计算器接收包括信道信息的信道传递函数矩阵，并产生用于伪逆矩阵的辅因子矩阵和行列式。规范和最小计算器计算从伪逆矩阵计算器输出的辅因子矩阵的最小索引，权重向量选择器选择具有最小索引的行向量并计算行向量的转置矩阵; 加法器将转置的矩阵添加到接收到的输入符号，并且减法器将输出的行列式减去。解映射器对输出执行确定的功能操作并产生估计信息。

3. 发明申请

US20060136802A1 Hybrid trace back apparatus and high-speed viterbi decoding system using the same 有权
公开(公告)号：US20060136802A1
公开(公告)日：2006-06-22
申请号：US11263443
申请日：2005-10-31
申请人： In-San Jeon , Hyuk Kim , Kyung-Soo Kim , Ik-Soo Eo , Hee-Bum Jung
发明人： In-San Jeon , Hyuk Kim , Kyung-Soo Kim , Ik-Soo Eo , Hee-Bum Jung
IPC分类号： H03M13/03
CPC分类号： H03M13/395 , H03M13/4107 , H03M13/4192
摘要： A hybrid trace back apparatus and a high-speed Viterbi decoding system having the same are disclosed. The hybrid trace back apparatus includes: a register exchanging unit for receiving survivor values of each states from a path metric calculator, and obtaining a block survival value through a register exchange operation as much as a bit length for a block trace back operation; a first storing unit for the register exchange operation; a second storing unit for storing the block survival value obtained through the register exchange operation until the block survival value is written in a block trace back memory; and a block trace back unit for outputting decoded data by performing a block trace back operation while writing a value of the second storing unit.

4. 发明授权

US07530010B2 Hybrid trace back apparatus and high-speed viterbi decoding system using the same 有权
标题翻译：混合追溯装置和使用相同的高速维特比解码系统
公开(公告)号：US07530010B2
公开(公告)日：2009-05-05
申请号：US11263443
申请日：2005-10-31
申请人： In-San Jeon , Hyuk Kim , Kyung-Soo Kim , Ik-Soo Eo , Hee-Bum Jung
发明人： In-San Jeon , Hyuk Kim , Kyung-Soo Kim , Ik-Soo Eo , Hee-Bum Jung
IPC分类号： H03M13/03
CPC分类号： H03M13/395 , H03M13/4107 , H03M13/4192
摘要： A hybrid trace back apparatus and a high-speed Viterbi decoding system having the same are disclosed. The hybrid trace back apparatus includes: a register exchanging unit for receiving survivor values of each states from a path metric calculator, and obtaining a block survival value through a register exchange operation as much as a bit length for a block trace back operation; a first storing unit for the register exchange operation; a second storing unit for storing the block survival value obtained through the register exchange operation until the block survival value is written in a block trace back memory; and a block trace back unit for outputting decoded data by performing a block trace back operation while writing a value of the second storing unit.
摘要翻译：公开了具有该混合追溯装置和高速维特比解码系统。混合追溯装置包括：寄存器交换单元，用于从路径度量计算器接收每个状态的幸存值，并通过寄存器交换操作获得块存活值，作为块追溯操作的位长; 用于寄存器交换操作的第一存储单元; 第二存储单元，用于存储通过寄存器交换操作获得的块存活值，直到块存储值被写入块追溯存储器; 以及块追溯单元，用于通过在写入第二存储单元的值的同时执行块追溯操作来输出解码数据。

5. 发明授权

US06772389B2 Turbo decoder using binary LogMAP algorithm and method of implementing the same 有权
标题翻译： Turbo解码器采用二进制LogMAP算法和实现方法相同
公开(公告)号：US06772389B2
公开(公告)日：2004-08-03
申请号：US09966201
申请日：2001-09-26
申请人： Hyuk Kim , In-San Jeon , Woo-Seok Yang , Kyung-Soo Kim , Han-Jin Cho
发明人： Hyuk Kim , In-San Jeon , Woo-Seok Yang , Kyung-Soo Kim , Han-Jin Cho
IPC分类号： H03M1345
CPC分类号： H03M13/3905 , H03M13/2957 , H03M13/3927 , H03M13/6502 , H03M13/6577
摘要： Disclosed are a turbo decoder, which applies a base-2 binary LogMAP algorithm in implementing a turbo decoder to thereby reduce the hardware requirement and implement a high-speed turbo decoder, which comprising a split for splitting the sum of two input state metrics into an integral and a decimal part; a comparator for comparing the integral parts of the two state metrics to extract a maximum and a minimum integer; a subtractor for obtaining a difference between the original integral part and the maximum or minimum integer value; a lookup table for calculating the sum of exponential terms of base-2 function in the decimal parts; a shifter for shifting only a decimal part with a smaller integral part by the difference; an adder for adding the decimal part and a decimal part with a larger integral part; a log pre-processing block for applying a base-2 logarithm on the decimal part to thereby obtain a final value for the decimal part; and an adder for adding the maximum integral value and the final value for the decimal part to thereby obtain a final value of the base-2 function.
摘要翻译：公开了一种turbo解码器，其在实现turbo解码器中应用基2二进制LogMAP算法，从而降低硬件要求并实现高速turbo解码器，该高速turbo解码器包括用于将两个输入状态度量的和分解为积分和小数部分; 用于比较两个状态度量的积分部分以提取最大和最小整数的比较器; 用于获得原始积分部分与最大或最小整数值之间的差的减法器; 用于计算小数部分中base-2函数的指数项的和的查找表; 移位器，用于仅移动具有较小整数部分的小数部分的差值; 用于将小数部分和小数部分与较大整数部分相加的加法器; 用于在小数部分应用基2对数的日志预处理块，从而获得小数部分的最终值; 以及加法器，用于将最大积分值和小数部分的最终值相加，从而获得基2功能的最终值。

6. 发明授权

US07529663B2 Method for flexible bit rate code vector generation and wideband vocoder employing the same 失效
标题翻译：用于灵活比特率码矢量生成的方法和采用该方法的宽带声码器
公开(公告)号：US07529663B2
公开(公告)日：2009-05-05
申请号：US11216430
申请日：2005-08-30
申请人： Kyung-Jin Byun , Ik-Soo Eo , Kyung-Soo Kim , Hee-Bum Jung
发明人： Kyung-Jin Byun , Ik-Soo Eo , Kyung-Soo Kim , Hee-Bum Jung
IPC分类号： G10L19/12 , G10L19/10
CPC分类号： G10L19/107 , G10L19/24
摘要： Provided are a flexible bit rate code vector generation method and a wideband vocoder employing the same. This invention implements a flexible bit rate by getting three code vectors which are composed of 24, 16, and 8 pulses, at a time in a search process, through improvement of an algebraic codebook search process in a wideband AMR-WB vocoder. The method includes the steps of: performing a preprocess, wherein the preprocess divides a sub-frame by tracks and decides a pulse position having a maximum value in each track; among a plurality of pulses to be searched, fixing a same number of pulses as the tracks to the position with the maximum value of each track sequentially, and searching optimal positions having a minimum error with a target signal by combining two pulses in two consecutive tracks for the remaining pulses; and creating a code vector with flexible bit rate.
摘要翻译：提供了一种灵活的比特率码矢量生成方法和采用该方法的宽带声码器。本发明通过在宽带AMR-WB声码器中改进代数码本搜索处理，通过在搜索过程中一次获得由24,16和8脉冲组成的三个码向量来实现灵活的比特率。该方法包括以下步骤：执行预处理，其中预处理通过磁道划分子帧，并确定每个磁道中具有最大值的脉冲位置; 在要搜索的多个脉冲之间，将相同数量的脉冲固定到具有每个磁道的最大值的位置，并且通过在两个连续的轨道中组合两个脉冲来搜索具有目标信号的最小误差的最佳位置剩下的脉冲; 并创建一个具有灵活位速率的码矢量。

7. 发明申请

US20060116872A1 Method for flexible bit rate code vector generation and wideband vocoder employing the same 失效
公开(公告)号：US20060116872A1
公开(公告)日：2006-06-01
申请号：US11216430
申请日：2005-08-30
申请人： Kyung-Jin Byun , Ik-Soo Eo , Kyung-Soo Kim , Hee-Bum Jung
发明人： Kyung-Jin Byun , Ik-Soo Eo , Kyung-Soo Kim , Hee-Bum Jung
IPC分类号： G10L19/12
CPC分类号： G10L19/107 , G10L19/24
摘要： Provided are a flexible bit rate code vector generation method and a wideband vocoder employing the same. This invention implements a flexible bit rate by getting three code vectors which are composed of 24, 16, and 8 pulses, at a time in a search process, through improvement of an algebraic codebook search process in a wideband AMR-WB vocoder. The method includes the steps of: performing a preprocess, wherein the preprocess divides a sub-frame by tracks and decides a pulse position having a maximum value in each track; among a plurality of pulses to be searched, fixing a same number of pulses as the tracks to the position with the maximum value of each track sequentially, and searching optimal positions having a minimum error with a target signal by combining two pulses in two consecutive tracks for the remaining pulses; and creating a code vector with flexible bit rate.

8. 发明授权

US07428563B2 Apparatus and method for selectively performing Fast Hadamard Transform or Fast Fourier Transform 失效
标题翻译：用于选择性地执行快速Hadamard变换或快速傅立叶变换的装置和方法
公开(公告)号：US07428563B2
公开(公告)日：2008-09-23
申请号：US10969504
申请日：2004-10-19
申请人： Ik-Soo Eo , Young-Seok Baek , Jung-Bum Kim , Hee-Bum Jung , Kyung-Soo Kim
发明人： Ik-Soo Eo , Young-Seok Baek , Jung-Bum Kim , Hee-Bum Jung , Kyung-Soo Kim
IPC分类号： G06F17/14
CPC分类号： G06F17/142 , G06F17/145
摘要： Disclosed is an apparatus for performing both FHT (Fast Hadamard Transform) and FFT (Fast Fourier Transform). This apparatus determines the phase coefficients as constantly “1” when performing the FHT, and changes the input order of input data to a reverse order of bits when performing the FFT. In addition, the apparatus, which can process a plurality of input data sets simultaneously, classifies the received signals into multi-path signals and multi-antenna signals, thus processing the multi-path signals separately from the multi-antenna signals, or directly processes multi-antenna signals.
摘要翻译：公开了一种用于执行FHT（Fast Hadamard Transform）和FFT（快速傅立叶变换）的装置。该装置在执行FHT时确定相位系数恒定为“1”，并且在执行FFT时将输入数据的输入顺序改变为相反的位数。另外，可以同时处理多个输入数据集的装置将接收到的信号分类成多径信号和多天线信号，从而与多天线信号分开处理多路信号，或直接处理多天线信号。

9. 发明申请

US20060129621A1 Apparatus of selectively performing fast hadamard transform and fast fourier transform, and CCK modulation and demodulation apparatus using the same 失效
标题翻译：选择性地执行快速hasamard变换和快速傅里叶变换的装置，以及使用其的CCK调制和解调装置
公开(公告)号：US20060129621A1
公开(公告)日：2006-06-15
申请号：US11273727
申请日：2005-11-14
申请人： Tae-Joon Kim , Ik-Soo Eo , Kyung-Soo Kim , Hee-Bum Jung
发明人： Tae-Joon Kim , Ik-Soo Eo , Kyung-Soo Kim , Hee-Bum Jung
IPC分类号： G06F17/14
CPC分类号： G06F17/142 , G06F17/145
摘要： A Fast Fourier Transform (FFT) apparatus for selectively performing Fast Hadamard transform (FHT), and a complementary code keying (CCK) modulation/demodulation apparatus using the same are disclosed. In the present invention, OFDM module and CCK module are integrated as one module having lower complexity compared to conventional scheme by embodying the CCK modulation using FFT structure in the OFDM module, and embodying the suboptimal and the optimized CCK modulations using FFT structure in OFDM module. Furthermore, according to the present invention, CDMA, OFDM, CCK modules may be integrated as single module.
摘要翻译：公开了一种用于选择性地执行快速Hadamard变换（FHT）的快速傅里叶变换（FFT）装置，以及使用该快速傅立叶变换的补码编码密钥（CCK）调制/解调装置。在本发明中，通过在OFDM模块中实现使用FFT结构的CCK调制，将OFDM模块和CCK模块集成为具有比常规方案更低复杂度的一个模块，并且在OFDM模块中体现了使用FFT结构的次优和优化的CCK调制。此外，根据本发明，可以将CDMA，OFDM，CCK模块集成为单个模块。

10. 发明授权

US07391632B2 Apparatus of selectively performing fast hadamard transform and fast fourier transform, and CCK modulation and demodulation apparatus using the same 失效
标题翻译：选择性地执行快速hasamard变换和快速傅里叶变换的装置，以及使用其的CCK调制和解调装置
公开(公告)号：US07391632B2
公开(公告)日：2008-06-24
申请号：US11273727
申请日：2005-11-14
申请人： Tae-Joon Kim , Ik-Soo Eo , Kyung-Soo Kim , Hee-Bum Jung
发明人： Tae-Joon Kim , Ik-Soo Eo , Kyung-Soo Kim , Hee-Bum Jung
IPC分类号： G11C19/08
CPC分类号： G06F17/142 , G06F17/145
摘要： A Fast Fourier Transform (FFT) apparatus for selectively performing Fast Hadamard transform (FHT), and a complementary code keying (CCK) modulation/demodulation apparatus using the same. An OFDM module and CCK module are integrated as one module having lower complexity compared to conventional scheme by embodying the CCK modulation using FFT structure in the OFDM module, and embodying the suboptimal and the optimized CCK modulations using FFT structure in OFDM module. CDMA, OFDM, CCK modules may be integrated as single module.
摘要翻译：用于选择性地执行快速Hadamard变换（FHT）的快速傅里叶变换（FFT）装置和使用该快速傅立叶变换的补码代码键控（CCK）调制/解调装置。通过在OFDM模块中实现使用FFT结构的CCK调制，将OFDM模块和CCK模块集成为具有比传统方案更低复杂度的模块，并且在OFDM模块中体现了使用FFT结构的次优和优化的CCK调制。 CDMA，OFDM，CCK模块可以集成为单个模块。

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