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    • 1. 发明授权
    • Signal processor for rapidly calculating a predetermined calculation a
plurality of times to typically carrying out FFT or inverse FFT
    • 用于快速计算预定计算多次以通常执行FFT或逆FFT的信号处理器
    • US4899301A
    • 1990-02-06
    • US8684
    • 1987-01-29
    • Takao NishitaniYuichi KawakamiHideo TanakaIchiro Kuroda
    • Takao NishitaniYuichi KawakamiHideo TanakaIchiro Kuroda
    • G06F17/14
    • G06F17/142
    • In a signal processor for processing zeroth through (N-1)-th input signal elements into zeroth through (N-1)-th output signal elements, the input elements are initially stored, as memorized data, in respective memory addresses of a memory arrangement (11, 12) by a memory accessing arrangement which comprises a first address calculating arrangement (311, 321) for calculating a first address for the memory addresses. A distance indicating arrangement (312, 322) is for indicating an address distance from the first address among the memory addresses. By using the first address and the address distance a second address is calculated by a second address calculating arrangement (313, 323). A pair of stored data are read from the first and the second addresses as a pair of read data. A calculation performing circuit (20) is for performing a predetermined calculation on the pair of read data by using a coefficient read from a read-only memory (14) to produce a pair of calculated data which are stored in the first and the second addresses as the stored data. The calculation performing circuit performs the predetermined calculation a plurality of times to produce the output elements.
    • 在用于将第(N-1)个第(N-1)个输入信号元素处理为第零到第(N-1)个输出信号元件的信号处理器中,输入元件最初作为存储的数据存储在存储器的相应存储器地址中 存储器访问装置(11,12)包括用于计算存储器地址的第一地址的第一地址计算装置(311,321)。 距离指示装置(312,322)用于指示存储器地址中与第一地址的地址距离。 通过使用第一地址和地址距离,第二地址由第二地址计算装置(313,323)计算。 从第一和第二地址读取一对存储的数据作为一对读取数据。 计算执行电路(20)用于通过使用从只读存储器(14)读取的系数来对该对读​​取数据执行预定计算,以产生存储在第一和第二地址中的一对计算数据 作为存储的数据。 计算执行电路多次执行预定的计算以产生输出元件。
    • 3. 发明授权
    • Processing circuit capable of raising throughput of accumulation
    • 处理电路能够提高积累的吞吐量
    • US4811268A
    • 1989-03-07
    • US864268
    • 1986-05-19
    • Takao NishitaniYuichi Kawakami
    • Takao NishitaniYuichi Kawakami
    • G06F7/544G06F17/10G06F7/38G06F7/52
    • G06F7/5443G06F17/10G06F7/49921
    • In a processing circuit for successively accumulating a first predetermined number of products, each product is shifted in a barrel shifter (20) downwards by a second predetermined number of bits determined in relation to the first predetermined number and is successively added to a previous result of accumulation in an arithmetic/logic unit (ALU) (21) the first predetermined number of times to produce a final result of accumulation. The first result is shifted in a shifter (27) upwards by a third predetermined number of bits determined in relation to the second predetermined number. An overflow detector (26) monitors each result of accumulation to detect occurrence of an overflow in the ALU and the shifter to substitute either a positive or a negative maximum number for each result by an overflow corrector (25) on occurrence of the overflow. The substituted maximum number or the shifted final result is produced as an output signal.
    • 在用于连续地累积第一预定数量的乘积的处理电路中,每个乘积在桶形移位器(20)中向下移动相对于第一预定数量确定的第二预定数量的位,并被连续地添加到 在算术/逻辑单元(ALU)(21)中积累第一预定次数以产生累积的最终结果。 第一结果在移位器(27)中向上移动相对于第二预定数确定的第三预定数量的位。 溢出检测器(26)监视每个累积结果,以检测ALU和移位器中的溢出的发生,以便在出现溢出时由溢出校正器(25)替换每个结果的正或负最大数目。 取代的最大数量或移位的最终结果作为输出信号产生。
    • 4. 发明授权
    • Arithmetic circuit with overflow detection capability
    • 具有溢出检测能力的算术电路
    • US4379338A
    • 1983-04-05
    • US209250
    • 1980-11-21
    • Takao NishitaniYuichi Kawakami
    • Takao NishitaniYuichi Kawakami
    • G06F7/38G06F7/00G06F7/50G06F7/505G06F7/509G06F17/10G06F7/48
    • G06F7/5095G06F7/4991
    • Overflow monitoring circuitry for an arithmetic unit offsets consecutive positive and negative overflows against one another to eliminate unnecessary overflow compensation during an arithmetic operation. In a first embodiment, an up/down counter is used to count positive overflows in one direction and negative overflows in another, with the value of the counter at the end of the arithmetic operation indicating the net overflow, if any has occurred, and the most significant bit of the counter representing the direction of any net overflow. In a second embodiment, logic circuitry offsets alternate positive and negative overflows against one another but will provide an overflow signal if either an odd number of overflows occurs or if two consecutive overflows in one direction occur during the arithmetic operation.
    • 运算单元的溢出监控电路将连续的正和负溢出相互抵消,以在算术运算期间消除不必要的溢出补偿。 在第一实施例中,使用向上/向下计数器对一个方向上的正溢出进行计数,并在另一方向上计数负溢出,而在算术运算结束时的计数器的值表示净溢出(如果有的话),并且 计数器的最高有效位表示任何净溢出的方向。 在第二实施例中,逻辑电路相互抵消交替的正和负溢出,但是如果发生奇数个溢出或者在算术运算期间发生两个连续的一个方向溢出,则会提供溢出信号。
    • 7. 发明申请
    • Authentication apparatus and authentication method
    • 验证设备和验证方法
    • US20070046662A1
    • 2007-03-01
    • US11507351
    • 2006-08-21
    • Yuichi KawakamiYuusuke Nakano
    • Yuichi KawakamiYuusuke Nakano
    • G06T15/00
    • G06K9/00275
    • An authentication apparatus comprises a first acquiring part for acquiring three-dimensional shape information of a face of a target person to be authenticated, a compressing part for compressing said three-dimensional shape information by using a predetermined mapping relation, thereby generating three-dimensional shape feature information, and an authenticating part for performing an operation of authenticating said target person by using said three-dimensional shape feature information. When a vector space expressing said three-dimensional shape information is virtually separated into a first subspace in which the influence of a change in facial expression is relatively small and which is suitable for discrimination among persons and a second subspace in which the influence of a change in facial expression is relatively large and which is not suitable for discrimination among persons, said predetermined mapping relation is decided so as to transform an arbitrary vector in said vector space into a vector in said first subspace.
    • 认证装置包括:第一获取部,用于获取要认证的目标人物的面部的三维形状信息;压缩部分,用于通过使用预定的映射关系来压缩所述三维形状信息,从而产生三维形状 特征信息,以及用于通过使用所述三维形状特征信息执行认证所述目标人物的操作的认证部分。 当将表示所述三维形状信息的向量空间实际上分成第一子空间,其中面部变化的影响相对较小并且适合于人与第二子空间之间的区别,其中变化的影响 在面部表情相对较大并且不适合于人之间的区分时,所述预定映射关系被确定为将所述向量空间中的任意向量变换成所述第一子空间中的向量。
    • 9. 发明申请
    • Authentication system, registration system, and program
    • 认证系统,注册系统和程序
    • US20070098230A1
    • 2007-05-03
    • US11588025
    • 2006-10-26
    • Toshio NoritaYuichi Kawakami
    • Toshio NoritaYuichi Kawakami
    • G06K9/00
    • G06K9/00288G06K9/00214
    • An authentication system comprises: a generating part for generating face information including at least one of three-dimensional shape information and two-dimensional information in the face of a first person to be authenticated on the basis of measurement information of the first person; a model modifying part for modifying a standard model of a human face by using the face information, thereby generating an individual model of the face of the first person; a calculating part for calculating a first model perfection level as a perfection level of the individual model on the basis of reliability of the face information; an extracting part for extracting first feature information as feature information of the first person from the individual model; an obtaining part for obtaining second feature information as feature information of a second person to be compared which is pre-registered; and an authenticating part for performing an authenticating operation on the first person by using the first model perfection level in addition to similarity between the first feature information and the second feature information.
    • 认证系统包括:产生部件,用于基于第一人的测量信息,生成面对面信息,该面部信息包括面对要认证的第一人的三维形状信息和二维信息中的至少一个; 用于通过使用面部信息来修改人脸的标准模型的模型修改部分,从而生成第一人的面部的个人模型; 计算部分,用于基于面部信息的可靠性计算第一模型完成水平作为个体模型的完美水平; 提取部,用于从所述个人模型中提取作为所述第一人的特征信息的第一特征信息; 获取部分,用于获得第二特征信息作为预先注册的待比较的第二人的特征信息; 以及用于通过使用第一模型完成级别除了第一特征信息和第二特征信息之间的相似性来对第一人员执行认证操作的认证部分。
    • 10. 发明授权
    • Autonomous vehicle capable of traveling/stopping in parallel to wall and
controlling method thereof
    • 能够与壁平行移动/停止的自主车辆及其控制方法
    • US6038501A
    • 2000-03-14
    • US31041
    • 1998-02-26
    • Yuichi Kawakami
    • Yuichi Kawakami
    • A47L11/00G05D1/02G06F165/00
    • G05D1/0272G05D1/0227G05D1/027G05D2201/0203
    • An autonomous vehicle capable of traveling and stopping parallel to a wall includes right and left driving wheels receiving driving force to be driven independently, a dependent wheel for supporting the autonomous vehicle together with the driving wheels for a straightforward movement and a U-turn, a motor for driving the right and left driving wheels, a coupling mechanism for transmitting the rotation of the motor to the driving wheels, an encoder for detecting the rotation amount and velocity of the motor, a gyro sensor for detecting the direction of the autonomous vehicle, a distance measurement sensor for measuring the distance to a right or left object of interest, and a controller for controlling the autonomous vehicle through the motor and the driving wheels. The controller receives the output of the encoder, calculates a control value for the driving wheels based on the rotation amount and rotation velocity of the motor, and determines that the autonomous vehicle travels parallel to the wall if the ratios of a time period to turn the autonomous vehicle rightward and a time period to turn the vehicle leftward in a prescribed time period are equal based on the control value.
    • 能够平行于墙壁行进和停止的自主车辆包括左右驱动轮,其接收独立驱动的驱动力,用于支撑自主车辆的从动轮与驱动轮一起用于直接运动和U形转弯, 用于驱动左右驱动轮的电动机,用于将电动机的旋转传递到驱动轮的联接机构,用于检测电动机的旋转量和速度的编码器,用于检测自主车辆的方向的陀螺仪传感器, 用于测量与感兴趣的左右物体的距离的距离测量传感器,以及通过马达和驱动轮来控制自主车辆的控制器。 控制器接收编码器的输出,根据马达的旋转量和旋转速度来计算驱动轮的控制值,并且如果自动车辆平行于墙壁行驶,则确定自动车辆转动时间段的比率 自主车辆在规定时间段内向左转动车辆的时间段基于控制值相等。