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1. 发明申请

WO2016149895A1 EXECUTION CONTEXT MIGRATION METHOD AND APPARATUS 审中-公开
标题翻译：执行上下文移动方法和装置
公开(公告)号：WO2016149895A1
公开(公告)日：2016-09-29
申请号：PCT/CN2015/074838
申请日：2015-03-23
申请人： INTEL CORPORATION , ZIMMER, Vincent J. , YAO, Jiewen , JAYAKUMAR, Sarathy , SWANSON, Robert C. , POORNACHANDRAN, Rajesh , SELVARAJE, Gopinatth , SUN, Mingqiu , HOWARD, John S. , GORBATOV, Eugene
发明人： ZIMMER, Vincent J. , YAO, Jiewen , JAYAKUMAR, Sarathy , SWANSON, Robert C. , POORNACHANDRAN, Rajesh , SELVARAJE, Gopinatth , SUN, Mingqiu , HOWARD, John S. , GORBATOV, Eugene
IPC分类号： G06F9/06
CPC分类号： G06F9/4856 , G06F1/1632 , G06F1/3215 , G06F1/3287 , G06F1/3293 , G06F9/46 , G06F9/4812 , G06F9/4893 , G06F9/5027 , Y02D10/24
摘要： Methods, apparatuses and storage medium associated with migration between processors by a computing device are disclosed. A portable electronic device having an internal processor and internal memory may be attached to a dock. The dock may include another processor as well other memory. The attachment of the dock to the portable electronic device may cause an interrupt. In response to this interrupt, a state associated with the internal processor may be copied to the other memory of the dock. Instructions for the computing device may then be executed using the other processor of the dock.
摘要翻译：公开了一种通过计算设备与处理器之间的迁移相关联的方法，设备和存储介质。具有内部处理器和内部存储器的便携式电子设备可以附接到坞站。码头可以包括另一个处理器以及其他存储器。坞站连接到便携式电子设备可能会导致中断。响应于该中断，与内部处理器相关联的状态可以被复制到码头的另一个存储器。然后可以使用码头的另一个处理器来执行计算设备的指令。

2. 发明申请

WO2014134808A1 MECHANISM TO SUPPORT RELIABILITY, AVAILABILITY, AND SERVICEABILITY (RAS) FLOWS IN A PEER MONITOR 审中-公开
标题翻译：支持对等监视器的可靠性，可用性和可维护性（RAS）流程的机制
公开(公告)号：WO2014134808A1
公开(公告)日：2014-09-12
申请号：PCT/CN2013/072294
申请日：2013-03-07
申请人： INTEL CORPORATION , YAO, Jiewen , ZIMMER, Vincent J.
发明人： YAO, Jiewen , ZIMMER, Vincent J.
IPC分类号： G06F21/00
CPC分类号： G06F11/0793 , G06F9/4406 , G06F9/468 , G06F9/4812 , G06F9/52 , G06F9/542 , G06F11/00 , G06F11/073 , G06F13/4081 , G06F21/00 , G11C29/08
摘要： A mechanism to support reliability, availability, and serviceability (RAS) flows in a peer monitor is disclosed. A method of the disclosure includes receiving, by a processing device, a system management interrupt (SMI) event. The method further includes invoking, in response to the SMI event, a privilege manager to execute from a read-only memory (ROM) entry point to handle the SMI event, the privilege manager comprising a hot plug service module to provide support for memory hot plug functionality and processor hot plug functionality.
摘要翻译：公开了一种在对等监视器中支持可靠性，可用性和可服务性（RAS）流的机制。本公开的方法包括：通过处理设备接收系统管理中断（SMI）事件。该方法还包括响应于SMI事件调用特权管理器从只读存储器（ROM）入口点执行以处理SMI事件，特权管理器包括热插拔服务模块，以提供对存储器热的支持插头功能和处理器热插拔功能。

3. 发明申请

WO2023283872A1 SYSTEM MANAGEMENT MODE RUNTIME RESILIENCY MANAGER 审中-公开
公开(公告)号：WO2023283872A1
公开(公告)日：2023-01-19
申请号：PCT/CN2021/106444
申请日：2021-07-15
申请人： INTEL CORPORATION , YAO, Jiewen , ZIMMER, Vincent
发明人： YAO, Jiewen , ZIMMER, Vincent
IPC分类号： G06F9/44
摘要： A system management mode (SMM) runtime resiliency manager (SRM) augments computing resource protection policies provided by an SMM policy shim. The SMM shim protects system resources by deprivileging system management interrupt (SMI) handlers to a lower level of privilege (e.g., ring 3 privilege) and by configuring page tables and register bitmaps (e.g., I/O, MSR, and Save State register bitmaps). SRM capabilities include protecting the SMM shim, updating the SMM shim, protecting a computing system during SMM shim update, detecting SMM attacks, and recovering attacked or faulty SMM components.

4. 发明申请

WO2022099531A1 OFFLOADING RELIABILITY, AVAILABILITY AND SERVICEABILITY RUNTIME SYSTEM MANAGEMENT INTERRUPT ERROR HANDLING TO CPU ON-DIE MODULES 审中-公开
公开(公告)号：WO2022099531A1
公开(公告)日：2022-05-19
申请号：PCT/CN2020/128265
申请日：2020-11-12
申请人： INTEL CORPORATION , LU, Fumin , PU, Hong , WANG, Lei , YAO, Jiewen
发明人： LU, Fumin , PU, Hong , WANG, Lei , YAO, Jiewen
IPC分类号： G06F11/07
摘要： Systems, apparatuses and methods may provide for technology that detects a runtime error in a core region of a host processor, notifies an assistant processor of the runtime error, wherein the assistant processor is external to the core region and on a shared die with the core region, and conducts a handling of the runtime error by the assistant processor, wherein the handling bypasses a system management mode (SMM).

5. 发明申请

WO2018176388A1 TECHNIQUES TO MAINTAIN MEMORY CONFIDENTIALITY THROUGH POWER STATE CHANGES 审中-公开
公开(公告)号：WO2018176388A1
公开(公告)日：2018-10-04
申请号：PCT/CN2017/079002
申请日：2017-03-31
申请人： INTEL CORPORATION , YAO, Jiewen , ROTHMAN, Michael, A. , ZIMMER, Vincent, J.
发明人： YAO, Jiewen , ROTHMAN, Michael, A. , ZIMMER, Vincent, J.
IPC分类号： G11C16/06
CPC分类号： G11C16/22 , G06F21/79 , G11C5/148 , G11C7/20 , G11C7/24
摘要： Various embodiments are generally directed to techniques to maintain confidentiality of non-volatile memoryin a computer system through power state changes, such as, between a hibernation state and an awake state, for instance. Some embodiments are particularly directed a memory confidentiality manager (MCM) that clears content in a protected non-volatile memory unless appropriate session data is provided after a power state change. In various embodiments, the MCM may comprise one or more portions of a state machine (SM). In some embodiments, a memory controller associated with the protected memory may provide the session data to the MCM as part of an authentication operation. In some such embodiments, the memory controller may comprise one or more portions of a system on chip (SOC).

6. 发明申请

WO2016201628A1 PLATFORM MANAGEMENT METHOD AND APPARATUS INCLUDING EXPIRATION DETECTION 审中-公开
标题翻译：平台管理方法和装置，包括过期检测
公开(公告)号：WO2016201628A1
公开(公告)日：2016-12-22
申请号：PCT/CN2015/081610
申请日：2015-06-17
申请人： INTEL CORPORATION , YAO, Jiewen , ZIMMER, Vincent J. , POORNACHANDRAN, Rajesh
发明人： YAO, Jiewen , ZIMMER, Vincent J. , POORNACHANDRAN, Rajesh
IPC分类号： G06F21/00
CPC分类号： G06F21/10 , G06F1/14 , G06F21/57 , G06F21/572 , G06F21/725
摘要： Apparatuses, methods and storage media associated with managing a computing platform in view of an expiration date are described herein. In embodiments, an apparatus may include a computing platform that includes one or more processors to execute applications; and a trusted execution environment that includes a tamper-proof storage to store an expiration date of the computing platform, and a firmware module to be operated in a secure system management mode to regulate operation of the computing platform in view of at least whether a current date is earlier than the expiration date. Other embodiments may be described or claimed.
摘要翻译：这里描述了考虑到到期日期来管理计算平台的装置，方法和存储介质。在实施例中，设备可以包括包括一个或多个处理器以执行应用的计算平台; 以及可信赖执行环境，其包括用于存储计算平台的到期日期的防篡改存储器，以及待安全系统管理模式操作以固定计算平台的操作的固件模块，以至少考虑当前的日期早于有效期。可以描述或要求保护其他实施例。

7. 发明公开

EP3353699A1 TECHNIQUES FOR COORDINATING DEVICE BOOT SECURITY 审中-公开
公开(公告)号：EP3353699A1
公开(公告)日：2018-08-01
申请号：EP15904426.2
申请日：2015-09-24
申请人： INTEL Corporation
发明人： YAO, Jiewen , ZIMMER, Vincent, J.
IPC分类号： G06F21/50
CPC分类号： G06F21/575
摘要： Various embodiments are generally directed to techniques for coordinating the formation of a chain of trust among components of a processing device. An apparatus may include a processor component including verification microcode to authenticate a verification routine based on a first security credential to create a chain of trust within a processing device that includes the verification microcode and the verification routine; a collecting register to provide a hash value of one or more values written to the collecting register since initialization of the processing device when read; and a verification component of the verification routine to determine a selected security level of the initialization, and based on the selected security level, to authenticate a firmware based on a second security credential to extend the chain of trust to include the firmware and store an indication of a result of the attempted authentication of the firmware in the collecting register.

8. 发明申请

WO2019119408A1 MANAGEABILITY ENGINE AND AUTOMATIC FIRMWARE VALIDATION 审中-公开
公开(公告)号：WO2019119408A1
公开(公告)日：2019-06-27
申请号：PCT/CN2017/117970
申请日：2017-12-22
申请人： INTEL CORPORATION , YAO, Jiewen , ZIMMER, Vincent J.
发明人： YAO, Jiewen , ZIMMER, Vincent J.
IPC分类号： G06F9/445
摘要： Malicious attacks have moved from higher level virus attacks on software and data files operating on a device, to subverting the firmware underlying the device, where the firmware will compromise operation of the device even after attempts to remove the virus, unwanted programs, or other activity due to the subversion. If the firmware is compromised then even a clean reinstall of all software and/or services on the device may only result in a clean device that is then subsequently compromised again. Although device manufacturers may update a firmware to remove the vulnerability, there remains a problem in getting users to actually perform the update. To facilitate device security, a database or databases of firmware may be maintained where their status of vulnerable (bad) or not (good) is maintained and various options are presented for scanning firmware for vulnerabilities, out of band or manually, and pulling/pushing updates as desired to automatically update a device or prompt a user for updating. Updates may be mandatory per a policy and/or controlled by user preference. Looking for vulnerabilities may be device driven, or managed by an external entity. As new vulnerabilities are discovered, existing firmware may be checked for the vulnerability, and if found, devices having vulnerable firmware may be updated. New firmware may be recorded in the database (s) and the database (s) periodically scanned for vulnerabilities.

9. 发明申请

WO2017107122A1 TECHNIQUES FOR COORDINATING DEVICE BOOT SECURITY 审中-公开
标题翻译：协调设备引导安全的技术
公开(公告)号：WO2017107122A1
公开(公告)日：2017-06-29
申请号：PCT/CN2015/098651
申请日：2015-12-24
申请人： INTEL CORPORATION , YAO, Jiewen , ZIMMER, Vincent J. , LI, Wei , POORNACHANDRAN, Rajesh , MUDUSURU, Giri P.
发明人： YAO, Jiewen , ZIMMER, Vincent J. , LI, Wei , POORNACHANDRAN, Rajesh , MUDUSURU, Giri P.
IPC分类号： G06F21/57
CPC分类号： G06F21/57 , G06F21/575
摘要： Techniques for providing and maintaining protection of firmware routines that form part of a chain of trust through successive processing environments. An apparatus may include a first processor component (550); a volatile storage (562) coupled to the first processor component; an enclave component to, in a pre-OS operating environment, generate a secure enclave within a portion of the volatile storage to restrict access to a secured firmware loaded into the secure enclave; a first firmware driver (646) to, in the pre-OS operating environment, provide a first API to enable unsecured firmware to call a support routine of the secured firmware from outside the secure enclave; and a second firmware driver (647) to, in an OS operating environment that replaces the pre-OS operating environment, provide a second API to enable an OS of the OS operating environment to call the support routine from outside the secure enclave.
摘要翻译：通过连续处理环境提供并维护构成信任链一部分的固件例程的保护技术。一种装置可以包括第一处理器组件（550）; 耦合到第一处理器组件的易失性存储器（562）用于在OS前操作环境中在易失性存储器的一部分内生成安全区域以限制对加载到安全区域中的安全固件的访问的区域组件; 第一固件驱动程序（646），用于在OS前操作环境中提供第一API以使得不安全固件能够从安全区域外部调用安全固件的支持例程; 以及第二固件驱动程序（647），用于在替换操作系统前操作环境的操作系统操作环境中提供第二API以使操作系统操作环境的操作系统能够从安全飞地外调用支持例程。 p>

10. 发明申请

WO2017049539A1 TECHNIQUES FOR COORDINATING DEVICE BOOT SECURITY 审中-公开
标题翻译：协调设备引导安全的技术
公开(公告)号：WO2017049539A1
公开(公告)日：2017-03-30
申请号：PCT/CN2015/090576
申请日：2015-09-24
申请人： INTEL CORPORATION , YAO, Jiewen , ZIMMER, Vincent, J.
发明人： YAO, Jiewen , ZIMMER, Vincent, J.
IPC分类号： G06F21/50
CPC分类号： G06F21/575
摘要： Various embodiments are generally directed to techniques for coordinating the formation of a chain of trust among components of a processing device. An apparatus may include a processor component including verification microcode to authenticate a verification routine based on a first security credential to create a chain of trust within a processing device that includes the verification microcode and the verification routine; a collecting register to provide a hash value of one or more values written to the collecting register since initialization of the processing device when read; and a verification component of the verification routine to determine a selected security level of the initialization, and based on the selected security level, to authenticate a firmware based on a second security credential to extend the chain of trust to include the firmware and store an indication of a result of the attempted authentication of the firmware in the collecting register.
摘要翻译：各种实施例通常涉及用于协调处理装置的组件之间的信任链的形成的技术。设备可以包括处理器组件，其包括验证微代码，以基于第一安全凭证来验证验证例程，以在包括验证微代码和验证例程的处理设备内创建信任链; 收集寄存器，用于在读取时从处理设备初始化提供写入收集寄存器的一个或多个值的哈希值; 以及所述验证例程的验证部件，以确定所述初始化的所选安全级别，并且基于所选择的安全级别，基于第二安全凭证认证固件，以扩展所述信任链以包括所述固件并存储指示是在收集寄存器中尝试认证固件的结果。

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