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1. 发明申请

WO2015013059A1 FEATURE LICENSING IN A SECURE PROCESSING ENVIRONMENT 审中-公开
标题翻译：安全加工环境中的特征许可
公开(公告)号：WO2015013059A1
公开(公告)日：2015-01-29
申请号：PCT/US2014/046610
申请日：2014-07-15
申请人： INTEL CORPORATION , SCARLATA, Vincent R. , ROZAS, Carlos V. , JOHNSON, Simon P. , SAVAGAONKAR, Uday R. , ANATI, Ittai , MCKEEN, Francis X. , GOLDSMITH, Michael A.
发明人： SCARLATA, Vincent R. , ROZAS, Carlos V. , JOHNSON, Simon P. , SAVAGAONKAR, Uday R. , ANATI, Ittai , MCKEEN, Francis X. , GOLDSMITH, Michael A.
IPC分类号： G06F21/00 , G06F9/06
CPC分类号： H04L9/3213 , G06F21/12 , G06F21/53 , H04L9/3263
摘要： Embodiments of an invention for feature licensing in a secure processing environment are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction to initialize a secure enclave. The execution unit is to execute the instruction. Execution of the instruction includes determining whether a requested feature is licensed for use in the secure enclave.
摘要翻译：公开了在安全处理环境中的特征许可的发明的实施例。在一个实施例中，处理器包括指令单元和执行单元。指令单元将接收初始化安全飞地的指令。执行单元执行指令。指令的执行包括确定所请求的特征是否被许可用于安全飞地。

2. 发明申请

WO2014105130A1 MEASURING APPLICATIONS LOADED IN SECURE ENCLAVES AT RUNTIME 审中-公开
标题翻译：测量在运行时以安全的方式装载的应用程序
公开(公告)号：WO2014105130A1
公开(公告)日：2014-07-03
申请号：PCT/US2013/046191
申请日：2013-06-17
申请人： INTEL CORPORATION , XING, Bin , HOEKSTRA, Matthew E. , GOLDSMITH, Michael A. , ROZAS, Carlos V. , SCARLATA, Vincent R. , JOHNSON, Simon P. , SAVAGAONKAR, Uday R. , MCKEEN, Francis X. , TOLOPKA, Stephen J.
发明人： XING, Bin , HOEKSTRA, Matthew E. , GOLDSMITH, Michael A. , ROZAS, Carlos V. , SCARLATA, Vincent R. , JOHNSON, Simon P. , SAVAGAONKAR, Uday R. , MCKEEN, Francis X. , TOLOPKA, Stephen J.
IPC分类号： G06F21/52 , G06F9/44
CPC分类号： G06F21/53 , G06F21/71 , G06F2221/2101 , G06F2221/2149
摘要： Embodiments of an invention for measuring applications loaded in secure enclaves at runtime are disclosed. In one embodiment, a processor includes an instruction unit and an execution unit. The instruction unit is to receive an instruction to extend a first measurement of a secure enclave with a second measurement. The execution unit is to execute the instruction after initialization of the secure enclave.
摘要翻译：公开了用于在运行时测量加载在安全空间中的应用的发明的实施例。在一个实施例中，处理器包括指令单元和执行单元。指令单元将接收用于通过第二测量来扩展安全飞地的第一测量的指令。执行单元将在安全飞地初始化后执行指令。

3. 发明申请

WO2012082410A2 TECHNIQUE FOR SUPPORTING MULTIPLE SECURE ENCLAVES 审中-公开
标题翻译：支持多种安全措施的技术
公开(公告)号：WO2012082410A2
公开(公告)日：2012-06-21
申请号：PCT/US2011/063140
申请日：2011-12-02
申请人： INTEL CORPORATION , JOHNSON, Simon P. , SAVAGAONKAR, Uday R. , SCARLATA, Vincent R. , MCKEEN, Francis X. , ROZAS, Carlos V.
发明人： JOHNSON, Simon P. , SAVAGAONKAR, Uday R. , SCARLATA, Vincent R. , MCKEEN, Francis X. , ROZAS, Carlos V.
IPC分类号： G06F21/00 , G06F21/22 , G06F21/24
CPC分类号： G06F12/1466 , G06F21/53 , G06F21/6218 , G06F21/64 , G06F21/645
摘要： A technique to enable secure application and data integrity within a computer system. In one embodiment, one or more secure enclaves are established in which an application and data may be stored and executed.
摘要翻译：一种在计算机系统内实现安全应用和数据完整性的技术。在一个实施例中，建立一个或多个安全空间，其中可以存储和执行应用和数据。

4. 发明申请

WO2018005384A1 DATA SECURITY IN A CLOUD NETWORK 审中-公开
标题翻译：云网络中的数据安全
公开(公告)号：WO2018005384A1
公开(公告)日：2018-01-04
申请号：PCT/US2017/039331
申请日：2017-06-26
申请人： INTEL CORPORATION
发明人： SCARLATA, Vincent R. , MCKEEN, Francis X. , ROZAS, Carlos V. , JOHNSON, Simon P. , ZHANG, Bo , VIJ, Mona , BAKER, Brandon , KUMAR, Mohan J. , MALLICK, Asit K. , GENTRY, Mark A. , CHAKRABARTI, Somnath
IPC分类号： G06F21/60 , G06F21/62 , H04L29/06 , H04L9/08
CPC分类号： H04L9/0816 , G06F21/6218 , H04L9/0861 , H04L9/088 , H04L9/0894 , H04L9/14 , H04L63/06
摘要： Particular embodiments described herein provide for an electronic device that can be configured to store data in a secure domain in a cloud network, create encryption keys, where each encryption key is to provide a different type of access to the data, and store the encryption keys in a secure domain key store in the cloud network. In an example, each encryption key provides access to a different version of the data. In another example, a counter engine stores the location of each version of the data in the cloud network.
摘要翻译：这里描述的特定实施例提供了一种电子设备，其可以被配置为将数据存储在云网络中的安全域中，创建加密密钥，其中每个加密密钥将提供对数据，并将加密密钥存储在云网络中的安全域密钥存储中。在一个示例中，每个加密密钥提供对不同版本的数据的访问。在另一个例子中，计数器引擎将每个数据版本的位置存储在云网络中。

5. 发明申请

WO2017052793A1 CRYPTOGRAPHIC CACHE LINES FOR A TRUSTED EXECUTION ENVIRONMENT 审中-公开
标题翻译： CRYPTOGRAPHIC CACHE线条用于执行执行环境
公开(公告)号：WO2017052793A1
公开(公告)日：2017-03-30
申请号：PCT/US2016/045408
申请日：2016-08-03
申请人： INTEL CORPORATION
发明人： CHHABRA, Siddhartha , MCKEEN, Francis X. , ROZAS, Carlos V. , KOMIJANI, Saeedeh , LEHMAN, Tamara S.
IPC分类号： G06F21/72 , G06F21/55
CPC分类号： G06F21/72 , G06F12/1408 , G06F21/64 , G06F21/78 , H04L9/002 , H04L9/0637 , H04L9/3242 , H04L2209/12
摘要： Memory security technologies are described. An example processing system includes a processor core and a memory controller coupled to the processor core and a memory. The processor core can receive a content read instruction from an application. The processor core can identify a cache line (CL) from a plurality of CLs of a cryptographic cache block (CCB) requested in the content read instruction. The processor core can load, from a cryptographic tree, tree nodes with security metadata. The processor core can retrieve, from the memory, the CCB. The processor core can generate a second MAC from the CCB. The processor core can compare the first MAC with the second MAC. The processor core can decrypt the CCB using security metadata when the first MAC matches the second MAC. The processor core can send at least the identified CL from the decrypted CCB to the application.
摘要翻译：内存安全技术被描述。示例性处理系统包括处理器核心和耦合到处理器核心和存储器的存储器控制器。处理器核心可以从应用程序接收内容读取指令。处理器核心可以从内容读取指令中请求的密码高速缓存块（CCB）的多个CL中识别高速缓存行（CL）。处理器核心可以从加密树中加载具有安全元数据的树节点。处理器核心可以从内存中检索CCB。处理器核心可以从CCB生成第二个MAC。处理器核心可以将第一MAC与第二MAC进行比较。当第一MAC与第二MAC匹配时，处理器核心可以使用安全元数据解密CCB。处理器核心可以将至少从被解密的CCB的所识别的CL发送到应用程序。

6. 发明申请

WO2017014858A1 SUPPORTING CONFIGURABLE SECURITY LEVELS FOR MEMORY ADDRESS RANGES 审中-公开
标题翻译：支持存储地址范围的可配置安全级别
公开(公告)号：WO2017014858A1
公开(公告)日：2017-01-26
申请号：PCT/US2016/037011
申请日：2016-06-10
申请人： INTEL CORPORATION
发明人： BHATTACHARYYA, Binata , MAKARAM, Raghunandan , SANTONI, Amy L. , CHRYSOS, George Z. , JOHNSON, Simon P. , MORRIS, Brian S. , MCKEEN, Francis X.
IPC分类号： G06F21/79 , G06F21/62 , G06F12/14
CPC分类号： G06F21/62 , G06F21/602 , G06F21/64 , G06F21/78 , G06F2221/2113
摘要： A processor implementing techniques for supporting configurable security levels for memory address ranges is disclosed. In one embodiment, the processor includes a processing core a memory controller, operatively coupled to the processing core, to access data in an off chip memory and a memory encryption engine (MEE) operatively coupled to the memory controller. The MEE is to responsive to detecting a memory access operation with respect to a memory location identified by a memory address within a memory address range associated with the off-chip memory, identify a security level indicator associated with the memory location based on a value stored on a security range register. The MEE is further to access at least a portion of a data item associated with the memory address range of the off-chip memory in view of the security level indicator.
摘要翻译：公开了一种实现用于支持存储器地址范围的可配置安全级别的技术的处理器。在一个实施例中，处理器包括处理核心，存储器控制器，可操作地耦合到处理核心，以访问非芯片存储器中的数据和可操作地耦合到存储器控制器的存储器加密引擎（MEE）。所述MEE响应于检测相对于与所述片外存储器相关联的存储器地址范围内的存储器地址识别的存储器位置的存储器访问操作，基于存储的值来识别与所述存储器位置相关联的安全级别指示符在安全范围寄存器上。鉴于安全级别指示符，MEE进一步访问与片外存储器的存储器地址范围相关联的数据项的至少一部分。

7. 发明申请

WO2015047789A1 SECURE MEMORY REPARTITIONING 审中-公开
标题翻译：安全记忆重写
公开(公告)号：WO2015047789A1
公开(公告)日：2015-04-02
申请号：PCT/US2014/055807
申请日：2014-09-16
申请人： INTEL CORPORATION , CHHABRA, Siddhartha , SAVAGAONKAR, Uday R. , GOLDSMITH, Michael A. , JOHNSON, Simon P. , LESLIE-HURD, Rebekah M. , MCKEEN, Francis X. , NEIGER, Gilbert , MAKARAM, Raghunandan , ROZAS, Carlos V. , SANTONI, Amy L. , SCARLATA, Vincent R. , SHANBHOGUE, Vedvyas , SMITH, Wesley H. , ANATI, Ittai , ALEXANDROVICH, Ilya
发明人： CHHABRA, Siddhartha , SAVAGAONKAR, Uday R. , GOLDSMITH, Michael A. , JOHNSON, Simon P. , LESLIE-HURD, Rebekah M. , MCKEEN, Francis X. , NEIGER, Gilbert , MAKARAM, Raghunandan , ROZAS, Carlos V. , SANTONI, Amy L. , SCARLATA, Vincent R. , SHANBHOGUE, Vedvyas , SMITH, Wesley H. , ANATI, Ittai , ALEXANDROVICH, Ilya
IPC分类号： G06F21/79 , G06F12/14
CPC分类号： G06F12/1408 , G06F9/45558 , G06F12/0808 , G06F12/0897 , G06F12/1027 , G06F2009/45587 , G06F2212/1032 , G06F2212/1048 , G06F2212/152
摘要： Secure memory repartitioning technologies are described. A processor includes a processor core and a memory controller coupled between the processor core and main memory. The main memory includes a memory range including a section of convertible pages are convertible to secure pages or non-secure pages. The processor core, in response to a page conversion instruction, is to determine from the instruction a convertible page in the memory range to be converted and convert the convertible page to be at least one of a secure page or a non-secure page. The memory range may also include a hardware reserved section are convertible in response to a section conversion instruction.
摘要翻译：描述了安全的内存重新分区技术。处理器包括耦合在处理器核心和主存储器之间的处理器核心和存储器控制器。主存储器包括一个内存范围，包括可转换页面的一部分可转换为安全页面或非安全页面。响应于页面转换指令的处理器核心是从指令中确定要转换的存储器范围内的可转换页面，并将可转换页面转换为安全页面或非安全页面中的至少一个页面。存储器范围还可以包括可响应于段转换指令而转换的硬件保留部分。

8. 发明授权

EP2726991B1 METHOD AND APPARATUS FOR MEMORY ENCRYPTION WITH INTEGRITY CHECK AND PROTECTION AGAINST REPLAY ATTACKS 有权
标题翻译：具有完整性检查和防止重放攻击的保护的存储器加密方法和设备
公开(公告)号：EP2726991B1
公开(公告)日：2018-03-14
申请号：EP11868426.5
申请日：2011-06-29
申请人： Intel Corporation
发明人： GUERON, Shay , SAVAGAONKAR, Uday , MCKEEN, Francis X. , ROZAS, Carlos V. , DURHAM, David M. , DOWECK, Jacob , MULLA, Ofir , ANATI, Ittai , GREENFIELD, Zvika , MAOR, Moshe
IPC分类号： G06F12/14 , G06F21/72 , G06F21/64 , H04L9/06 , H04L9/32
CPC分类号： G06F21/72 , G06F12/1408 , G06F21/00 , G06F21/64 , H04L9/0637 , H04L9/3242
摘要： A method and apparatus to provide cryptographic integrity checks and replay protection to protect against hardware attacks on system memory is provided. A mode of operation for block ciphers enhances the standard XTS-AES mode of operation to perform memory encryption by extending a tweak to include a “time stamp” indicator. A tree-based replay protection scheme uses standard XTS-AES to encrypt contents of a cache line in the system memory. A Message-Authentication Code (MAC) for the cache line is encrypted using enhanced XTS-AES and a “time stamp” indicator associated with the cache line. The “time stamp indicator” is stored in a processor.

9. 发明申请

WO2018044475A1 MANAGING ENCLAVE MEMORY PAGES 审中-公开
标题翻译：管理ENCLAVE内存页面
公开(公告)号：WO2018044475A1
公开(公告)日：2018-03-08
申请号：PCT/US2017/044961
申请日：2017-08-01
申请人： INTEL CORPORATION
发明人： LESLIE-HURD, Rebekah M. , MCKEEN, Francis X. , ROZAS, Carlos V. , CHAKRABARTI, Somnath , MALLICK, Asit K.
IPC分类号： G06F12/14
CPC分类号： G06F12/0824 , G06F12/0808 , G06F12/0811 , G06F12/084 , G06F21/53 , G06F21/572 , G06F2212/1008 , G06F2212/1052 , G06F2212/152 , G06F2212/60 , G06F2212/62 , G06F2221/032
摘要： A processing device includes a first counter having a first count value of a number of child pages among a plurality of child pages present in an enclave memory of a first virtual machine (VM). The plurality of child pages are associated with a parent page in the enclave memory. The processing device includes a second counter having a second count value of a number of child pages among the plurality of child pages not present in the enclave memory and being shared by a second VM, wherein the second VM is different from the first VM. A non-zero value of at least one of the first counter or the second counter prevents eviction of the parent page from the enclave memory.
摘要翻译：处理设备包括第一计数器，该第一计数器具有存在于第一虚拟机（VM）的区域存储器中的多个子页面中的多个子页面的第一计数值。多个子页面与区域存储器中的父页面相关联。处理设备包括第二计数器，该第二计数器具有第二计数器，该第二计数器具有第二计数器，该第二计数器具有在该区域存储器中不存在并且由第二VM共享的多个子页面中的多个子页面的第二计数值，其中第二VM不同于第一VM。第一计数器或第二计数器中的至少一个的非零值防止从飞地存储器中逐出父页面。

10. 发明申请

WO2017210145A1 FLEXIBLE PROVISIONING OF ATTESTATION KEYS IN SECURE ENCLAVES 审中-公开
标题翻译：在安全环境中灵活地提供证明密钥
公开(公告)号：WO2017210145A1
公开(公告)日：2017-12-07
申请号：PCT/US2017/034897
申请日：2017-05-28
申请人： INTEL CORPORATION
发明人： SCARLATA, Vincent R. , MCKEEN, Francis X. , ROZAS, Carlos V. , JOHNSON, Simon P. , ZHANG, Bo , BEANEY, JR., James D. , ZMIJEWSKI, Piotr , SMITH, Wesley Hamilton , CABRE, Eduardo
IPC分类号： G06F21/53 , G06F21/62 , H04L9/08
CPC分类号： H04L9/3252 , G06F21/44 , G06F21/53 , G09C1/00 , H04L9/0866 , H04L9/14 , H04L9/302 , H04L9/3066 , H04L9/3234 , H04L9/3247 , H04L9/3249 , H04L63/06 , H04L63/062 , H04L63/0823 , H04L63/12 , H04L2209/127
摘要： A computing platform implements one or more secure enclaves including a first provisioning enclave to interface with a first provisioning service to obtain a first attestation key from the first provisioning service, a second provisioning enclave to interface with a different, second provisioning service to obtain a second attestation key from the second provisioning service, and a provisioning certification enclave to sign first data from the first provisioning enclave and second data from the second provisioning enclave using a hardware-based provisioning attestation key. The signed first data is used by the first provisioning enclave to authenticate to the first provisioning service to obtain the first attestation key and the signed second data is used by the second provisioning enclave to authenticate to the second provisioning service to obtain the second attestation key.
摘要翻译：计算平台实现一个或多个安全区域，所述安全区域包括第一供应区域和第一供应服务，以从第一供应服务获得第一认证密钥，第二供应区域与不同的，第二供应服务以从第二供应服务获得第二认证密钥，以及供应认证区域，以使用基于硬件的供应认证密钥来对来自第一供应区域的第一数据和来自第二供应区域的第二数据进行签名。经签名的第一数据由第一供应区域用于向第一供应服务认证以获得第一认证密钥，并且由第二供应区域使用经签署的第二数据来向第二供应服务认证以获得第二认证密钥。

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